METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE

WIPO Patent Application WO/2008/013032

A1

This invention provides a method for manufacturing a semiconductor substrate, comprising the steps of forming an SiGe composition inclination layer and an SiGe composition fixed layer on an Si single crystal substrate, flattening a surface of the SiGe composition fixed layer, removing a native oxide film on the surface of the flattened SiGe composition fixed layer, and forming a strained Si layer on the SiGe composition fixed layer from which the native oxide film on the surface has been removed. The SiGe composition inclination layer and the SiGe composition fixed layer are formed at a temperature T1 which is above 800ºC, and the native oxide film on the surface of the SiGe composition fixed layer is removed by heat treatment at a temperature T2 which is 800ºC or above and is below the temperature T1 under a reducing gas atmosphere. The strained Si layer is formed at a temperature T3 which is below the temperature T1. According to the above constitution, the strained Si layer can be epitaxially grown on the flattened SiGe layer without sacrificing the flatness of the surface of the SiGe layer.

OKA, Satoshi (Shin-Etsu Handotai Co. Ltd. 507, Aza Matsubara, Nakanoya, Annaka-sh, Gunma 25, 3790125, JP)
岡 哲史 (〒25 群馬県安中市中野谷字松原５０７ 信越半導体株式会社 横野平工場内 Gunma, 3790125, JP)

JP2007/063349

January 31, 2008

July 04, 2007

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Shin-Etsu Handotai Co., Ltd. (6-2 Ohtemachi 2-chome, Chiyoda-ku Tokyo, 04, 1000004, JP)
信越半導体株式会社 (〒04 東京都千代田区大手町二丁目６番２号 Tokyo, 1000004, JP)
OKA, Satoshi (Shin-Etsu Handotai Co. Ltd. 507, Aza Matsubara, Nakanoya, Annaka-sh, Gunma 25, 3790125, JP)

H01L21/205; H01L21/20

YOSHIMIYA, Mikio (1st Shitaya Bldg. 8F, 6-11 Ueno 7-chome,Taito-k, Tokyo 05, 1100005, JP)

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