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Patent Searching and Data


Title:
METHOD FOR MEASURING SYSTEM CLOCK SIGNAL FREQUENCY VARIATIONS IN DIGITAL PROCESSING SYSTEMS
Document Type and Number:
WIPO Patent Application WO2002069491
Kind Code:
A8
Abstract:
A method for measuring system clock signal frequency variations is disclosed, whereby the number of search operations can be limited to 2log n, where n is the number of elements (signal values) within the sliding window used. A binary tree is used to sort the minimum value. A condition imposed for the binary tree is that the signal values for both the children elements (12,14) are greater than or equal to the signal value for the parent element (10). As such, each element of the binary tree contains a signal value and a flag that indicates which of the two children elements (e.g. 12, 14) contains the smallest signal value. The element at the root (10) of the tree contains the smallest signal value for the entire tree. Whenever a new signal value for an element is retrieved, the new signal value replaces the oldest signal value in the elements involved. The element containing the oldest signal value can be located anywhere in the tree.

Inventors:
ZEE OSCAR
Application Number:
SE0200190W
Publication Date:
March 20, 2003
Filing Date:
February 01, 2002
Export Citation:
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Assignee:
TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
International Classes:
H03H17/02; (IPC1-7): H03H17/02
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