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Patent Searching and Data


Title:
METHOD FOR PLANAR IMPLEMENTATION OF π/8 GATE IN CHIRAL TOPOLOGICAL SUPERCONDUCTORS
Document Type and Number:
WIPO Patent Application WO/2012/021198
Kind Code:
A3
Abstract:
Disclosed herein is a topologically protected π/8-gate which becomes universal when combined with the gates available through quasi-particle braiding and planar quasi- particle interferometry. A twisted interferometer, and a planar π/8-gate in CTS, implemented with the help of the twisted interferometer, are disclosed. Embodiments are described in the context of state X (CTS) supported by an ISH, although the concept of a twisted- interferometer is more general and has relevance to all anionic, i.e. quasiparticle systems.

Inventors:
BONDERSON PARSA (US)
FREEDMAN MICHAEL (US)
NAYAK CHETAN (US)
WALKER KEVIN (US)
FIDKOWSKI LUKASZ (US)
Application Number:
PCT/US2011/037430
Publication Date:
April 19, 2012
Filing Date:
May 20, 2011
Export Citation:
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Assignee:
MICROSOFT CORP (US)
International Classes:
G06N99/00; H01B12/02; H01L39/00
Foreign References:
US6459097B12002-10-01
Other References:
SAU ET AL.: "A Generic New Platform for Topological Quantum Computation usin g Semiconductor Heterostructures", PHYSICAL REVIEW LETTERS, 27 January 2010 (2010-01-27), pages 1 - 5, XP008162539
AKHMEROV ET AL.: "Electrically Detected Interferometry of Majorana Fermions in a Topological Insulator", PHYSICAL REVIEW LETTERS, 28 May 2009 (2009-05-28), pages 1 - 4, XP008162538
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