Title:
METHOD FOR PRODUCING FERROELECTRIC CAPACITORS AND INTEGRATED SEMICONDUCTOR MEMORY CHIPS
Document Type and Number:
WIPO Patent Application WO2002065518
Kind Code:
A3
Abstract:
The invention relates to a method for the production of ferroelectric capacitors structured according to the stack principle, which are used in integrated semiconductor memory chips, wherein the individual capacitor modules (10, 11) have an oxygen barrier (4a, 4b) between a lower capacitor electrode (5a, 5b) and an electrically conductive plug (1a, 1b). At a site where it is not covered by the corresponding oxygen barrier (4a, 4b), an unstructured adhesive layer (3) is oxidized by the oxygen arising during the tempering process of the ferroelectric (6a, 6b) and forms insulating segments at said site in such a way that the lower capacitor electrodes (5a, 5b) of the ferroelectric capacitors (10, 11) are electrically insulated from one another. This makes it possible to eliminate the structuring step of the adhesive layer (3). Furthermore, said layer (3) serves as a getter of oxygen and inhibits the diffusion of oxygen to the plug.
Inventors:
KASKO IGOR (DE)
KROENKE MATTHIAS (DE)
MIKOLAJICK THOMAS (DE)
KROENKE MATTHIAS (DE)
MIKOLAJICK THOMAS (DE)
Application Number:
PCT/DE2001/004790
Publication Date:
November 21, 2002
Filing Date:
December 18, 2001
Export Citation:
Assignee:
INFINEON TECHNOLOGIES AG (DE)
KASKO IGOR (DE)
KROENKE MATTHIAS (DE)
MIKOLAJICK THOMAS (DE)
KASKO IGOR (DE)
KROENKE MATTHIAS (DE)
MIKOLAJICK THOMAS (DE)
International Classes:
H01L21/02; H01L27/105; H01L21/768; H01L21/8246; H01L27/115; H01L27/11502; H01L27/11507; (IPC1-7): H01L21/02
Foreign References:
| US5930659A | 1999-07-27 | |||
| DE19926501A1 | 2000-12-21 | |||
| EP0920054A1 | 1999-06-02 | |||
| US6168991B1 | 2001-01-02 | |||
| EP0911871A2 | 1999-04-28 |
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