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Title:
A METHOD FOR PRODUCING A REDUCED REVERSE LEAKAGE CURRENT TRENCHED SCHOTTKY DIODE
Document Type and Number:
WIPO Patent Application WO/2015/084155
Kind Code:
A1
Abstract:
The method comprises forming a trench structure (100), forming a gate electrode inside the trench through gate oxidation (200); forming a polysilicon gate (300); forming a pre-metal dielectric layer (400); forming a polysilicon recess (1000) in the polysilicon gate; depositing a transitional metal layer (450); forming metal silicide layer (500) through rapid thermal annealing; conducting chemical cleaning to remove unreacted metallic layer on the gate oxide (2000) and conducting second thermal rapid annealing (3000).

Inventors:
MOHD ROFEI MAT HUSSIN (MY)
SHARAIFAH KAMARIAH WAN SABL (MY)
Application Number:
PCT/MY2014/000201
Publication Date:
June 11, 2015
Filing Date:
June 30, 2014
Export Citation:
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Assignee:
MIMOS BERHAD (MY)
International Classes:
H01L21/329; H01L29/47; H01L29/872
Foreign References:
US20100207205A12010-08-19
US20050062124A12005-03-24
US20050127465A12005-06-16
Other References:
KERN W: "THE EVOLUTION OF SILICON WAFER CLEANING TECHNOLOGY", JOURNAL OF THE ELECTROCHEMICAL SOCIETY, ELECTROCHEMICAL SOCIETY, vol. 137, no. 6, 1 June 1990 (1990-06-01), pages 1887 - 1892, XP000570485, ISSN: 0013-4651
Attorney, Agent or Firm:
NORUNNUHA, Nawawi (No.17-2 Jalan Medan Pusat 2dPersiaran Bangi,Bandar Baru Bang, Selangor ., MY)
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Claims:
Claims

[Claim 1] A method for producing a reduced reverse leakage current trench

Schottky diode comprising:

forming a trench structure (100);

forming a gate electrode inside the trench through gate oxidation (200); forming a poly silicon gate (300);

forming a pre-metal dielectric layer (400);

depositing a transitional metal layer (450);

forming metal silicide layer (500) through rapid thermal annealing; depositing thick metal (600); and

forming ohmic contact (700);

characterised in that

a method for reducing leakage current is incorporated in the method for producing the trench Schottky diode, wherein the method for reducing leakage current further comprising:

forming a polysilicon recess (1000) after the step of forming the pre- metal dielectric layer (400);

conducting chemical cleaning to remove unreacted metallic layer on the gate oxide (2000) after the step of forming metal silicide layer (500); and

conducting second thermal rapid annealing (3000) after removing the unreacted metallic layer on the gate oxide.

[Claim 2] A method for producing a reduced reverse leakage current trench

Schottky diode as claimed in Claim 1, wherein the removal of the unreacted metallic layer on gate electrode and active region is done via

RCA cleaning process.

[Claim 3] A method for producing a reduced reverse leakage current trench

Schottky diode as claimed in Claim 1, wherein the step of forming a polysilicon recess (1000) further comprising:

etching the pre-metal dielectric layer using dry etch which allows about 0.20 μιη polysilicon recess inside the trench.

[Claim 4] A product produced by a process of Claim 1, wherein a trench Schottky diode produced is capable ofreducing the electric field crowding at the top corner of trench.

[Claim 5] A product produced by a process of Claim 1, wherein a trench Schottky diode produced having a thinner metal silicide layer at the active regions of the wafer which reduces leakage current significantly thus improving the diode characteristics.

Description:
Description

Title of Invention: A METHOD FOR PRODUCING A REDUCED REVERSE LEAKAGE CURRENT TRENCHED SCHOTTKY

DIODE

[ 1 ] FIELD OF INVENTION

[2] The present invention relates to a method of producing a trench Schottky diode with low reverse leakage current.

[3] BACKGROUND OF THE INVENTION

[4] Schottky diodes are widely used in power applications since their forward voltage drop is low as compared to PN junction diode. These devices have fast recovery times and useful for high frequency rectification. Prior art US20120205772 for example relates to A trench Schottky diode and a manufacturing method thereof are provided. A plurality of trenches are formed in a semiconductor substrate. A plurality of doped regions are formed in the semiconductor substrate and under some of the trenches. A gate oxide layer is formed on a surface of the semiconductor substrate and the surfaces of the trenches. A polysilicon structure is formed on the gate oxide layer. Then, the polysilicon structure is etched, so that the gate oxide layer within the trenches is covered by the polysilicon structure. Then, a mask layer is formed to cover the polysilicon structure within a part of the trenches and a part of the gate oxide layer, and the semiconductor substrate uncovered by the mask layer is exposed. Afterwards, a metal sputtering layer is formed to cover a part of the surface of the semiconductor substrate.

[5] It is known that Schottky diodes tend to have poor reverse leakage characteristics.

Methods to improve the leakage characteristics in the prior art have typically caused significant increase in size of schottky diode and decrease the area efficiency.

[6] Thus, it is desirable to find alternative approaches for improving the reverse leakage characteristics of Schottky diodes. Therefore it is a need for an invention that can tackle those drawbacks.

[7] SUMMARY OF THE INVENTION

[8] According to an aspect of the present invention, the present invention provides

amethod for producing a reduced reverse leakage current trench Schottky diode comprising: forming a trench structure (100); forming a gate electrode inside the trench through gate oxidation (200); forming a polysilicon gate (300); forming a pre-metal dielectric layer (400); depositing a transitional metal layer (450); forming metal silicide layer (500) through rapid thermal annealing; depositing thick metal (600); and forming ohmic contact (700); characterised in that a method for reducing leakage current is in- corporated in the method for producing the trench Schottky diode. The method for reducing leakage current further comprising: forming a polysilicon recess (1000) after the step of forming the pre-metal dielectric layer; conducting chemical cleaning to remove unreacted metallic layer on the gate oxide (2000) after the step of forming metal silicide layer (500); and conducting second thermal rapid annealing (3000) after removing the unreacted metallic layer on the gate oxide.

[9] The process involves removing of unreacted metallic layer on gate oxide at the top corner of trench area and reducing the metal barrier thickness by chemical cleaning process after metal silicidation. Second rapid thermal annealing is required in the process to improve the resistivity of the metal silicide layer. There is no extra masking step required for this process.

[10] BRIEF DESCRIPTION OF THE DRAWINGS

[11] Figure lillustrates a flowchart of a method for producing a trench Schottky diode with a method for reducing leakage current of the present invention.

[12] Figure 2illustrates a pictorial flowchart of a method for producing a trench Schottky diode with a method for reducing leakage current of the present invention.

[13] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

[14] Generally, the present invention relates to a method for producing a reduced reverse leakage current trench Schottky diode comprising: forming a trench structure (100); forming a gate electrode inside the trench through gate oxidation (200); forming a polysilicon gate (300); forming a pre-metal dielectric layer (400); depositing a transitional metal layer (450); forming metal silicide layer (500) through rapid thermal annealing; depositing thick metal (600); and forming ohmic contact (700); characterised in that a method for reducing leakage current is incorporated in the method for producing the trench Schottky diode.

[15] The method for reducing leakage current further comprising: forming a polysilicon recess (1000) after the step of forming the pre-metal dielectric layer; conducting chemical cleaning to remove unreacted metallic layer on the gate oxide (2000) after the step of forming metal silicide layer (500); and conducting second thermal rapid annealing (3000) after removing the unreacted metallic layer on the gate oxide.

[16] The removal of the unreacted metallic layer on gate electrode and active region is done via Radio Corporation of America (RCA) cleaning process. The flowchart of the methods above is illustrated in Figure 1 and depicted graphically in Figure 2.

[17] The present invention is a new method of reducing leakage current in trench

Schottky diode whereby the unreacted metallic layer is removed from the top corner of trench gate oxide area and the transitional metal layer thickness is reduced. The present invention provides a use of chemical cleaning process after first rapid thermal annealing in order to remove the unreacted metallic layer from gate oxide on the top comer of the trench structure before second rapid thermal annealing being done to improve the metal silicide layer resistivity. By removing the unreacted metallic layer on gate oxide on the top corner of the trench, it helps to reduce the leakage current.

[18] The process begins with creating a special trench gate electrode structure by forming a polysilicon recess (1000) after the step of forming the pre-metal dielectric layer to form a proper platform for transitional metal deposition. Once pre-metal dielectric layer (PMD) is deposited, contact pattern was formed. PMD layer is then etched using dry etch which allows about 0.20 μιη poly recess inside the trench. The gas combination used during the final dry etching gives an etch rate of Si02: Poly ratio of 1-2: 1. This etch ratio provides good topography of Si surface and oxide at the gate electrode ensuring no structure damage at the top trench area. The gate electrode comprises of conductor layer and dielectric layer. The conductor layer is formed of polysilicon and the dielectric layer is formed of silicon dioxide. The typical thickness of the silicon dioxide is within the range of 700A to 1700A.

[19] The next process is the depositing of a thin transitional metal layer (450) over fully formed and patterned trench Schottky diode structure (wafer). The wafer is then heated through rapid thermal annealing, allowing the transitional metal to react with exposed silicon in the active regions of the Schottky diode forming a low-resistance transitional metal silicide (500). The transitional metal does not react with the silicon dioxide nor the silicon nitride insulators present on the wafer. Following the reaction, the unreacted metallic layer on gate oxide is selectively removed by chemical cleaning (2000) followed by conducting second thermal rapid annealing (3000) before depositing thick metal (600) and forming ohmic contact (700) at the wafer. This process also causes thinning of metal silicide layer at the active regions of the wafer. The present invention can reduce leakage current significantly thus improving the diode characteristics.

[20] The above statement is further described as follows. Once Ti/TiN layer was

sputtered, TiSi2 is formed through rapid thermal annealing. The unreacted Ti and TiN is then removed by wet etching using RCA solution, leaving no Ti and TiN at the gate oxide at trench. The remaining TiSi2 would be then annealed again, before another wet etching takes place to make sure the complete removal of unreacted Ti and TiN layer at the gate oxide at the trench. The sheet resistance of the TiSi2 layer is lower than the standard process (silicide) and the thin TiSi2 layer at the trench corner contributes to the reduction of IR. Aluminium atoms diffused into mesa region through the thin TiSi2 layer and reduced the electric field crowding at the top corner of the trench. It creates aluminum to silicon interface layer at the top corner of mesa region as well, resulting the low leakage current as the aluminium has lower metal work function.

[21] Although the invention has been described with reference to particular embodiment, it is to be understood that the embodiment is merely illustrative of the principles and applications of the present invention. It is therefore to be understood that numerous modifications may be made to the illustrative embodiment that other arrangements may be devised without departing from the scope of the present invention as defined by the appended claims.