Title:
METHOD FOR RESIST PATTERN FORMATION, PROCESS FOR PRODUCING CIRCUIT BOARD, AND CIRCUIT BOARD
Document Type and Number:
WIPO Patent Application WO/2007/132533
Kind Code:
A1
Abstract:
This invention provides a method for resist pattern formation, for use in the
preparation of a circuit board having landless or narrow-land-width throughholes
that realize increased density in a circuit board, a process for producing a circuit
board, and a circuit board. The method for resist pattern formation comprises
the step of forming a resin layer and a mask layer on a first plane of a board having
throughholes and the step of feeding a resin layer removing liquid from a second
plane, which is opposite to the first plane of the board, to remove the resin layer
on the throughholes and the peripheries of the throughholes in the first plane.
There are also provided a process for producing a circuit board using the method
for resist pattern formation, and a circuit board.
Inventors:
KANEDA YASUO
IRISAWA MUNETOSHI
TOYODA YUJI
KOMURO TOYOKAZU
FUKASE KATSUYA
SAKAI TOYOAKI
IRISAWA MUNETOSHI
TOYODA YUJI
KOMURO TOYOKAZU
FUKASE KATSUYA
SAKAI TOYOAKI
Application Number:
PCT/JP2006/309851
Publication Date:
November 22, 2007
Filing Date:
May 17, 2006
Export Citation:
Assignee:
MITSUBISHI PAPER MILLS LTD (JP)
SHINKO ELECTRIC IND CO (JP)
KANEDA YASUO
IRISAWA MUNETOSHI
TOYODA YUJI
KOMURO TOYOKAZU
FUKASE KATSUYA
SAKAI TOYOAKI
SHINKO ELECTRIC IND CO (JP)
KANEDA YASUO
IRISAWA MUNETOSHI
TOYODA YUJI
KOMURO TOYOKAZU
FUKASE KATSUYA
SAKAI TOYOAKI
International Classes:
H05K3/42; H05K3/06; H05K3/18
Domestic Patent References:
WO2005086552A1 | 2005-09-15 |
Foreign References:
JPH0462893A | 1992-02-27 | |||
JPH077265A | 1995-01-10 | |||
JPH0199282A | 1989-04-18 | |||
JP2006135301A | 2006-05-25 | |||
JP2006173597A | 2006-06-29 |
Attorney, Agent or Firm:
TSUKUNI, Hajime (22-12 Toranomon 1-chom, Minato-ku Tokyo 01, JP)
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