Title:
A METHOD AND SYSTEM FOR TESTING SEMICONDUCTOR DEVICES
Document Type and Number:
WIPO Patent Application WO2006068936
Kind Code:
A3
Abstract:
A semiconductor device tester includes a parametric measurement unit (PMU) stage for producing a DC test signal and a pin electronics (PE) stage for producing an AC test signal to test a semiconductor device. A driver circuit is capable of providing a version of the DC test signal and a version of the AC test signal to the semiconductor device.
Inventors:
WALKER ERNEST P (US)
SARTSCHEV RONALD A (US)
SARTSCHEV RONALD A (US)
Application Number:
PCT/US2005/045605
Publication Date:
September 08, 2006
Filing Date:
December 16, 2005
Export Citation:
Assignee:
TERADYNE INC (US)
WALKER ERNEST P (US)
SARTSCHEV RONALD A (US)
WALKER ERNEST P (US)
SARTSCHEV RONALD A (US)
International Classes:
G01R31/26
Foreign References:
| US6836136B2 | 2004-12-28 | |||
| US6574760B1 | 2003-06-03 | |||
| US4947106A | 1990-08-07 | |||
| US6028439A | 2000-02-22 | |||
| US6804620B1 | 2004-10-12 |
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