Description

METHOD AND SYSTEM FOR TRANSMITTING AND

RECEIVING SIGNALS

Technical Field

[1] The present application claims the benefit of priority under 35 U.S.C. 119 of U.S. provisional patent application No. 60/973,418 filed on Sep. 18, 2007, which is hereby expressly incorporated by reference.

[2] The present invention relates to a method of efficiently transmitting and receiving signals and efficient transmitter and receiver for an OFDM (Orthogonal Frequency Division Multiplexing) system including a TFS (Time-Frequency Slicing). Background Art

[3] TFS (Time Frequency Slicing) technique has been introduced for broadcasting.

When a TFS is used, a single service can be transmitted through multiple RF (Radio Frequency) channels on a two-dimensional time-frequency space.

[4] OFDM (Orthogonal Frequency Division Multiplexing) is a frequency-division multiplexing (FDM) scheme utilized as a digital multi-carrier modulation method. A large number of closely-spaced orthogonal sub-carriers are used to carry data. The data are divided into several parallel data streams or channels, one for each sub-carrier. Each sub-carrier is modulated with a conventional modulation scheme (such as quadrature amplitude modulation or phase shift keying) at a low symbol rate, maintaining total data rates similar to conventional single-carrier modulation schemes in the same bandwidth.

[5] OFDM has developed into a popular scheme for wideband digital communication, whether wireless or over copper wires, used in applications such as digital television and audio broadcasting, wireless networking and broadband internet access.

[6] When TFS, which uses multiple RF bands for each transmitter is combined with

OFDM, frequency diversity gain and statistical multiplexing gain can be obtained, thus, resources can be efficiently utilized. Disclosure of Invention

Technical Problem

[7] It is, therefore, an object of the present invention to provide a method of efficiently transmitting and receiving signals and efficient transmitter and receiver for an OFDM system including TFS.

Technical Solution [8] One of the embodiments of the present invention provides a method of efficiently using LDPC code as an inner code for a TFS system and an efficient inner interleaving

method when hybrid modulation is used. Another embodiment of the present invention provides, for a case where DVB-S2 LDPC code is used as FEC, using new codeword for convolutional interleaving by using puncturing/shortening. Yet another embodiment of the present invention provides method of using dummy padding without loss of performance.

[9] According to an aspect of the present invention, there is provided a method of transmitting signals for an OFDM (Orthogonal Frequency Division Multiplexing) system including TFS (Time Frequency Slicing), comprising: encoding frames made of bitstreams; performing a modulation to transform the encoded frames into symbols; performing a puncturing and a shortening on the symbols such that the symbols have lengths of two consecutive integers multiplied by at least one integer; and encoding the puncturing and the shortening performed symbols into a multiple signal or a single signal.

[10] According to another aspect of the present invention, there is provided a receiver for an OFDM system including, comprising: a demodulator configured to transform received signals into OFDM symbols; a frame parser configured to perform modulation to transform the OFDM symbols into bitstreams; and a BICM(Bit-Interleaved Coding and Modulation) decoder configured to deinterleave the bitstreams through performing a zero padding on an information part of the bitstreams and performing a parity depuncturing on a parity part of the bitstreams.

[11] According to yet another aspect of the present invention, there is provided a method of receiving signals for an OFDM system including TFS comprising: transforming received signals into OFDM symbols; performing modulation to transform the OFDM symbols into bitstreams; and deinterleaving the bitstreams through performing a zero padding on an information part of the bitstreams and performing a parity depuncturing on a parity part of the bitstreams.

[12] It is to be understood that both the foregoing general description and the following detailed description of the present invention are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.

[13] Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objectives and other advantages of the invention may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.

Advantageous Effects

[14] According to the present invention, it is possible to provide a method of efficiently

transmitting and receiving signals and efficient transmitter and receiver for an OFDM system including TFS.

Brief Description of the Drawings

[15] The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principle of the invention. In the drawings:

[16] Fig. 1 is a block diagram of an example of a TFS (Time Frequency Slicing)-OFDM

(Orthogonal Frequency Division Multiplexing) transmitter.

[17] Fig. 2 is a block diagram of an example of the input processor shown in the Fig. 1.

[18] Fig. 3 is a block diagram of an example of the BICM (Bit-Interleaved Coding and

Modulation) shown in Fig. 1.

[19] Fig. 4 shows an example of LDPC encoding using shortening / puncturing.

[20] Fig. 5 is a block diagram of an example of the Frame Builder shown in Fig. 1.

[21] Fig. 6 is a table of an example of a hybrid modulation ratio when an LDPC block length is 64800 bits.

[22] Fig. 7 is a table of an example of a hybrid modulation ratio when an LDPC block length is 16200 bits.

[23] Fig. 8 is a block diagram of an example of the QAM mapper shown in Fig. 1.

[24] Fig. 9 is a block diagram of an example of the QAM mapper combined with an inner encoder and an inner interleaver.

[25] Fig. 10 is an example of a bit interleaver.

[26] Fig. 11 is a table of an example of the bit interleaver when an LDPC block length is

64800 bits.

[27] Fig. 12 is a table of an example of the bit interleaver when an LDPC block length is

16200 bits.

[28] Fig. 13 is an example of the demux shown in Fig. 1.

[29] Fig. 14 is another example of the demux shown in Fig. 1.

[30] Fig. 15 is a relationship between an input bitstream of the bit interleaver and an output bitstream of the demux.

[31] Fig. 16 is an example of a QAM symbol mapping.

[32] Fig. 17 shows an example of a timer interleaver.

[33] Figs. 18 and 19 show an example of a convolutional interleaving.

[34] Fig. 20 shows an example of a time interleaver and a TFS frame builder.

[35] Fig. 21 is a block diagram of an example of the MIMO/MISO decoder shown in Fig.

1.

[36] Fig. 22 is a block diagram of an example of the modulator, specifically an example

of an OFDM modulator.

[37] Fig. 23 is a block diagram of an example of the analog processor shown in Fig. 1.

[38] Fig. 24 is a block diagram of an example of a TFS-OFDM receiver.

[39] Fig. 25 is a block diagram of an example of the AFE (Analog Front End) shown in

Fig. 24.

[40] Fig. 26 is a block diagram of an example of the demodulator, specifically an OFDM demodulator.

[41] Fig. 27 is a block diagram of an example of the MIMO/MISO decoder shown in Fig.

24.

[42] Fig. 28 is a block diagram of an example of the frame parser shown in Fig. 24.

[43] Fig. 29 is a block diagram of an example of the QAM demapper shown in Fig. 28.

[44] Fig. 30 is a block diagram of an example of the QAM demapper combined with an inner deinterleaver.

[45] Fig. 31 shows a time deinterleaver.

[46] Fig. 32 shows a time deinterleaver.

[47] Fig. 33 is a block diagram of an example of the BICM decoder shown in Fig. 24.

[48] Fig. 34 shows an example of LDPC decoding using padding /depuncturing.

[49] Fig. 35 is a block diagram of an example of the output processor shown in Fig. 24.

Best Mode for Carrying Out the Invention

[50] Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts.

[51] Fig. 1 shows an example of proposed TFS (Time Frequency Slicing)-OFDM

(Orthogonal Frequency Division Multiplexing) transmitter. A multiple MPEG2-TS (Transport Stream) and a multiple Generic stream can be inputted into a TFS transmitter. The input processor (101) can split the inputted streams into a multiple output signals for a multiple PLP (Physical Layer Path). The BICM (Bit-Interleaved Coding and Modulation) (102) can encode and interleave the PLP individually. The frame builder (103) can transform the PLP into total R of RF bands. MIMO (Multiple-Input Multiple- Output)/MIS O (Multiple-Input Single- Output) (104) technique can be applied for each RF band. Each RF band for each antenna can be individually modulated by the modulator (105a, b) and can be transmitted to antennas after being converted to an analog signal by the analog processor (106a, b).

[52] Fig. 24 shows an example of a TFS-OFDM receiver. When total R of RF bands are used for TFS system, received signals by AFE (Analog Front End) (801a,b) can be demodulated by demodulators (802a,b), then can be decoded by MIMO/MISO Decoder

(803) to obtain diversity gain. Frame parser (804) can restore multiple PLP signals from received TFS frame. BICM decoder (805) can correct errors in a transmission channel. Finally, output processor (806) can restore signals according to necessary format.

Mode for the Invention

[53] Fig. 2 is an example of the input processor. MPEG-TS (Transport Stream) can be multiplexed into a single output through TS-MUX (201a) and Generic streams (Internet protocol) can be transformed into a single output through GSE (General Stream Encapsulation) (201b). Each output from the TS-MUX and GSE can be split for multiple services by the service splitter (202a, b). PLP is a processing of each service. Each PLP can be transformed into a frame by the BB (Baseband) Frame (103a~d).

[54] Fig. 3 is an example of the BICM. The Outer encoder (301) and the inner encoder

(303) can add redundancy for error correction in a transmission channel. The outer in- terleaver (302) and the inner interleaver (304) can interleave data randomly to mitigate burst errors.

[55] Fig. 4 shows an example of an LDPC encoding using shortening / puncturing. First, shortening process is performed on input blocks having having number of bits smaller than required number of bits for LDPC encoding. Zeros as many as bits required for LDPC encoding can be padded (301a). Zero Padded input bitstreams can have parity bit through LDPC encoding (302a). At this point, among output bitstreams, for bitstreams corresponding to original input bitstreams, padded zeros can be removed (303a) and for generated parity bit streams, puncturing can be performed according to code-rate (304a). These bit streams can be outputted after being multiplexed (305a) in order of data bit streams and parity bit streams.

[56] Fig. 5 is an example of the frame builder. QAM mapper (401a, b) can transform inputted bits into QAM symbols. Hybrid QAM can be used. Time domain interleaver (402a, b) can interleave data in time domain to make the data be robust against burst error. At this point, an effect of interleaving many RF bands can be obtained in a physical channel because the data are going to be transmitted to a multiple RF bands. TFS frame builder (403) can split inputted data to form TFS frames and send the TFS frames to total R of RF bands according to a TFS scheduling. Each RF band can be individually interleaved in frequency domain by frequency domain interleaver (404a, b) and can become robust against frequency selective fading. Ref (Reference Signals), PL (Physical Layer) signaling, and pilots can be inserted when the TFS frame is built (405).

[57] By hybriding two Even-QAMs, which transmits even number of bits per QAM

symbol, an Odd-QAM, which transmits odd number of bits per QAM symbol can be formed by a Hybrid QAM mapper. For example, hybrid 128-QAM can be obtained by hybriding 256-QAM and 64-QAM, hybrid 32-QAM can be obtained by hybriding 64-QAM and 16-QAM, and hybrid 8-QAM can be obtained by hybriding 16-QAM and 4-QAM.

[58] Figs. 6 and 7 show examples of a hybrid ratio when DVB-S2 LDPC (Low Density

Parity Check) code is used as an inner code. The first column on the table represents constellation type. HOQ (Higher-Order QAM) ratio represents a ratio for higher-order QAM between two QAM types. LOQ (Lower-Order QAM) ratio is 1-HOQ ratio. Hybrid QAM can be obtained by two adjacent Even-QAMs. For example, hybrid 128-QAM (bit/cell=7) is obtained by hybriding 256-QAM and 64-QAM. HOQ bits and LOQ bits represent number of bits used for mapping into HOQ symbol and LOQ symbol respectively in one LDPC block. HOQ symbols and LOQ symbols represent number of symbols after symbol mapping. Total symbol is a sum of the HOQ symbols and the LOQ symbols. The last column on the table represents effective number of bits transmitted per QAM symbol. As seen on the table, only Hybrid 128-QAM shows a slight difference from 7 bit/cell.

[59] Fig. 7 shows a case when LDPC block length is 16200 bits. When a scheduling is performed to evenly distribute QAM symbols, which are generated by the Frame Builder, to RF bands of TFS system, the value of the total symbols should be divisible by a least common multiple of each index number of RF band. For example, if six RF bands are allowed, then the value of total symbols on the table should be divisible by a least common multiple of 1 through 6, i.e., 60. For the case shown in Fig. 6, it is divisible. However, for the case shown in Fig. 7, it is not divisible. If LDPC block length is 16200 bits as shown in Fig. 7, the total symbols on the table can be made divisible by 60 by combining four of the LDPC blocks into a single LDPC block having a length of 64800 as in Fig. 6.

[60] Convolution interleaver can be used as an example of the time interleavers (402,

402b) shown in Fig. 5. Interleaver depth is L*(L-1)*M for a case where a number of delay branch is L and a length of basic delay element is M. At this point, to be able to perform a convolutional interleaving on LDPC encoded and QAM mapped (401a, 401b) symbol streams, a length of the symbol stream corresponding to an LDPC block should be a multiple of L*(L- 1).

[61] However, for a system where 4/16/64/256-QAM mappings are applied to an LDPC code using n = 64800bits or 16200 bits, 16200/8 is 2025 symbols, which is not a multiple of two consecutive integers. Further, even for a case where hybrid modulation is used, a symbol stream having a length of multiple of L* (L-I) may not be obtained.

[62] For such a case, a new LDPC code can be made by performing puncturing/shortening

such that n have 1440*44=63360 bits or 1440*10=14400 bits. Then, 1440 is 48*6*(6-l). Thus, a symbol stream having a length of multiple of two consecutive integers can be obtained.

[63] In addition, as shown in Figs. 6 and 7 where a hybrid modulation is used, HOQ ratio=13/22 and LOQ ratio=9/22 can be used for hyb 128-QAM and hyb 32-QAM, and HOQ ratio=2/3 and LOQ ratio=l/3 can be used for hyb 8-QAM. Then, convolutional interleaver can be implemented for every even QAM and hybrid QAM while satisfying length condition of integer multiples of L*(L-1).

[64] For a receiver side, the original codeword length according to the puncturing/ shortening scheme can be restored, then LDPC decoding can be performed. If a convolutional interleaver where a single LDPC block is interleaved for two TFS frames can be defined as a basic convolutional interleaver (BCI) and if a number of LDPC blocks transmitted to TFS frame is N, then a final convolutional interleaver can be implemented by using total N of the BCI having the BCI as a basic unit.

[65] For such a case, each LDPC block can be assigned to a single BCI, thus, convolutional interleaver can be implemented without extra dummy padding. Total N of BCI output symbols can be multiplexed to form the final convolutional interleaver output. For a receiver side, symbols can be demultiplexed into N convolutional deinterleaver corresponding to BCI, a single output can be outputted by combining the number of LDPC blocks transmitted to the TFS frame.

[66] As another example, instead of the puncturing/shortening, dummy padding can be performed to convolutional interleaving input symbols such that a length become a multiple of L*(L-1). For this case, a receiver can perform a deinterleaving and then remove a predetermined number of dummy symbols. One of the advantages of this method can be no loss in performance because of not performing puncturing/ shortening to the original LDPC code.

[67] Fig. 8 shows an example of QAM mapper using hybrid modulation. Bit stream parser(c-401) can parse inputted bitstreams into HOQ mapper(c-402a) and LOQ mapper(c-402b). The symbol merger(c-403) can merge the two inputted symbol streams into a single symbol stream. FEC (Forward Error Correction) block merger (c-404), for example, can combine four of bit symbol blocks having a length of 16200 into a single block having a length of 64800.

[68] Fig. 9 shows an example of QAM mapper combined with inner interleavers.

Bitstreams can be divided by bitstream parser (d-402) into bitstreams for HOQ and LOQ mappers. Each bitstream goes through bit interleaving (d-403a, d-403b) and demux (d-404a, d-404b) processes. Throughout these processes, characteristics of LDPC codeword and constellation reliability can be combined. Each output can be converted into symbolstreams by the HOQ and LOQ mappers (d-405a, d-405b), then

merged into a single symbols tream by the symbol merger (d-406).

[69] Fig. 10 shows an example of bit interleaving. Bits can be saved into a matrix type memory having columns and rows in the direction of column or in the direction of the blue arrow. Then the saved bits can be read out in the direction of row or in the direction of the red arrow. Figs. 11 and 12 show numbers of columns and rows of HOQ bit interleaver (d-403a) and LOQ bit interleaver (d-403b) according to QAM modulation type. As seen in the tables, when a typical even-QAM is used but a hybrid modulation is not used, only HOQ interleaving is used.

[70] Fig. 13 shows an example of the demux. It shows that interleaved outputs according to QPSK, 16-QAM, 64-QAM, and 256-QAM can be demultiplexed and mapped. It also shows that the numbers of output bitstreams from demuxs are 2, 4, 6, and 8 respectively.

[71] Details of the demux operation are shown in Fig. 14. As seen in the figure, output order of interleaver can be changed by demux. For example, for the case of 16-QAM, bitstreams can be outputted as j-th output bits tream of each demux according to a value resulting from performing an modulo-4 operation on index of input bitstream b. Fig. 14 shows a relationship between a value resulting from a modulo operation and demux output branch index j.

[72] Fig. 15 shows a relationship between an input bitstream of bit interleaver and an output bitstream of demux. As seen in the equations, dividing index of input bitstream by 2, 4, 6, and 8 is a result by the interleaving and mapping each index to index of output bitstream is a result by the demux.

[73] Fig. 16 shows an example of QAM symbol mapping. Output bitstream of demux can be converted into symbolstream by using Gray mapping rule. Even if it is not shown, it can be extended to constellation of 256-QAM or more.

[74] Fig. 17 shows an example of a timer interleaver. For the inputted QAM symbols, the

Dummy symbol generator (40Ij) can generate dummy symbols such that a number of symbols in a TFS frame become a multiple of L*(L-1). In addition, the multiplexer (402j) can perform padding to the QAM symbols. After this adjustment of number of input symbols, interleaving can be performed by the Convolutional interleaver (403j).

[75] Figs. 18 and 19 show an example of a convolutional interleaving. Using a convolutional interleaver in a TFS system where a multiple of RF bands are used may cause a decrease in frequency diversity gain. Figs. 18 and 19 show such a case. For simplification, a convolutional interleaving which uses four RF bands, FEC block composed of twenty symbols, four branches, and five for a length of elements is exemplified. Represents as (a) are source symbols. If necessary, by performing zero padding to the (a), (b) can be obtained which fills TFS frame length. By performing interleaving to the (b), (c) can be obtained. At this point, for the (n+l)th frame, by excluding padded

zeros and outputting only source symbols, (d) can be obtained. By assigning the outputted symbols sequentially to RF0-RF3, (e) can be finally outputted. For the RF bands where green and yellow colored FEC blocks are assigned, it can be seen that the blocks are not evenly distributed for the all four RF bands, but the blocks are more assigned for certain RF bands than other RF bands. Consequently, frequency diversity gain can be lowered.

[76] Fig. 20 shows an example of a time interleaver and a TFS frame builder. Specifically,

Fig. 20 shows a case where a typical convolutional interleaver is implemented and a possible solution to a decrease in frequency diversity gain. As a solution to a decrease in frequency diversity gain, convolutional interleaving unit (CIU) can be used for each RF band and by doing this, for a single FEC block, a same number of symbol can be assigned to each RF band. Thus, even if convolutional interleaver is used in TFS system, decrease in frequency diversity gain can be prevented. The inputted symbols are sequentially inputted to total R of CIUs (4021-4011) which are assigned to total R of RF bands by the switching (4011). Total R of CIUs (4021-4041) can have a same structure as typical convolutional interleaver and can perform interleaving to the inputted symbols. At this point, the final outputs can be transmitted to TFS frame builder and the frame builder should perform a scheduling such that, for all PLPs, symbols assigned to a same RF band can be transmitted to the same RF band.

[77] Fig. 21 shows an example of MIMO/MISO Encoder. MIMO/MISO Encoder (501) applies MIMO/MISO method to obtain an additional diversity gain or payload gain. MIMO/MISO Encoder can output signals for total A of antennas. MIMO encoding can be performed individually on total A of antenna signals for each RF band among total R of RF bands. A is equal to or greater than 1.

[78] Fig. 22 shows an example of a modulator, specifically an example of an OFDM modulator. PAPR (Peak- to- Average Power Ratio) reduction 1 (601) can be performed on Antenna (m) signals of RF (n) bands. IFFT (602) can be performed for OFDM demodulation. PAPR reduction 2 (603) can be performed after the IFFT. ACE (Active Constellation Extension) and a tone reservation can be used for the PAPR reduction 2 (603). Lastly, guard interval (604) can be inserted.

[79] Fig. 23 shows an example of the analog processor. Output of each modulator can be converted to an analog-domain signal by a DAC (Digital to Analog Conversion) (701), then can be transmitted to antenna after up-conversion (702). Analog filtering (703) can be performed.

[80] Fig. 24 shows an example of a TFS-OFDM receiver. When total R of RF bands are used for TFS system, received signals by AFE (Analog Front End) (801a,b) can be demodulated by demodulators (802a,b), then can be decoded by MIMO/MISO Decoder (803) to obtain diversity gain. Frame parser (804) can restore multiple PLP signals

from received TFS frame. BICM decoder (805) can correct errors in a transmission channel. Finally, output processor (806) can restore signals according to necessary format.

[81] Fig. 25 shows an example of an AFE (Analog Front End). FH (Frequency

Hopping)-tuner (901) can perform a frequency hopping and tune signals according to inputted RF center frequency. After down-conversion (902), signals can be converted to digital signals by ADC (Analog to Digital Conversion) (903).

[82] Fig. 26 shows an example of a demodulator, specifically an OFDM demodulator.

TFS detector (1001) can detect TFS signals in a received digital signal. TFS sync

(1002) can synchronize in time and frequency domains. After GI (Guard Interval)

(1003) is removed, symbols in frequency domain can be obtained by performing FFT

(1004) for OFDM demodulation. Channel Estimation (1005) can estimate distortion in a transmission channel based on pilot signals. Based on the estimated distortion, Channel Equalization (1006) can compensate distortion in the transmission channel. Finally, PL (Physical Layer) signaling information can be extracted from equalized data and can be transmitted to a system controller.

[83] Fig. 27 shows an example of MIMIO/MISO decoder. Diversity and multiplexing gain can be obtained from data received from total B of antennas. For MIMO, B is greater than 1. For MISO, B is 1.

[84] Fig. 28 shows an example of a Frame parser. Total R of the inputted RF bands data can undergo frequency deinterleaving (1201a, b), then can be reconstructed into datastream by TFS frame parser for each PLP (Physical Layer Path) according to a TFS scheduling. For each PLP, input data for BICM decoder can be obtained by using time domain deinterleaver (1203a, b) and QAM demapper (1204a, b). At this point, hybrid QAM demapper can be used as the QAM demapper.

[85] Fig. 29 shows an example of performing a QAM demapper, which is a counterpart of

Fig. 8 of transmitter. FEC block splitter can split inputted symbol block unit having 64800 bits into four symbol blocks of 16200 bits when short DVB -S2 LDPC mode is used. Symbol splitter (a- 1202) can split inputted symbol streams into two symbol streams for HOQ and LOQ demapper. HOQ demapper (a- 1203a) and LOQ demapper (a- 1203b) can perform HOQ and LOQ demapping respectively. Bitstream merger (a- 1204) can merge two inputted bit streams into a single output bitstream.

[86] Fig. 30 shows an example of a QAM demapper combined with inner deinterleavers which are counterparts of Fig. 9 of transmitter. For each PLP, symbol splitter (b-1201) can split output of time domain deinterleaver into two symbol streams for HOQ and LOQ demappers. HOQ and LOQ Demapper (b- 1202a, b- 1202b) can convert sym- bolstreams into bitstreams. Each bitstream can be rearranged by multiplexer (b- 1203a, b- 1203b), which is a counterpart of the demux of Fig. 9 of transmitter. Two bit dein-

terleavers (b- 1204a, b- 1204b) can deinterleave bitstreams according to constellation type. Finally, bitstream merger (b-1205) can merge bitstreams into a single bitstream, then LDPC decoder (b-1206) can correct errors in a transmission channel.

[87] Fig. 31 shows a time deinterleaver, a counterpart of time interleaver shown in Fig. 17

Convolutional Deinterleaving (1201a) can be performed on input symbol streams and dummy symbols can be removed (1202a).

[88] Fig. 32 shows a time deinterleaver, a counterpart of time interleaver shown in Fig.

20. Convolutional Deinterleaving (1201b~1203b) can be performed on input symbol streams for each RF band and for each PLP symbol streams. Original PLP symbol streams can be restored by multiplexing (1204b) the outputs of each Convolutional deinterleaving unit to original sequence.

[89] Fig. 33 shows an example of a BICM decoder. Inner deinterleaver (1301) and outer deinterleaver (1303) can convert burst errors in a transmission channel into random errors. Inner decoder (1302) and outer decoder (1304) can correct errors in the transmission channel.

[90] Fig. 34 shows an example of LDPC decoding for shortened/punctured LDPC codeword. For input bit streams, demux (1301a) can separate systematic code into information part and parity part. For information part, zero padding (1302a) can be performed according to Number of Input bit of LDPC decoder. For parity part, input bit streams for LDPC decoder can be generated by depuncturing (1303a). Afterwards, LDPC decoding (1304a) can be performed and zeros in information part can be removed (1305a).

[91] Fig. 35 shows an example of an output processor. BB (Baseband) frame parser

(1401a~d) can reconstruct input data into total P of PLP data. Service mergers (1402a, b) can merge data into a single TS (Transport Stream) and a single GSE stream. For TS, TS-demux (1403a) can reconstruct original TS. For GSE stream, GSE Decapsulation (1403b) can reconstruct generic stream.

[92] It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention. Thus, it is intended that the present invention covers the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.