Technical Field

The present invention relates to a method of texturing photovoltaic silicon wafers. Background

Diamond wire sawing has brought about major cost reductions to photovoltaic manufacturing. However, the wafer surfaces need to be textured in order to improve the efficiency of the wafers.

Current methods include 'black silicon' techniques of reactive ion etching, metal catalyzed chemical etching, and the like. In particular, the two techniques that are commonly used to create a nanoscale texture on diamond-wire sawn (DWS) multicrystalline silicon (mc-Si) wafer surfaces are reactive ion etching (RIE) and metal- catalysed chemical etching (MCCE). The production costs of these two techniques are much higher than those of conventional acid-based texturing, and MCCE involves the use of metallic particles which runs the risk of introducing contaminants to production lines.

There is therefore a need for an improved method for texturing photovoltaic silicon wafers, particularly DWS mc-Si wafers.

Summary of the invention

The present invention seeks to address these problems, and/or to provide an improved method for texturing photovoltaic silicon wafers, particularly diamond-wire sawn (DWS) multicrystalline silicon (mc-Si) wafers.

In general terms, the invention relates to a low cost and metal-free method of texturing photovoltaic silicon wafers, therefore overcoming the risk of introducing metallic particle contaminants, while at the same time being more cost-effective. The method is also a simple method which may be easily implemented, making it a scalable method.

According to a first aspect, the present invention provides a metal-free method of texturing photovoltaic (PV) silicon wafers, the method comprising: mixing nitric acid and sulphuric acid to form a first mixture, wherein the sulphuric acid is at a temperature of≤ 20°C; adding hydrofluoric acid to the first mixture to form an acid bath;

cooling the acid bath; and

etching a surface of a PV silicon wafer in the cooled acid bath at a predetermined temperature for a pre-determined period of time.

According to a particular aspect, the PV silicon wafer may be a diamond-wire sawn (DWS) multicrystalline silicon (mc-Si) wafer.

According to a particular aspect, the concentration of the nitric acid may be 40-100 w/w %, the concentration of the sulphuric acid may be 50-100 w/w % and the concentration of the hydrofluoric acid may be 40-100 w/w %. Even more in particular, the concentration of the nitric acid may be 69 w/w %, the concentration of the sulphuric acid may be 96 w/w % and the concentration of the hydrofluoric acid may be 49 w/w %.

According to a particular aspect, the volume ratio of the nitric acid:sulphuric acid: hydrofluoric acid comprised in the acid bath based on the total volume of the acid bath may be 0.5-1 : 11-20:0.5-1. In particular, the volume ratio may be 1 :16:1.

The cooling may be by any suitable means to a suitable temperature. According to a particular aspect, the cooling may comprise cooling the acid bath to a temperature of≤ 30°C.

The etching may be by any suitable means for the purposes of the present invention. For example, the etching may comprise dipping the PV silicon wafer in the acid bath, rolling the acid bath on a surface of the PV silicon wafer, spraying the acid bath on a surface of the PV silicon wafer, or a combination thereof.

According to a particular aspect, the etching may comprise etching a surface of the PV silicon wafer in the cooled acid bath at a pre-determined temperature of 20-30°C.

According to a particular aspect, the etching may comprise etching a surface of the PV silicon wafer in the cooled acid bath for a pre-determined period of time of ≤ 10 minutes.

The etching may form nano-sized features on the surface of the PV silicon wafer. For example, the nano-sized features may comprise pores, craters or a combination thereof on the surface of the PV silicon wafer. According to a particular aspect, the nano-sized feature may have an average diameter of 50-800 nm. The nano-sized feature may have a depth of 20-500 nm.

According to a second aspect, the present invention provides a diamond-wire sawn (DWS) multicrystalline silicon (mc-Si) wafer comprising at least one surface textured by the method described above and having a reflectance of 15-30% at wavelength of light of 400-1000 nm.

The DWS mc-Si wafer may comprise at least one textured surface comprising nano- sized features comprising pores, craters or a combination thereof. For example, the nano-sized feature may have an average diameter of 50-800 nm. The nano-sized feature may have a depth of 20-500 nm.

Brief Description of the Drawings

In order that the invention may be fully understood and readily put into practical effect there shall now be described by way of non-limitative example only exemplary embodiments, the description being with reference to the accompanying illustrative drawings. In the drawings:

Figure 1 shows the reflectance of a DWS mc-Si wafer textured by the method according to one embodiment of the present invention and the reflectance of a typical slurry sawed wafer textured by prior art method;

Figure 2(a) shows the SEM 50° tilt view of a typical slurry sawed wafer textured by prior art method and Figure 2(b) shows the SEM plain view of a DWS mc-Si wafer textured by the method according to one embodiment of the present invention; and

Figure 3(a) shows the cross-sectional SEM non-tilted view of a silicon surface textured by the method according to one embodiment of the present invention, Figure 3(b) shows the cross-sectional SEM 3° tilted view of a MCCE textured silicon surface and Figure 3(c) shows the SEM top view of a RIE textured silicon surface.

Detailed Description

As explained above, there is a need for an improved method of texturing photovoltaic (PV) silicon wafers which is cost effective and which is metal free so that metal particulate impurities are not introduced into the wafer. The method of the present invention enables a lower reflectance to be achieved using a low-cost and metal-free method. With a lower reflectance, more light can be absorbed and higher solar cell efficiency may be achieved. In particular, the reflectance which may be achieved from the method of the present invention is about 15-30%. The method of the present invention utilises easily available and inexpensive chemicals, thereby reducing the overall cost of the method and avoids the problems relating to material scarcity.

As mentioned above, the method of the present invention achieves low reflectance without utilising metal-assisted chemical etching, which introduces detrimental metal impurities to a solar cell, or reactive ion etching (RIE), which is an expensive method.

According to a first aspect, the present invention provides a metal-free method of texturing PV silicon wafers, the method comprising: mixing nitric acid and sulphuric acid to form a first mixture, wherein the sulphuric acid is at a temperature of≤ 20°C;

adding hydrofluoric acid to the first mixture to form an acid bath;

cooling the acid bath; and

etching a surface of a PV silicon wafer in the cooled acid bath at a predetermined temperature for a pre-determined period of time.

The PV silicon wafer may be any suitable wafer. According to a particular aspect, the PV silicon wafer may be a diamond-wire sawn (DWS) multicrystalline silicon (mc-Si) wafer.

The mixing of the nitric acid and the sulphuric acid may be by any suitable method to form a first mixture such as, but not limited to, by using a magnetic stirrer, static mixer, shaker, vortex mixture, glass rod, and the like.

According to a particular aspect, the method may further comprise cooling the sulphuric acid prior to the mixing. The cooling the sulphuric acid may comprise cooling the sulphuric acid to a temperature of ≤ 20°C. In particular, the cooling the sulphuric acid comprises cooling the sulphuric acid to a temperature of 0-20°C, 2-18°C, 5-15°C, 8- 13°C, 9-10°C. Even more in particular, the sulphuric acid may be cooled to a temperature of 10-15°C. The cooling may be by any suitable means. For example, the cooling may be by, but not limited to, recirculating cooling systems, cooling towers, once-through cooling systems, and the like.

The adding hydrofluoric acid to the first mixture to form an acid bath may comprise continuously stirring the first mixture to ensure thorough mixing of the hydrofluoric acid added into the first mixture. The stirring may be by any suitable means, such as that used for forming the first mixture.

According to a particular aspect, the concentration of the nitric acid may be 40-100 w/w %, the concentration of the sulphuric acid may be 50-100 w/w % and the concentration of the hydrofluoric acid may be 40-100 w/w%. Even more in particular, the concentration of the nitric acid may be 69 w/w %, the concentration of the sulphuric acid may be 96 w/w % and the concentration of the hydrofluoric acid may be 49 w/w %.

According to a particular aspect, the volume ratio of the nitric acid:sulphuric acid: hydrofluoric acid comprised in the acid bath based on the total volume of the acid bath may be 0.5-1 : 11-20:0.5-1. In particular, the volume ratio may be 1 :16:1.

According to a particular aspect, the mole ratio of the nitric acid:sulphuric acid: hydrofluoric acid:water is 1.0-2.0:25.7-46.8: 1.9-3.7:9.5-17.9.

The formation of the acid bath may increase the temperature of the acid bath. Therefore, the acid bath is subsequently cooled to a suitable temperature. The cooling of the acid bath may be by any suitable means. For example, the cooling may be by, but not limited to, recirculating cooling systems, cooling towers, once-through cooling systems, and the like.

The cooling may comprise cooling the acid bath to a temperature of ≤ 30°C. In particular, the acid bath may be cooled to a temperature of 5-25°C, 7-22°C, 10-20°C, 12-18°C, 13-15°C. Even more in particular, the acid bath may be cooled to a temperature of 25°C.

Once the acid bath is formed and cooled, at least one surface of the PV silicon wafer may be textured. The texturing may be by any suitable means. According to a particular aspect, the texturing may be by etching. In particular, at least one surface of the PV silicon wafer may be etched in the acid bath. The etching may be by any suitable means for the purposes of the present invention. For example, the etching may comprise dipping the PV silicon wafer in the acid bath, rolling the acid bath on a surface of the PV silicon wafer, spraying the acid bath on a surface of the PV silicon wafer, or a combination thereof.

Even more in particular, the etching may comprise applying the acid bath on the surface of the PV silicon wafer using either inline tools or wet benches. For example, the wafer may be rolled forward piece by piece in an inline tool. In a wet bench, the wafer may be loaded inside a cassette which may then be vertically placed inside the acid bath.

The etching may be at a pre-determined temperature for a pre-determined period of time. According to a particular aspect, the etching may comprise etching a surface of the PV silicon wafer in the cooled acid bath at a pre-determined temperature of 20- 30°C. In particular, the pre-determined temperature may be 22-28°C, 23-27°C, 24- 25°C. Even more in particular, the pre-determined temperature may be 25°C.

According to a particular aspect, the etching may comprise etching a surface of the PV silicon wafer in the cooled acid bath for a pre-determined period of time of ≤ 10 minutes. In particular, the pre-determined period of time may be≤ 480 seconds, 60-400 seconds, 100-360 seconds, 120-330 seconds, 150-300 seconds, 180-270 seconds, 210-240 seconds. Even more in particular, the pre-determined period of time may be about 240 seconds.

The etching may form nano-sized features on the surface of the PV silicon wafer. For example, the nano-sized features may comprise pores, craters or a combination thereof on the surface of the PV silicon wafer.

According to a particular aspect, the nano-sized feature may have an average diameter of 50-800 nm. For the purposes of the present invention, the average diameter of the nano-sized feature may be defined as the average length of a straight line that passes through the center of the surface opening of the feature with the endpoints on the outer edge of the feature at the top surface. In particular, the average diameter of the feature may be about 200 nm. According to a particular aspect, the nano-sized feature may have a depth of 20-500 nm. For the purposes of the present invention, the depth is defined as the etch depth of the nano-sized feature. The etch depth may be defined as the maximum depth of the feature measured from the deepest point of the feature to the surface level of the feature. In particular, the average depth of the feature may be about 100 nm.

The textured PV silicon wafers formed from the method of the present invention exhibit low reflectance. According to a second aspect, the present invention provides a PV silicon wafer comprising at least one surface textured by the method described above and having a reflectance of 15-30% at wavelength of light of 400-1000 nm. The PV silicon wafer may comprise any suitable silicon wafer, such as, but not limited to, a DWS mc-Si wafer.

The PV silicon wafer may comprise at least one textured surface comprising nano- sized features comprising pores, craters or a combination thereof.

According to a particular aspect, the nano-sized feature may have an average diameter of 50-800 nm. In particular, the average diameter of the feature may be about 200 nm.

According to a particular aspect, the nano-sized feature may have a depth of 20-500 nm. In particular, the average depth of the feature may be about 100 nm.

Having now generally described the invention, the same will be more readily understood through reference to the following embodiment which is provided by way of illustration, and is not intended to be limiting.

Example

An acid bath comprising nitric acid (HN0 ₃ ), sulphuric acid (H ₂ S0 ₄ ) and hydrofluoric acid (HF) was prepared.

29,333 mL of H ₂ S0 ₄ (BASF) was first cooled by circulating chilled water around the acid to a temperature of about 12°C. 1 ,833 mL of HN0 ₃ (DUKSAN) was then added to the cooled sulphuric acid and mixed thoroughly, followed by the addition of 1 ,833 mL of HF (BASF). The acid bath formed comprised 96 w/w % sulphuric acid, 69 w/w % nitric acid and 49 w/w % HF acid. In particular, the volume ratio of sulphuric acid:nitric acid: hydrofluoric acid in the acid bath was 16: 1 : 1. Following the mixing and addition of HF, the formed acid bath was cooled by circulating chilled water around the acid bath to a temperature of about 25°C.

Diamond wire sawed (DWS) wafers with a size of 1560 mm ^χ 1560 mm were etched inside the acid bath with circulation pump of the bath on, rinsed in a deionized water (Dl water) bath, and dried using a dryer. The etching temperature was maintained at 20-30°C. The etching time was about 240 seconds.

Weights of samples were measured by a weighing balance (Mettler Toledo MS1003S) with an accuracy of 0.001 g before and after the etching. Silicon etch depth of each sample was then calculated using the weight delta before and after etching. Reflectance from wavelength 300 nm to 1200 nm of a textured DWS wafer was measured using a UV-Vis-NIR spectrometer (Agilent Carry 7000). Surface morphology of a textured DWS wafer after etching was investigated using a SEM tool (Carl Zeiss Auriga).

Silicon removed by acid etching for sample DWS wafer was in the range of 1 μηι to 10 μηι on each wafer side, derived from dividing weight delta by product of surface area and area density of silicon. Figure 1 shows the reflectance data of the DWS wafer textured using the method of the present invention described above (termed "SERIS method" in the figure) and a typical slurry-cut wafer textured by conventional acid method (Nishimoto Y et al, 1999, Journal of the Electrochemical Society, 146(2):457- 461).

From Figure 1 , it can be seen that for wavelengths ranging from 300 nm to 1000 nm, reflectance of DWS wafer is lower than that of a typical slurry-cut wafer textured by conventional acid method. Reflectance at wavelength 600 nm are about 16.3% and 25.8% for DWS wafer and a typical slurry sawed wafer textured by conventional acid method, respectively. The texturing on DWS wafer is also uniform as can be seen from the reflectance plot in Figure 1. In particular, the reflectance for wavelengths 400 nm - 1000 nm is similar at five different points on the wafer.

Figure 2(a) shows scanning electron microscope (SEM) 50° tilt view of a typical slurry sawed wafer textured by conventional acid method and Figure 2(b) shows the SEM plain view of a DWS wafer textured by the present method. Both SEM images were taken with magnification of 10,000. The feature size of textures of a typical slurry sawed wafer textured by conventional acid method was in the order of 2-3 μηι, whereas the feature size of textures of the DWS wafer textured using the method described above was in the order of 200 nm. Such sub-micron texture feature size as seen in the DWS wafer is usually observed in wafers textured by plasma, and is smaller than feature sizes of textures seen in wafers textured by metal assisted chemical etching (in 300 to 500 nm range). In view of the sub-micron features, the reflectance of the DWS wafer is significantly better than that of a typical slurry sawed wafer textured by conventional acid method.

Table 1 shows l-V data of multi-Si passivated emitter and rear cells (PERC) with the highest efficiency fabricated from the textured DWS wafers of this example and from conventional acid textured slurry cut wafers.

Fill factor (FF) of a solar cell is defined as the ratio of the maximum power point of the solar cell to the product of the open-circuit voltage (V _oc ) and short-circuit current (l _sc ). Efficiency is the ratio of the energy output of a solar cell to the input energy from the sun.

Short circuit current density, J _sc , showed an increment of 0.4 mA/cm ² , which can be translated to a 0.2% efficiency gain in this case.

Table 1 : l-V data of mc-Si PERC with the highest efficiency fabricated using the method of example and from conventional acid textured slurry cut wafers

Figure 3 shows the SEM images of a wafer surface textured by the present method (Figure 3(a)), a MCCE textured silicon surface (Figure 3(b)), and a RIE silicon surface (Figure 3(c)). Table 2 summarizes the main characteristics of Si surfaces textured by those three different texturing methods. Present method MCCE RIE

Reflectance 16-20% 17-20% ≤10%

Shape (top view) Hole Hole or triangle Hole or triangle

Shape (cross-sectional Crater Crater, Needle shape or view) inversed pyramid

pyramid, or

needle shape

Texture feature width About 200 nm ≥ 500 nm 300-400 nm

Texture feature height About 100 nm 200-300 nm About 200 nm

Table 2: Characteristics of silicon surfaces textured by different t methods

Thus, it can be seen that a sub-micron texture was attained on DWS wafers utilizing an advanced metal-free acid texturing method. DWS wafers with sub-micron textures exhibited significantly lower reflectance compared to conventional acid textured wafers. Reflectance at wavelength 600 nm was about 16.3% for a DWS wafer with sub-micron textures.

Whilst the foregoing description has described exemplary embodiments, it will be understood by those skilled in the technology concerned that many variations may be made without departing from the present invention.