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Title:
METHOD TO MANUFACTURE CONDUCTIVE ANODIC FILAMENT-RESISTANT MICROVIAS
Document Type and Number:
WIPO Patent Application WO/2023/231530
Kind Code:
A1
Abstract:
An electronic printed circuit board structure for mitigating conductive anodic filament growth. The structure includes at least two conductive layers and a dielectric layer sandwiched between the conductive layers. At least one hole extends through the dielectric layer, and a layer of nonconductive material covers the at least one hole, wherein the nonconductive material is glass-free. A conductive plate layer is disposed over the nonconductive material layer to form a via connection in the structure.

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Inventors:
GIESEN KYLE INDUKUMMAR (US)
CZAPLEWSKI-CAMPBELL SARAH K (US)
KRABBENHOFT ROGER S (US)
Application Number:
PCT/CN2023/083337
Publication Date:
December 07, 2023
Filing Date:
March 23, 2023
Export Citation:
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Assignee:
IBM (US)
IBM CHINA CO LTD (CN)
International Classes:
H05K1/03; H01L21/48
Foreign References:
CN1830234A2006-09-06
KR20110052281A2011-05-18
EP3474640A12019-04-24
US20120012553A12012-01-19
Attorney, Agent or Firm:
CCPIT PATENT AND TRADEMARK LAW OFFICE (CN)
Download PDF:
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