Description

METHOD OF TRANSMITTING AND RECEIVING A SIGNAL AND APPARATUS FOR TRANSMITTING AND RECEIVING A

SIGNAL

Technical Field

[1] The present invention relates to a method of transmitting/receiving a signal and an apparatus for transmitting/receiving a signal, and more particularly to a method of transmitting/receiving a signal and an apparatus for transmitting/receiving a signal, which are capable of increasing a data transfer rate. Background Art

[2] As a digital broadcasting technology has been developed, users have received a broadcasting signal including a high definition (HD) moving image and high-quality digital sound. With continuous development of a compression algorithm and high performance of hardware, a better environment will be provided to the users in the future. A digital television (DTV) system can receive a digital broadcasting signal and provide a variety of supplementary services to users as well as a video signal and an audio signal.

[3] With the development of the digital broadcasting technology, a requirement for a service such as a video signal and an audio signal is increased and the size of data desired by a user or the number of broadcasting channels is gradually increased. Disclosure of Invention Technical Problem

[4] However, in the existing transmission frame structure, it is difficult to cope with the increase in the size of data or the number of broadcasting channels. Accordingly, a requirement for a new signal transmitting/receiving technology in which channel bandwidth efficiency is higher than that of the existing signal transmitting/receiving method and cost necessary for configuring a signal transmitting/receiving network is low.

[5] An object of the present invention devised to solve the problem lies on a method of transmitting/receiving a signal and an apparatus for transmitting/receiving a signal, which are capable of using the existing signal transmitting/receiving network and improving data transmission efficiency. Technical Solution

[6] The object of the present invention can be achieved by providing an apparatus for transmitting a signal, the apparatus including: an energy scrambler which scrambles

input data so as to disperse the data; a forward error correction (FEC) encoder which FEC-encodes the scrambled data; a symbol mapper which maps the FEC-encoded data to data symbols according to a plurality of symbol mapping methods; a first frame builder which builds a first modulation frame such that a pilot symbol interval in which the first pilot symbols are positioned at only odd carriers and a data symbol interval in which the mapped data symbols are positioned are periodically repeated; a second frame builder which builds a second modulation frame such that a pilot symbol interval in which the first pilot symbols are positioned at only even carriers and a data symbol interval in which the mapped data symbols are positioned are periodically repeated; a first modulator which modulates the built first modulation frame according to an orthogonal frequency division multiplexing (OFDM) method; a second modulator which modulates the built second modulation frame according to the OFDM method; a first transmitter which transmits the signal output from the first modulator; and a second transmitter which transmits the signal output from the second modulator, and a method of transmitting a signal in the apparatus.

[7] The symbol mapper may include a block distributor which divides an error correction encoding frame including at least one data block encoded according to one error correction encoding mode into a plurality of symbol mapping blocks; and a symbol mapper which maps the divided blocks to symbols.

[8] The symbol mapper may further include a block interleaver which block-interleaves the plurality of symbol mapping blocks.

[9] According to another aspect of the invention, there is provided an apparatus for receiving a signal, the apparatus including: a first demodulator which demodulates a signal having a first modulation frame built such that a pilot symbol interval in which the first pilot symbols are positioned at only odd carriers and a data symbol interval in which data symbols are positioned are periodically repeated; a second demodulator which demodulates a signal having a second modulation frame built such that a pilot symbol interval in which the first pilot symbols are positioned at only even carriers and a data symbol interval in which the data symbols are positioned are periodically repeated; a first frame parser which parses the first modulation frame; a second frame parser which parses the second modulation frame; a multi-input/output decoder which outputs the respective data symbols included in the first modulation frame and the second modulation frame as one symbol stream; a symbol demapper which demaps the symbol stream by methods corresponding to a plurality of symbol mapping methods; an error correction decoder which error-correction-decodes the demapped data; and an energy descrambler which descrambles the error-correction-decoded data, and a method of receiving the signal in the apparatus.

[10] The symbol demapper may include a block interleaver which block-deinterleaves the

symbol stream; a plurality of sub symbol demappers which demap the interleaved blocks; and a block merger which merges the data output from the plurality of sub symbol demappers to one error correction encoding frame.

[11] The error correction decoder may error-correction-decode the data blocks which are included in the error correction encoding frame and encoded according to one error correction encoding mode.

Advantageous Effects

[12] According to a method of transmitting/receiving a signal and an apparatus for transmitting/receiving a signal of the present invention, it is possible to facilitate the switching of a signal transmitting/receiving system using the existing signal transmitting/receiving network and reduce cost. [13] In addition, it is possible to improve a data transfer rate on the basis of a SNR gain and estimate a channel with respect to a transmission channel having a long delay spread property so as to increase a signal transmission distance. Accordingly, it is possible to more accurately estimate the channel using the suggested frame structure. [14] Accordingly, it is possible to improve the signal transmitting/receiving performance of the transmitting/receiving system.

Brief Description of the Drawings [15] FIG. 1 is a schematic block diagram showing an apparatus for transmitting a signal according to an embodiment of the present invention. [16] FIG. 2 is a schematic block diagram showing an interleaver and a forward error correction (FEC) encoder according to an embodiment of the present invention. [17] FIG. 3 is a view showing the interleaver for interleaving input data according to an embodiment of the present invention. [18] FIG. 4 is a view showing another example of the interleaver according to an embodiment of the present invention. [19] FIG. 5 is a view showing a detailed example of the interleaver of FIG. 4 according to an embodiment of the present invention. [20] FIG. 6 is a view showing an example of a multi-input/output encoding method according to an embodiment of the present invention. [21] FIG. 7 is a view showing a structure of a transmission frame according to an embodiment of the present invention. [22] FIG. 8 is a view showing a structure of a pilot symbol interval according to an embodiment of the present invention. [23] FIG. 9 is a view showing another structure of the pilot symbol interval according to an embodiment of the present invention. [24] FIG. 10 is a schematic block diagram showing an apparatus for receiving a signal

according to an embodiment of the present invention.

[25] FIG. 11 is a view showing an example of a multi-input/output decoding method according to an embodiment of the present invention.

[26] FIG. 12 is a view showing a detailed example of FIG. 11 according to an embodiment of the present invention.

[27] FIG. 13 is a schematic block diagram showing a deinterleaver and a FEC decoder according to an embodiment of the present invention.

[28] FIG. 14 is a schematic block diagram showing another example of the apparatus for transmitting the signal according to an embodiment of the present invention.

[29] FIG. 15 is a schematic block diagram showing another example of the apparatus for receiving the signal according to an embodiment of the present invention.

[30] FIG. 16 is a schematic view showing the positions of points of an optimal constellation according to an embodiment of the present invention.

[31] FIG. 17 is a flowchart illustrating a method of deciding points of an optimal constellation according to an embodiment of the present invention.

[32] FIG. 18 is a schematic view showing an optimal constellation having 16 points according to an embodiment of the present invention.

[33] FIG. 19 is a schematic view showing an optimal constellation having 64 points according to an embodiment of the present invention.

[34] FIG. 20 is a schematic view showing an optimal constellation having 256 points according to an embodiment of the present invention.

[35] FIG. 21 is a schematic view showing another optimal constellation having 256 points according to an embodiment of the present invention.

[36] FIG. 22 is a schematic block diagram showing decision boundaries of the optimal constellation having 64 points.

[37] FIG. 23 is a schematic block diagram showing a symbol demapper for demapping a received optimal constellation symbol according to an embodiment of the present invention.

[38] FIG. 24 is a schematic block diagram showing another symbol demapper for demapping a received optimal constellation symbol according to an embodiment of the present invention.

[39] FIG. 25 is a schematic view showing a process of demapping a received optimal constellation symbol according to an embodiment of the present invention.

[40] FIG. 26 is a schematic view showing a process of demapping a received optimal constellation symbol of an edge region according to an embodiment of the present invention.

[41] FIG. 27 is a schematic block diagram showing an apparatus for transmitting a signal according to an embodiment of the present invention.

[42] FIG. 28 is a schematic block diagram showing a multi-demapper according to an embodiment of the present invention. [43] FIG. 29 is a view showing a bitstream distributing method according to an embodiment of the present invention. [44] FIG. 30 is a schematic block diagram showing an apparatus for receiving a signal according to an embodiment of the present invention. [45] FIG. 31 is a schematic block diagram showing a multi-demapper according to an embodiment of the present invention. [46] FIG. 32 is a schematic block diagram showing an apparatus for transmitting a signal using multi-encoding according to an embodiment of the present invention. [47] FIG. 33 is a schematic block diagram showing a multi-encoder according to an embodiment of the present invention.

[48] FIG. 34 is a schematic block diagram showing an apparatus for receiving a multi- encoded signal according to an embodiment of the present invention. [49] FIG. 35 is a schematic block diagram showing a multi-decoder according to an embodiment of the present invention. [50] FIG. 36 is a schematic block diagram showing an apparatus for transmitting a signal using a multi-encoding method and a multi-mapping method according to an embodiment of the present invention.

[51] FIG. 37 is a schematic block diagram showing an apparatus for receiving a multi- encoded and multi-mapped signal according to an embodiment of the present invention. [52] FIG. 38 is a schematic block diagram showing another example of an apparatus for receiving a multi-encoded and multi-mapped signal according to an embodiment of the present invention. [53] FIG. 39 is a schematic block diagram showing a channel estimator according to an embodiment of the present invention. [54] FIG. 40 is a schematic block diagram showing an equalizer according to an embodiment of the present invention. [55] FIG. 41 is a schematic block diagram showing an apparatus for transmitting a signal by a data symbol channel estimation method according to an embodiment of the present invention. [56] FIG. 42 is a schematic block diagram showing an apparatus for receiving a signal by a data symbol channel estimation method according to an embodiment of the present invention. [57] FIG. 43 is a schematic block diagram showing another example of an apparatus for transmitting a signal by a data symbol channel estimation method according to an embodiment of the present invention.

[58] FIG. 44 is a schematic block diagram showing another example of an apparatus for receiving a signal by a data symbol channel estimation method according to an embodiment of the present invention. [59] FIG. 45 is a view showing the structure of a transmission frame according to an embodiment of the present invention. [60] FIG. 46 is a view showing the number of tracking pilots in a frame according to an embodiment of the present invention. [61] FIG. 47 is a view showing a frame including tracking pilots according to an embodiment of the present invention. [62] FIG. 48 is a view showing margins of the frame of FIG. 47 according to an embodiment of the present invention. [63] FIG. 49 is a view showing another frame including tracking pilots according to an embodiment of the present invention. [64] FIG. 50 is a view showing margins of the frame of FIG. 49 according to an embodiment of the present invention. [65] FIG. 51 is a view showing the number of symbols included in a low density parity check (LDPC) block according to an embodiment of the present invention. [66] FIG. 52 is a view showing the number of LDPC blocks included in an LDPC frame according to an embodiment of the present invention. [67] FIG. 53 is a view showing the number of OFDM blocks included in an LDPC frame according to an embodiment of the present invention. [68] FIG. 54 is a view showing the number of LDPC blocks included in an LDPC frame of another mode according to an embodiment of the present invention. [69] FIG. 55 is a view showing the number of OFDM blocks included in an LDPC frame of another mode according to an embodiment of the present invention. [70] FIG. 56 is a view showing the number of OFDM blocks included in an LDPC frame of another mode according to an embodiment of the present invention. [71] FIG. 57 is a view showing the structure of an LDPC frame according to an embodiment of the present invention. [72] FIG. 58 is a view showing the structure of a transmission parameter signal (TPS) according to an embodiment of the present invention. [73] FIG. 59 is a view showing constellation information according to an embodiment of the present invention. [74] FIG. 60 is a view showing LDPC mode information according to an embodiment of the present invention. [75] FIG. 61 is a view showing the structure of a TPS including the information of FIGs.

58 and 59 according to an embodiment of the present invention. [76] FIG. 62 is a view showing OFDM block index information according to an

embodiment of the present invention.

[77] FIG. 63 is a view showing the structure of a TPS including OFDM block index information according to an embodiment of the present invention. [78] FIG. 64 is a view showing LDPC block information according to an embodiment of the present invention. [79] FIG. 65 is a view showing OFDM block information according to an embodiment of the present invention. [80] FIG. 66 is a view showing the structure of a TPS including suggested information according to an embodiment of the present invention. [81] FIG. 67 is a view showing preamble period information according to an embodiment of the present invention.

[82] FIG. 68 is a view showing a structure of a TPS including the preamble period information according to an embodiment of the present invention. [83] FIG. 69 is a view showing a relationship between a pilot symbol interval and a single frequency network according to an embodiment of the present invention. [84] FIG. 70 is a view showing a structure of a pilot symbol according to an embodiment of the present invention. [85] FIG. 71 is a schematic block diagram showing another example of an apparatus for transmitting a signal according to an embodiment of the present invention. [86] FIG. 72 is a schematic block diagram showing another example of an apparatus for receiving a signal according to an embodiment of the present invention. [87] FIGs. 73 and 74 are views showing suggested frame structures according to an embodiment of the present invention.

[88] FIGs. 75 to 77 are views showing insertion positions of continual pilot (CP) information of modes, according to an embodiment of the present invention. [89] FIGs. 78 and 79 are views showing the structures of the frames having the same CP positions according to an embodiment of the present invention. [90] FIG. 80 is a view showing insertion positions of common CP information according to an embodiment of the present invention. [91] FIGs. 81 to 83 are views showing the structures of multi-input/output transmission frames according to an embodiment of the present invention. [92] FIG. 84 is a view showing a pseudo random binary sequence (PRBS) generator according to an embodiment of the present invention. [93] FIG. 85 is a schematic block diagram showing another example of an apparatus for transmitting a signal according to an embodiment of the present invention. [94] FIG. 86 is a schematic block diagram showing another example of an apparatus for receiving a signal according to an embodiment of the present invention. [95] FIG. 87 is a view showing a descrambling device according to an embodiment of the

present invention. [96] FIG. 88 is a view showing the comparison of the TPS transmission bit per symbol according to an embodiment of the present invention. [97] FIG. 89 is a schematic block diagram showing an apparatus for transmitting a signal using scramble according to an embodiment of the present invention. [98] FIG. 90 is a schematic block diagram showing a multi-mapper of block units according to an embodiment of the present invention. [99] FIG. 91 is a view showing a block distributing method according to an embodiment of the present invention. [100] FIGs. 92 and 93 are view showing a method of interleaving symbol data according to an embodiment of the present invention. [101] FIG. 94 is a view showing the length of a column of a memory according to an embodiment of the present invention. [102] FIG. 95 is a schematic block diagram showing an apparatus for receiving a signal using descramble according to an embodiment of the present invention. [103] FIG. 96 is a schematic block diagram showing a multi-demapper of block units according to an embodiment of the present invention. [104] FIGs. 97 to 99 are views showing experimental results of the performance of a transmitting/receiving system according to a plurality of symbol mapping methods. [105] FIGs. 100 and 101 are views showing times necessary for frame synchronization according to an error correction encoding frame. [106] FIGs. 102 and 103 are views showing times necessary for synchronizing an error correction encoding frame in the case of using a plurality of symbol mapping methods. [107] FIG. 104 is a view showing power enhancement in the case that a pilot is transmitted by the above-described preamble structure. [108] FIG. 105 is a view showing power enhancement according to the consecutive pilot structure. [109] FIG. 106 is a view showing power enhancement of a data symbol carrier in the above-described frame structure. [110] FIG. 107 is a view showing the decrease rate of a data transfer rate according to the above-described frame structure. [I l l] FIGs. 108 and 109 are views showing mobility characteristics according to the above-described frame structure. [112] FIG. 110 is a flowchart illustrating a method of transmitting a signal according to an embodiment of the present invention. [113] FIG. 111 is a flowchart illustrating a method of receiving a signal according to an embodiment of the present invention.

Best Mode for Carrying Out the Invention

[114] A method of transmitting/receiving data according to the present invention and the operation of a frame structure will be described in detail with reference to the accompanying drawings.

[115] FIG. 1 is a schematic block diagram showing an apparatus for transmitting a signal according to an embodiment of the present invention. The transmitting/receiving system may use a multi-input multi-output (MIMO) method.

[116] For example, the signal transmitting apparatus of FIG. 1 may be a signal transmitting system for transmitting video data such as a broadcasting signal, for example, a signal transmitting system according to a digital video broadcasting (DVB) system. The signal transmitting system according to the embodiment of the present invention now will be described with reference to FIG. 1.

[117] The embodiment of FIG. 1 includes an outer encoder 100, a first interleaver 110, an inner encoder 120, a second interleaver 130, a symbol mapper 140, a linear pre-coder 150, a third interleaver 160, a multi-input/output encoder 170, a first frame builder 180, a second frame builder 185, a first modulator 190, a second modulator 192, a first transmitter 194, and a second transmitter 196.

[118] The outer encoder 100 and the inner encoder 120 encode respective input signals and output the encoded signals such that an error generated in transmitted data is detected and corrected by a receiving apparatus. That is, as the encoder, a forward error correcting (FEC) encoder may be used.

[119] The first interleaver 110 shuffles the data stream output from the outer encoder 100 to random positions. For example, the first interleaver 110 may use a convolution interleaving methodor a block interleaving method, which may be changed according to the signal transmitting system. The first interleaver 110 may not be used according to implementation examples.

[120] The second interleaver 130 shuffles the FEC-encoded data stream to random positions so as to become robust against a burst error which occurs in the data when the signal is transmitted. For example, the second interleaver 130 may use a convolution interleaver or a block interleaver, which may be changed according to the signal transmitting system.

[121] The data interleaved by the second interleaver 130 is input to the symbol mapper 140. The symbol mapper 140 may map the transmitted signal to symbols in consideration of a transmission parameter signal and a pilot signal according to a transmission mode. As the mapping method, a quadrature amplitude modulation (QAM), a quadrature phase shift keying (QPSK), an amplitude phase shift keying (APSK), a pulse amplitude modulation (PAM) or an optimal constellation may be

used.Alternatively, an encoded symbol mapping method may be used in the symbol mapper 140. For example, the data may be mapped to symbols encoded using a trellis coded modulation method.

[122] The linear pre-coder 150 disperses input symbol data into several pieces of output symbol data so as to decrease a probability that all information is lost due to fading when experiencing frequency- selective fading of a channel. The linear pre-coder 150 converts the input data into parallel data, disperses parallel data into several pieces of data via an encoding matrix, and converts the parallel data into serial data.

[123] An encoding matrix is designed by comparing an output symbol with an input symbol such that a pairwise error probability (PEP) that the two symbols are different from each other is minimized. If the encoding matrix is designed such that the PEP is minimized, a diversity gain and a coding gain obtained via the linear pre-coding are maximized. In addition, if a minimum Euclidean distance of the linearly pre-coded symbol is maximized by the encoding matrix, it is possible to minimize an error probability when the receiving apparatus uses a maximum likelihood (ML) decoder.

[124] Examples of the encoding matrix may include a vanderMonde matrix, aHadamard matrix and a Golden code. The matrix is exemplary and the data may be dispersed using a proper matrix according to implementation examples.

[125] The linear pre-coder 150 may not be used according to implementation examples.

[126] The thirdinterleaver 160 interleaves the symbol data output from the linear pre-coder 150 again. That is, the third interleaver 160 performs the interleaves process such that the symbol data dispersed in the data output from the linear pre-coder 150 does not experience the same frequency- selective fading. The third interleaver 160 may use a convolution interleaving method or a block interleaving method.

[127] The linear pre-coder 150 and the third interleaver 160 process the data to be transmitted so as to become the frequency-selective fading of the channel.

[128] The multi- input/output decoder 170 encodes the data interleaved by the third interleaver 160so as to be transmitted via a plurality of transmission antennas. The multi- input/output encoding method is largely classified into a spatial multiplexing method and a spatial diversity method. In the spatial multiplexing method, since a transmitter and a receiver may simultaneously transmit/receive different data using a plurality of antennas, the data can be transmitted at a high speed without further increasing the bandwidth of the system. In the spatial diversity method, data having the same information is transmitted by a plurality of transmission antennas so as to obtain transmission diversity.

[129] At this time, as the multi- input/output encoder 170 of the spatial diversity method, a space-time block code (STBC), a space-frequency block code (SFBC), or a space-time trellis code (STTC) may be used. As the multi-input/output encoder 170 of the spatial

multiplexing method, a method of dividing a data stream by the number of transmission antennas and transmitting the divided data, a full-diversity full-rate (FDFR) code, a linear dispersion code (LDC), a Vertical-Bell Lab layered space-time (V-BLAST), or a diagonal-BLAST (D-BLAST) may be used.

[130] The multi- input/output encoder 170 encodes the input symbol data so as to be transmitted via the plurality of transmission antennas. For example, if two transmission paths exist, the multi- input/output encoder 170 outputs the encoded data to the first frame builder 180 or the second frame builder 185. The number of transmission paths is only exemplary and the number of transmission paths may be changed according to the multi-input/output encoding method.

[131] The first frame builder 180 and the second frame builder 185 inserts a pilot signal into a data interval to build a frame such that the signal output from the multi- input/output encoder 170 is modulated by an orthogonal frequency division multiplex (OFDM) method.

[132] The first modulator 190 and the second modulator 192 inserts a guard interval into the data output from the first frame builder 180 and the second frame builder 185 and modulates the inserted data such that the data is transmitted in a state of being carried in OFDM subcarriers.

[133] The first transmitter 194 and the second transmitter 196 convert the digital signals having the guard interval and the data interval, which are output from the first modulator 190 and the second modulator 192, into analog signals and transmit the converted analog signals.

[134] The signal transmitting apparatus of FIG. 1 is only exemplary, and a necessary component may be further included or an unnecessary component may not be used, according to the transmitting system.

[135] FIG. 2 is a schematic block showing the interleaver and a forward error correction

(FEC)encoder according to an embodiment of the present invention. The FEC encoder includes a Bose-Chaudhuri-Hocquenghem (BCH) encoder 100 and a low density parity check (LDPC) encoder 120 as an outer encoder and an inner encoder, respectively.

[136] A LDPC code is an error correction code which can reduce a probability that data information is lost. The LDPC encoder 120encodes the signal in a state in which the length of an encoding block is large such that the transmitted data is robust against a transmission error. In order to prevent hardware complexity from being increased due to the increase of the block size, the density of the parity bit is decreased so as to decrease the complexity of the encoder.

[137] In order to prevent an error floor from occurring in the output data of the receiving apparatus, the BCH encoder 100 is used as the additional outer encoder. If the LDPC encoder 120 which can ignore error flooris used, the BCH encoder 100 may not be

used. Alternatively, other encoders may be used as the outer encoder, instead of the BCH encoder.

[138] The data which is encoded by the BCH encoder 100 and is interleaved by the first in- terleaver 110 is output to the second interleaver 130 via the LDPC encoder 120.

[139] FIG. 3 is a view showing an interleaver for interleaving input data according to an embodiment of the present invention. The interleaver of FIG. 3 is a block interleaver, which is an example of the interleaver and may be used in the second interleaver 130.

[140] The interleaver of FIG. 3 stores input data in a matrix-shaped memory space in a predetermined pattern and reads and outputs the data in a pattern different from the pattern used for storing the data. For example, the interleaver of FIG. 3 has an NrxNc memory space composed of Nr rows and Nc columns and the data input to the interleaver is filled from a position corresponding to a first row and a first column of the memory space. The data is stored from the first row and the first column to an Nr row and the first column and, if the first column is filled up, is then stored from the first row to the Nr row of a next column (second column). In this sequence, the data may be stored up to the Nr row of an Nc column.

[141] In the case that the stored data is read, the data is read and output from the first row and the first column to the first row and the Nc column. If all the data of the first row is read, the data is read and output from the first column of a next row (second row) in the column direction. In this sequence, the data may be read and output up to the Nc column of the Nr row. At this time, the position of a most significant bit (MSB) of the data block is a left uppermost side and the position of a least significant bit (LSB) thereof is a right lowermost side.

[142] The size of the memory block, the storage pattern and the read pattern of the interleaver are only exemplary and may be changed according to implementation embodiments.

[143] FIG. 4 is a view showing an example of the interleaver. The interleaver of FIG. 4 is an example of the interleaver of the OFDM system having a symbol length N, which can be used in the third interleaver 160 of the transmitting apparatus shown in FIG. 1.

[144] N denotes the length of the interleaver and i has a value corresponding to the length of the interleaver, that is, an integer from 0 to N-I. n denotes the number of valid transmission carriers in the transmitting system. π(i) denotes a permutation obtained by a modulo-N operation, and dn has a π(i) value which is located in a valid transmission carrier area excluding a value N/2 in sequence, k denotes an index value of an actual transmission carrier. N/2 is subtracted from dn such that the center of the transmission bandwidth becomes DC. P denotes a permutation constant which may vary according to implementation embodiments.

[145] FIG. 5 is a view showing a detailed example of the interleaver of FIG. 4 according to

an embodiment of the present invention. In the example of FIG. 5, the length of the OFDM symbol and the length N of the interleaver are set to 2048 and the number of valid transmission carriers are set to 1536 (1792-256).

[146] Accordingly, i is an integer from 0 to 2047 and n is an integer from 0 to 1535. FI(i) denotes a permutation obtained by a modulo-2048 operation, dn has a FI(i) value with respect to a value 256<(i)<792 excluding a value 1024(N/2) in sequence, k denotes a value obtained by subtracting 1024 from dn. P has a value of 13.

[147] Using the above-described interleaver, since data k corresponding to the input data i is output, the data having the length N of the interleaver may be transmitted in a state in which the sequence thereof is changed.

[148] FIG. 6 is a view showing an example of the multi-input/output encoding method according to an embodiment of the present invention. The embodiment of FIG. 6 is the STBC which is one of the multi-input/output encoding methods and may be used in the transmitting apparatus shown in FIG. 1. The encoding method is exemplary and other multi-input/output encoding methods may be used.

[149] In the example of the STBC encoder, T denotes a symbol transmission period, s denotes an input symbol to be transmitted, and y denotes an output symbol. "*" denotes a complex conjugate, and a first antenna (Tx #1) and a second antenna (Tx #2) denote a first transmission antenna and a second transmission antenna 2, respectively.

[150] In this example, at a time t, the first antenna Tx #1 transmits s0 and the second antenna Tx #2 transmits si. At a time t+T, the first antenna Tx #1 transmits -si* and the second antenna Tx #2 transmits sθ*. The transmission antennas transmit data having the same information of s0 and si in the transmission period. Accordingly, the receiving apparatus can obtain spatial diversity effect using the signals output from the multi-input/output encoder according to the shown method.

[151] The signals transmitted by the first antenna and the second antenna are examples of the multi-input/output encoded signals. When FIG. 30is described from a different viewpoint, the signals transmitted by the first antenna and the second antenna may be transmitted by a multi-input single-output method.

[152] In thisexample, it may be considered that two temporally consecutive signals s0 and - si* are input to a path of the first antenna and signals si and sθ* are input to a path of the second antenna. Accordingly, since the signals s0 and -si* are consecutively output to the first antenna and the signals s 1 and sθ* are output to the second antenna, it may be considered that the output symbols are transmitted by the multi-input single-output method. The above exampleshows a simplest example using two antennas. The signals may be transmitted using more antennas.

[153] That is, when the above example is described by the multi-input single-output method, the first symbol and the second symbol consecutive to the first symbol (sθ, -

sl*) are multi-input and a minus of a complex conjugate of the second symbol (sO, - si*) and a complex conjugate (sl, sO*) of the first symbol are simultaneously output. The multi-input symbols may be encoded according to an Alamouti algorithm and the encoded symbols may be output.

[154] The multi- input/output encoder may transmit the signals which are interleaved by the second interleaver in the frequency domain, by the multi-input single-output method. The multi-input/output (including the multi-input single-output) shown in the above example may be not applied to the pilot symbol interval shown in FIGs. 31 and 32 and may be applied to only the data symbol interval.

[155] FIG. 7 is a view showing a structure of a transmission frame. The transmission frame may include a pilot symbol interval including pilot carrier information and a data symbol interval including only data information.

[156] In the example of FIG. 7, a frame includes M intervals and is divided into M-I data symbol intervals and a pilot symbol interval which is used as a preamble. The frame having the above-described structure is repeated.

[157] Each symbol interval includes carrier information by the number of OFDM subcarriers. The pilot carrier information of the pilot symbol interval is composed of random data in order to decrease a peak- to- average power ratio (PAPR). An autocorrelation value of the pilot carrier information has an impulse shape in a frequency domain.

[158] The pilot carrier information may not be included in the data symbol interval, and, accordingly, it is possible to increase a data capacity. In the DVB, for example, since a percentage of pilot carriers in all the valid carriers is about 10%, the increasing rate of the data capacity is expressed by Math Figure 1.

[159] [Math Figure 1]

[161] In Math Figure 1, δ denotes the increasing rate and M denotes the number of intervals included in a frame.

[162] When the transmitting system of FIG. 1 performs multi-input/output encoding using the plurality of antennas, the structure of the pilot symbol is decided such that the receiving apparatus distinguishes between the transmission paths.

[163] FIG. 8 is a view showing a structure of the pilot carriers in the pilot symbol inter- valsbuilt by the first and second frame builders of FIG. 1, according to an embodiment of the present invention. The pilot symbol intervals built by the frame builders of FIG. 8 may be output as shown in FIG. 1.

[164] In FIG. 8, in the pilot symbol intervals output from the first and second frame builders, even-numbered and odd-numbered pilot carriers are interleaved as shown in FIG. 31 and are output to the first and second antennas (antenna #1 and antenna #2). For example, only the even-numbered pilot carrier information of the built pilot carriers is included in the pilot symbol interval built by the first frame builder and the even-numbered pilot carriers are transmitted via the first antenna #0. In addition, only the odd-numbered pilot carrier information of the built pilot carriers is included in the pilot symbol intervalbuilt by the second frame builder and the odd-numbered pilot carriers are transmitted via the first antenna #1. Accordingly, the receiving apparatus can distinguish between the transmission paths using the carrier indexes of the pilot symbol intervals received via the two signal paths. The structure of the pilot symbol intervals of Fig. 8 may be used when the multi-input/output encoding is performed so as to have two transmission paths.

[165] In the above embodiment, a channel corresponding to a subcarrier of a half of a frame may be estimated from a symbol. Accordingly, high channel estimation performance can be obtained with respect to a transmission channel having a short coherence time.

[166] FIG. 9 is a view showing another structure of the pilot symbol intervals according to an embodiment of the present invention. Even in the example of FIG. 9, different pilot carriers are transmitted to the pilot symbol intervals with respect to the paths according to the multi-input/output encoding method.

[167] The pilot carrier transmission structure of the pilot symbol intervals shown in FIG. 9is called a Hadamard type pilot carrier transmission structure. In the embodiment of FIG. 9, Hadamard conversion is performed in the unit of a symbol interval in order to distinguish between the two transmission paths. For example, pilot carriers obtained by adding the two pieces of pilot carrier information for the transmission paths are transmitted to the even-numbered symbol interval and a difference between the two pieces of pilot carrier information is transmitted to the odd-numbered symbol interval.

[168] It can be explained along with the pilot symbol intervals including even-numbered intervals and odd-numbered intervals. The even-numbered symbol of the pilot carriers is transmitted via the first path (denoted by the first antenna (antenna #0)) and the second path (denoted by the second antenna (antenna #1). Accordingly, the receiving apparatus can use the pilot carriers obtained by adding the pilot carriers transmitted via the two paths. The odd-numbered symbol of the pilot carrier is transmitted via a first path (first antenna (denoted by antenna #0)) and the pilot carrier having a phase difference of 180 degrees with respect to the odd-numbered symbol is transmitted via a second path (second antenna (denoted by antenna #1)). Accordingly, the receiver can recognize the sum of or the difference between the two pieces of pilot carrier in-

formation via the received pilot index so as to distinguish between the transmission paths.

[169] In thisembodiment, a channel corresponding to all subcarriers can be estimated and the estimation length of delay spread of the channel which can be processed by each transmission path can be extended by a symbol length.

[170] The example of FIG. 9 is shown for facilitating the distinguishment between the two pieces of pilot carrier information and shows both the two pieces of pilot carrier information in the frequency domain. In the even-numbered symbol interval and the odd- numbered symbol interval, impulses of the two pieces of pilot carrier information are located at the same frequency point.

[171] The embodiments of FIGs. 8 and 9are examples of having two transmission paths. If the number of transmission paths is larger than 2, the pilot carrier information may be divided so as to be distinguished by the number of transmission paths similar to FIG. 8or may be subjected to Hadamard conversion in the unit of a symbol interval and the converted information may be transmitted similar to FIG. 9.

[172] FIG. 10 is a schematic block diagram showing an apparatus for receiving a signal according to an embodiment of the present invention. The embodiment of FIG. 10 may be included in the DVB receiving apparatus.

[173] The embodiment of FIG. 10 includes a first receiver 900, a second receiver 905, a first synchronizer 910, a second synchronizer 915, a first demodulator 920, a second demodulator 925, a first frame parser 930, a second frame parser 935, a multi- input/output decoder 940, a first deinterleaver 950, a linear pre-coding decoder 960, a symbol demapper 970, a second deinterleaver 980, an inner decoder 990, a third in- terleaver 992, and an outer decoder 994.

[174] The first receiver 900 and the second receiver 905 receive RF signals, down-convert frequency bands, convert the signals into digital signals, and output the digital signals, respectively. The first synchronizer 910 and the second synchronizer 915 acquire synchronizations of the received signals output from the first receiver 900 and the second receiver 905 in the frequency domain andthe time domain and output the synchronizations, respectively. The first synchronizer 910 and the second synchronizer 915 may use offset results of the data output from the first demodulator 920 and the second demodulator 925 in the frequency domain, for acquiring the synchronizations of the signal in the frequency domain, respectively.

[175] The first demodulator 920 demodulates the received data output from the first synchronizer 910. The first demodulator 920 converts the received data into the frequency domain and decodes the data dispersed in the subcarriers to the data allocated to the subcarriers. The second demodulator 925 demodulates the received data output from the second synchronizer 915.

[176] The first frame parser 930 and the second frame parser 935 distinguish between the reception paths according to the frame structures of the signals demodulated by the first demodulator 920 and the second demodulator 925 and output symbol data of the data symbol interval excluding the pilot symbol, respectively.

[177] The multi- input/output decoder 940 receives the data output from the first frame parser 930 and the second frame parser 935, decodes the data, and outputs a data stream. The multi-input/output decoder 940 decodes the data stream received via the plurality of transmission antennas according to a method corresponding to the transmitting method of the multi- input/output encoder 170 shown in FIG. land outputs a data stream.

[178] The first deinterleaver 950 deinterleaves the data stream output from the multi- input/output decoder 940 and decodes the data into the sequence of the data before interleaving. The first deinterleaver 950 deinterleaves the data stream according to a method corresponding to the interleaving method of the third interleaver 160 shown in FIG. 1 and restores the sequence of the data stream.

[179] The linear pre-coding decoder 960 performs an inverse process of the process of dispersing the data in the apparatus for transmitting the signal. The linear-pre-coding decoder 960 performs the decoding process in a manner corresponding to the encoding method of the linear pre-coder 150 of FIG. 1.

[180] The linear pre-coding decoder 960 converts the input data into parallel data and restores the original data from the data dispersed via a decoding matrix. The decod- ingmatrix for performing decoding becomes an inverse matrix of the encoding matrix of the apparatus for transmitting the signal. Alternatively, the received symbol data may be ML-decoded so as to correspond to the transmitting method and restored to the original data dispersed in the parallel data. That is, the received symbol data may be ML-decoded in consideration of an encoding rule of the transmitting apparatus. The restored data is converted into serial data and the serial data is output.

[181] The linear pre-coding decoder 930 may be used or may not be used depending on whether or not the linear pre-coder 150 is used in the transmitting apparatus.

[182] The symbol demapper 970 may restore the coded symbol data output from the linear pre-coding decoder 960 into a bit stream. The second deinterleaver 980 deinterleaves the data stream output from the symbol mapper 970 and restores the data into the sequence of the data before interleaving. The second deinterleaver 980 deinterleaves the data according to a method corresponding to the interleaving method of the second interleaver 130 shown in FIG. land restores the sequence of the data stream.

[183] The inner decoder 990 and the outer decoder 994 FEC-decodes the data, in which the sequence of the data stream is restored, detects an error which occurs in the received data, and corrects the error. The third interleaver 992 deinterleaves the data decoded by

the inner decoder 990 and the restores the sequence of the data. The third deinterleaver 992 deinterleaves the data according to a method corresponding to the interleaving method of the first interleaver 110 shown in FIG. 1. Similarly, the third interleaver 992 may be used or may not be used depending on whether or not the first interleaver 110 is used in the transmitting apparatus.

[184] FIG. 11 is a view showing an example of the multi-input/output decoding method according to an embodiment of the present invention. That is, FIG. 11 shows a decoding example of the receiving apparatus when the transmitting apparatus multi- input/output encodes data by the STBC method and transmits the encoded data. The transmitting apparatus may use two transmission antennas. This is only exemplary and another multi-input/output method may be applied.

[185] In the equation, r(k), h(k), s(k) and n(k) represent a symbol received by the receiving apparatus, a channel response, a symbol value transmitted by the transmitting apparatus, and channel noise, respectively. Subscripts s, i, 0 and 1 represent a s transmission symbol, an i reception antenna, 0 transmission antenna and 1 ^st transmission antenna, respectively. "*" represents a complex conjugate. For example, h (k) represents a response of a channel experienced by the transmitted symbol when a s symbol transmitted via the first transmission antenna is received by the i reception antenna. R s+l,i (k) represents a s+l' reception symbol received by the i reception antenna. [186] According to the equation of FIG. 11, r (k) which is a s reception symbol received by the i reception antenna becomes a value obtained by adding the s symbol value transmitted from the 0 transmission antenna to the i reception antenna via the channel, the s symbol value transmitted from the 1 ^st transmission antenna to the i reception antenna via the channel and a sum n (k) of the channel noises of the channels. [187]

via

[188] FIG. 12 is a view showing a detailed example of FIG. 11 according to an embodiment of the present invention. FIG. 12 shows a decoding example when the transmitting apparatusmulti-input/output encodes data by the STBC method and transmits the encoded data, that is, shows an equation which can obtain the received symbol when the data is transmitted using two transmission antennas and the data transmitted via the two transmission data is received using one antenna.

[189] If the transmitting apparatustransmits a signal using two transmission antennas and

the receiving apparatus receives the signal using one transmission antenna, the number of transmission channels may be two. In the equation, h and s respectively represent a transmission channel response from the 0 transmission antenna to the reception antenna and a symbol transmitted from the 0 transmission antenna, and h and s re- i i spectively represent a transmission channel response from the 1st transmission antenna to the reception antenna and a symbol transmitted from the 1 ^st transmission antenna. "*" represents a complex conjugate and s ' and s ' of the following equation represent restored symbols.

[190] In addition, r and r respectively represent a symbol by the reception antenna at a time t and a symbol received by the reception antenna at a time t+T after a transmission period T is elapsed, and n and n represent values of sums of channel noises of the transmission paths at reception times.

[191] The signal (r , r ) received via the reception antenna may be expressed by a value obtained by adding a value in which the signals transmitted via the transmission antennas are distorted by the respective transmission channels. The restored symbol (s o

', s ') may be calculated using the received signal (r , r ) and the channel response value (h , h ).

[192] FIG. 13 is a schematic block diagram showing the deinterleaver and the FEC decoder according to an embodiment of the present invention. The inner decoder 990, the third deinterleaver 992 and the outer decoder 994 correspond to the inner decoder 120, the first interleaver 110 and the outer encoder 100 of FIG. 1, respectively. As the inner decoder and the outer decoder, the LDPC decoder 990 and the BCH decoder 994 are included, respectively.

[193] The LDPC decoder 990 detects a transmission error which occurs in a channel and corrects the error, and the third deinterleaver 992 deinterleaves the input data and outputs the deinterleaved data. The BCH decoder 994 corrects the remaining error of the data decoded by the LDPC decoder 990 and removes an error floor.

[194] FIG. 14 is a schematic block diagram showing another example of the apparatus for transmitting the signal according to an embodiment of the present invention. FIG. 15 is a schematic block diagram showing another example of the apparatus for receiving the signal according to an embodiment of the present invention.

[195] FIGs. 14 and 15 show examples of applying a single-input single-output (SISO) method, instead of the multi-input multi-output method.

[196] The signal transmitting apparatus of FIG. 14 includes an outer encoder 1300, a first interleaver 1310, an inner encoder 1320, a second interleaver 1330, a symbol mapper 1340, a linear pre-coder 1350, a third interleaver 1360, a frame builder 1370, a modulator 1380 and a transmitter 1390.

[197] The signal receiving apparatus of FIG. 15 includes a receiver 1400, a synchronizer

1410, a demodulator 1420, a frame parser 1430, a first deinterleaver 1440, a linear pre- coding decoder 1450, a symbol demapper 1460, a second deinterleaver 1470, an inner decoder 1480, a third deinterleaver 1490 and an outer decoder 1495.

[198] The signal transmitting apparatus and the signal receiving apparatus perform the same processes as FIGs. 1 and 10. Since the SISO method is applied to the signal transmitting/receiving apparatus of FIGs. 14 and 15 instead of the MIMO, the multi- input/output encoding process and the multi-input/output decoding process are not used.

[199] That is, the symbol data interleaved by the third interleaver 1370 so as to become robust against the frequency-selective fading of the channel is input to the frame builder 1370 and the frame builder 1370 builds frame data using the input symbol data and outputs the frame data. Similarly, the first interleaving process or the linear pre- coding process may not be used according to implementation embodiments. In the SISO method, the distinquishment between the transmission paths according to the multi-input/output of FIGs. 8 and 9 is not required.

[200] In the signal receiving apparatus, the symbol data parsed by the frame parser 1430 is output to the first deinterleaver 1440 which performs the inverse process of the process of processing the data so as to become the robust against the frequency-selective fading of the channel by the transmitting apparatus.

[201] In the signal transmitting apparatus of FIG. 1 or FIG. 14, the symbol mapper 140 or 1340 may map the input signal to symbols according to an optimal constellation method and output the mapped symbols.

[202] FIG. 16 is a schematic view showing the positions of points of an optimal constellation accordingto an embodiment of the present invention. For optimal constellation mapping, the above-described constellation points shown in FIG. 2 may be used. The constellation points indicate the positions of the symbols mapped in the constellation. The numerals described on the constellation points indicate powers of the points.

[203] The x-axis (horizontal axis of y=0) values of the optimal constellation points may be odd numbers (1, 3, 5, ...) or even numbers (2, 4, 6, ...) and the y-axis (vertical axis of x=0) values thereof may be an integral multiple of V3.

[204] For example, the points positioned on the x axis have the odd numbers of 1, 3, 5, ... and the powers thereof are 1, 9, 25.... The points positioned on the y axis have the values of V3, 3V3, 5V3 ... and the powers thereof are 3, 27, 75, .... In the point having a power of 13, the x-axis value is 1 and the y-axis value is 2V3. In the point having a power of 7, the x-axis value is 2 and the y-axis value is V3.

[205] As shown, the transmission power of the symbols can be efficiently used by arranging points close to a circle form and arranging points as far as possible from a

DC position. If the symbols are arranged according to the shown constellation, gaps between neighboring symbols are equalized and thus a SNR gain can be obtained. Accordingly, it is possible to minimize the transmission power of the symbols by arranging the symbols in a circle form centered on a DC (an original point of the constellation) according to the shown constellation. Hereinafter, a constellation in which the symbols are arranged such that the gaps between neighboring symbols are equalized is called an optimal constellation. In the example of FIG. 16, three neighboring symbols are arranged in a regular triangle form in the constellation.

[206] Instead of the positions of the points shown in FIG. 16, the positions obtained by symmetrically arranging the points with respect to the x axis, the y axis or the original point may be used. Alternatively, the positions obtained by rotating the points about the original point by any angle may be used. This may vary according to implementation embodiments.

[207] FIG. 17 is a flowchart illustrating a method of deciding points of an optimal constellation according to an embodiment of the present invention. A necessary number of optimal constellation points are obtained from the constellation points shown in FIG. 17.

[208] First, constellation points having asmallest power are selected from the constellation points shown in FIG. 17 (S 1600). The number of constellation points selected is compared with the number of necessary constellation points (S1610). If the number of constellation points selected is smaller than the number of necessary constellation points, the step S 1600 is performed again such that constellation points having a smallest power are selected from the points which are not previously selected. If the number of constellation points selected is larger than the number of necessary constellation points, the constellation points are removed in descending order of the power by the excessive number of points (S 1620). A desired number of constellation points can be obtained by the above-described process, and the input data can be mapped to symbol data using the obtained constellation points.

[209] FIGs. 18 to 21 are schematic views showing optimal constellations having points selected by the above-described process, according to the embodiments of the present invention. That is, FIGs. 18 to 21 are schematic views showing the positions of optimal constellations having 16 points, 64 points, 256 points and 256 points, respectively.

[210] FIG. 20 shows another embodiment having positions different from the constellation point positions shown in FIG. 16, in which a symbol is arranged on the DC or symbols are arranged very close to the DC. In contrast, FIG. 21 shows an example in which 256 symbols are arranged such that a symbol is not arranged on the DC.

[211] As described above, instead of the point positions of FIGs. 18 to 21, the positions obtained by symmetricallyarranging points positioned according to the method

described with reference to FIG. 3 with respect to the x axis, the y axis or the original point may be used. Alternatively, the positions obtained by rotating the points about the original point by any angle may be used. This may vary according to implementation embodiments.

[212] In the case that the symbols are mapped according to the optimal constellation method, in the signal receiving apparatus of FIG. 9 or 14, the symbol demapper 970 or 1460 demaps the input signal to the symbol according to the optimal constellation method. Hereinafter, for convenience of description, it is assumed that the symbol mapper 140 or 1340 of FIG. or FIG. 13 maps the symbol data according to the optimal constellation mapping method having 64 points. The number of points is decided for convenience of description and is only exemplary.

[213] FIG. 22 is a schematic block diagram showing decision boundaries of the optimal constellation having 64 points. The symbol demapper 970 or 1460 demaps the received symbol data using the decision boundaries shown in FIG. 21. In the optimal constellation mapping method, the constellation has a honeycomb shape in order to efficiently use the transmission power, and, in the symbol demapper 970 or 1460, each symbol has a hexagonal decision boundary as shown in FIG. 21. Each of symbols corresponding to points positioned at outermost sides has a decision boundary of which one side is opened, instead of the hexagonal decision boundary.

[214] If it is recognized that the input symbol data is positioned in a specific hexagon of the decision boundary shown in FIG. 22, the symbol demapper 970 or 1460 demaps the input symbol data to a symbol of the point corresponding to the specific hexagon.

[215] FIG. 23 is a schematic block diagram showing the symbol demapper for demapping a received optimal constellation symbol according to an embodiment of the present invention. FIG. 24 is a schematic block diagram showing another symbol demapper for demapping a received optimal constellation symbol according to an embodiment of the present invention.

[216] The symbol demapper 970 or 1460 may demap the symbol using all the decision boundariesof the optimal constellation shown in FIG. 22 at a time or may demap the symbol using a rectangular decision boundary like the symbol demapper of FIG. 23 or 24.

[217] The symbol demapper of FIG. 23 includes a decision unit 2200, a second decision unit 2202, a first rotation unit 2204, a third decision unit 2206, a fourth decision unit 2208, a second rotation unit 2210, a fifth decision unit 2212, a sixth decision unit 2214, and a bit converter 2216.

[218] When the symbol data is input to the symbol demapper 970 or 1460, the first decision unit 2200 decides whether the input symbol data is positioned in a rectangular decision boundary region using the rectangular decision boundary region formed by

two opposite sides of each of hexagonal decision boundary regions. The second decision unit 2202 decides whether the input symbol data is positioned in a constellation edge region, that is, in an edge region, of which one side is opened, in all the decision boundaries shown in FIG. 22. The second decision unit 2202 decides whether the symbol is positioned in a decision boundary region denoted by a solid line among the edge regions of the constellation. The first decision unit 2200 and the second decision unit 2202 decide the position of the input symbol data using the decision boundaries which are not rotated.

[219] The first rotation unit 2204 rotates the decision boundaries used in the first decision unit 2200 and the second decision unit 2202 by 60 degrees. The data output from the first rotation unit 2204 is input to the third decision unit 2206. The third decision unit 2206 decides whether the input symbol data is positioned in the rectangular decision boundary region using the rectangular decision boundary region formed by two opposite sides of the hexagonal decision boundaryregion among all the decision boundary regions rotated by 60 degrees. The fourth decision unit 2208 decides whether the input symbol data is positioned in the constellation edge region. The fourth decision unit 2208 decides whether the symbol is positioned in a decision boundary region denoted by a dashed dotted line, among the constellation edge regions. The third decision unit 2206 and the fourth decision unit 2208 decide the position of the input symbol data using the decision boundaries rotated by 60 degrees.

[220] The second rotation unit 2210 rotates all the decision boundaries used in the third decision unit 2206 and the fourth decision unit 2208 by 60 degrees. The data output from the second rotation unit 2210 is input to the fifth decision unit 2212.The fifth decision unit 2212 decides whether the input symbol data is positioned in the rectangular decision boundary using the rectangular decision boundary formed by two opposite sides in each of the hexagonal decision boundary regions among all the decision boundary regions rotated by 60 degrees again. The sixth decision unit 2214 decides whether the input symbol data is positioned in the constellation edge region. The sixth decision unit 2214 decides whether the symbol is positioned in a decision boundary region denoted by a dotted line, among the constellation edge regions. The fifth decision unit 2212 and the sixth decision unit 2214 may decide the position of the input symbol data using the decision boundaries rotated two times, that is, using the decision boundaries rotated from the original decision boundaries by 120 degrees.

[221] If the constellation edge regions are decided by the second decision unit 2202, the fourth decision unit 2208 and the sixth decision unit 2214, the decision of the posi- tionparallel to the x axis and the y axis is performed using a saturation method and the decision of the position of an oblique line is performed using a linear equation corresponding to the oblique line.

[222] The bit converter 2216 converts the information decided by the determination units, that is, the value decided to the symbol of the point corresponding to the input symbol data, into bit data corresponding to the decided symbol value.

[223] All the two times of rotation processes and the six times of decision processes may be performed. Alternatively, if the symbol of the point corresponding to the received symbol data is decided by a specific decision of six times of decision processes, the decision information may be output to the bit converter 2216 and may be converted to the bit data without further performing the rotation or decision process. This may vary according to implementation examples. Although the rotation units rotate the decision boundaries by 60 degrees in this embodiment, the decision boundaries may be rotated by -60 degrees.

[224] FIG. 23 is a schematic block diagram showing another symbol demapper for demapping a received optimal constellation symbol according to an embodiment of the present invention. The symbol demapper of FIG. 23 uses a recursive decoding method using a feedback.

[225] The symbol demapper of FIG. 23 includes a buffer 2220, a selector 2222, a first decision unit 2224, a second decision unit 2226, a rotation unit 2228, and a bit converter 2230.

[226] The buffer 2220 temporarily stores and outputs the input symbol data. The selector 2222 receives the symbol data output from the buffer 2220 and the symbol data output from the rotation unit 2228 and outputs one piece of symbol data. The selector 2222 outputs the symbol data fed back from the rotation unit 2228 when the recursive decoding method is performed and outputs the symbol data received from the buffer 2220 when a decision process is performed with respect to new symbol data.

[227] The first decision unit 2224 decides whether the input symbol datais positioned in the rectangular decision boundary region using the rectangular decision boundary region formed by two opposite sides in each of the hexagonal decision boundary regions. The second decision unit 2226 decides whether the input symbol data is positioned in a constellation edge region, that is, an edge region, of which one side is opened, in the decision boundaries shown in FIG. 21. The second decision unit 2226 decides whether the input symbol data is positioned in a decision boundary region denoted by a solid line (non-rotation), a dashed dotted line (one time of rotation), or a dotted line (two times of rotation) according to the number of times of rotation. The rotation unit 1028 may rotate the decision boundaries used in the first decision unit 2224 and the second decision 2226 by 60 degrees. Alternatively, the decision boundaries are rotated by -60 degrees according to implementation embodiments.

[228] The bit converter 2230 converts the information decided by the decision units, that is, the value decided to the symbol of the point corresponding to the input symbol data,

into bit data corresponding to the decided symbol value.

[229] The symbol demapper of FIG. 24 may perform all the two times of rotation processes and the six times of decision processes. Alternatively, if the symbol of the point corresponding to the received symbol data is decided by the first decision unit 2224 and the second decision unit 2226 during the recursive decoding process, the decision information may be output to the bit converter 2230 and may be converted into the bit data. This may vary according to implementation examples.

[230] FIG. 25 is a schematic view showing a process of demapping a received symbol according to an embodiment of the present invention. FIG. 25 shows four hexagonal decision boundary regions in all the decision boundaries.

[231] FIG. 25 shows a deciding process of a decision unit which decides whether the symbol data is positioned in the rectangular decision boundary region using the rectangular decision boundary region formed by two opposite sides in the hexagonal boundary region, among the decision units of FIG. 24 or 25.

[232] First, in a first decision boundary form which is not rotated, it is decided whether the input symbol data is positioned in the rectangular decision boundary region, using the rectangular decision boundary region formed by two opposite right and left sides of each of the hexagonal decision boundary regions. If the decision is completed, all the decision boundaries are rotated by 60 degrees and it is decided whether the input symbol data is included in the rectangular decision boundary region, using the rectangular decision boundary region formed by two opposite right and left sides of each of the hexagonal decision boundary regions. Then, all the decision boundaries are rotated by 60 degrees again and it is decided whether the input symbol data is included in the rectangular decision boundary region, using the rectangular decision boundary region formed by two opposite sides of each of the hexagonal decision boundary regions. In FIG. 25, a second decision boundary form and a third decision boundary form represent regions which are subjected to the decision process while performing the rotation process.

[233] By two times of rotation processes, therectangular decision boundary regions cover the whole hexagonal region. Accordingly, each of the hexagonal decision boundary regions can be demapped to the symbols corresponding to the points having the hexagonal decision boundary region.

[234] According to the implementation example, if it is determined that the input symbol data is positioned in the rectangular decision boundary region, the decision process may be completed without further performing the rotation and the decision. Although the rectangular decision boundary region formed by two opposite right and left sides of the hexagon is used, a region using two opposite sides other than the right and left sides, for example, a parallelogramdecision boundary region may be first used or a

rectangular decision boundary region formed by two upper and lower sides may be first used.

[235] FIG. 26 is a schematic view showing a process of demapping a received optimal constellation symbol in an edge region according to an embodiment of the present invention.

[236] FIG. 26 is a view showing all the decision boundaries of a 64-point optimal constellation mapping method. FIG. 26 shows a deciding process of the decision unit which decides whether input symbol data is positioned in the constellation edge region, that is, the edge region of which one side is opened, by the decision units of FIGs. 23 and 24.

[237] First, in a first decision boundary form which is not rotated, it is decided whether the input symbol data is positioned in a region denoted by a solid line among the constellation boundary regions. If the decision is completed, all the decision boundaries are rotated by 60 degrees and it is decided whether the input symbol data is included in a region denoted by a dashed dotted line among the constellation boundary regions. Then, all the decision boundaries are rotated by 60 degrees again and it is decided whether the input symbol data is included in a region denoted by a dotted line among the constellation boundary regions.

[238] According to the implementation embodiments, the sequence of the region denoted by the solid line, the region denoted by the dashed dotted line and the region denoted by the dotted line may be changed. For example, after the region denoted by the dotted line is decided in the first decision boundary form of FIG. 24, the region denoted by the solid line (one time of rotation) and the region denoted by the dashed dotted line (two times of rotation) may be decided.

[239] Similarly, although the decision boundaries are rotated by 60 degrees in the examples of FIGs. 23 and 24, the decision boundaries may be rotated by -60 degrees according to implementation embodiments.

[240] FIG. 27 is a schematic block diagram showing another example of an apparatus for transmitting a signal according to an embodiment of the present invention. FIG. 27 shows an example of applying a multi-mapping method to the signal transmitting apparatus of FIG. 1.

[241] The embodiment of FIG. 27 includes an outer encoder 2500, an inner encoder 2510, a first interleaver 2520, a multi-mapper 2530, a linear pre-coder 2540, a second in- terleaver 2550, a frame builder 2560, a modulator 2570 and a transmitter2580. According to implementation examples, an outer interleaver may be inserted between the outer encoder 2500 and the inner encoder 2510 and a multi-input encoder may be inserted between the second interleaver 2550 and the frame builder 2560.

[242] The outer encoder 2500 and the inner encoder 2510encode an input signal and output

the encoded signal such that an error generated in transmitted data is detected and corrected by the receiving apparatus. That is, the outer encoder 2500 and the inner encoder 2510 configure a FEC encoder. The type of the encoder may be changed according to the coding method used in the signal transmitting system.

[243] The first interleaver 2520 shuffles the data output from the inner encoder 25 lOto random positions so as to become robust against a burst error which occurs in the data when the signal output from the inner coder 2510 is transmitted. For example, the first interleaver 2520 can use a convolution interleaver or a block interleaver. The interleaving method of the first interleaver 2520 may be changed according to the method used in the signal transmitting system.

[244] The multi-mapper 2530 maps the data interleaved by the first interleaver 2520 to symbols according to the transmitting method. The multi-mapper 2530 maps the input data to symbol data using a mixture of a plurality of mapping methods. As the mapping method, a quadrature amplitude modulation (QAM), a quadrature phase shift keying (QPSK), an amplitude phase shift keying (APSK), a pulse amplitude modulation (PAM) or an optimal constellation may be used.

[245] Using the multi-mapping method, a signal-to-noise ratio (SNR) gain can be obtained by a method of mapping to a small constellation size and a capacity gain can be obtained by a method of mapping to a large constellation size. Accordingly, it is possible to adjust the SNR gain and the capacity gain and increase transmission efficiency by adjusting the mixture ratio of the mapping methods.

[246] The linear pre-coder 2540 disperses input symbol data into several pieces of output symbol data so as to decrease a probability that all information is lost due to fading when experiencing frequency- selective fading of a channel. The linear pre-coder 2540 may not be used according to implementation embodiments.

[247] The second interleaver 2550 interleaves the symbol data output from the linear pre- coder 2540 again such that the symbol data does not experience the same frequency- selective fading. The second interleaver 2550 may use a convolution interleaver or a block interleaver.

[248] The frame builder 2560 inserts a pilot signal into a data interval to build a frame such that the interleaved signal is modulated by an orthogonal frequency division multiplex (OFDM) method. The modulator 2570 inserts a guard interval into the data output from the frame builder 2560 and modulates the inserted data such that the data is transmitted in a state of being carried in OFDM subcarriers. The transmitter 2580 converts the digital signal having the guard interval and the data interval, which is output from the modulator 2570, into an analog signal and transmits the converted analog signal.

[249] FIG. 28 is a schematic block diagram showing the multi-mapper according to the

embodiment of the present invention. The multi-mapper 2530 includes a bitstream distributor 2531, a first mapper 2532, a second mapper 2533, ..., an N' mapper 2534 and a symbol interleaver 2535.

[250] The bitstream distributor 2531 distributes the input bit data into several mappers. The bitstream distributor 2531 distributes a necessary number of bit data in order to map the bit data to the symbols according to the mapping methods of the mappers.

[251] The bit data distributed by the bitsream distributor 2531 is output to the mappers (the first mapper 2532 to the N mapper 2534). The first mapper 2532 to the N mapper 2534 configure a mapping unit for mappingthe input bit data to the symbol data. The mappers map the input bit data to the symbol data according to the respective mapping methods. As the mapping methods, the QAM, the QPSK, the APSK, the PAM, and the optimal constellation may be used.

[252] The mappers (the first mapper 2532 to the N mapper 2534) may be equal to one another in the mapping method and different from one another in the number of bit data included in one symbol or may be different from one another in the mapping method. For example, while all the first mapper 2532 to the N mapper 2534 use the QAM method, the first mapper 2532 may map the symbol by the 16QAM method, the second mapper 2533 may map the symbol by the 64QAM method, and the N mapper 2534 may map the symbol by the 256QAM method. Alternatively, the first mapper 2532 may map the symbol by the QAM method and the N mapper 2534 may map the symbol by the optimal constellation method. This may vary according to the implementation embodiments.

[253] The mappers (the first mapper 2532 to the N mapper 2534) map the input data to symbols according to predetermined mapping methods and output the mapped data.

[254] The symbol interleaver 2535 interleaves and aligns the symbol data output from the mappers to one symbol stream and outputs the symbol stream. As the interleaving method, a block interleaving method, a convolution interleaving method or anin- terleaving method using bit-reversed addressing, which sets the symbols to one block and outputs the addresses corresponding to the order of the block in bit-reversed order, may be used. Alternatively, the symbol data output from the mappers may be aligned and output without interleaving the symbol data. This may vary according to the implementation embodiments.

[255] FIG. 29 is a view showing a bitstream distributing method according to an embodiment of the present invention. That is, the bitstream distributing method is an example of the method of distributing the bitstream by the bitstream distributor 2531.

[256] In the bitstream distributing method of FIG. 29, the input bit data is stored in a memory space having a matrix shape in a predetermined pattern and the data is read and output in a pattern different from the storage pattern. In this case, a virtual in-

terleaver function can be obtained.

[257] For convenience of description, it is assumed that the number of mappers to which the input bit data will be distributed is 2. For example, if the length of one block input to the bitstream distributor 2531 is MN bits, the block is divided by M and data is stored in the memory space from a first row and a first column. The data is stored from the first row of the first column to an M row of the first column and, when all the rows of the first column are filled up, the data is stored from the first row to the M row of a next column (second column). The data may be stored in the above-described order up to the M row of an N column. At this time, the position of a most significant bit (MSB) of the memory space is an uppermost left part and the position of a least significant bit (LSB) thereof is a lowermost right part.

[258] In the two mappers, if a ratio of bits to symbols of the first mapper and the second mapper is M-R:R, the data stored in the memory space is divided into M-R rows and R rows. The divided bit data is output in a row direction. That is, the data is read and output from the first row and the first column to the first row and the N column and, when all the data of the row is read, the data is read and output from the first column of a next row (the second row) in the right direction. The data is read in the above- described order up to the M-R row and is output to the first mapper. Even with respect to the R rows, the data is read in the row direction and is output to the second mapper.

[259] In the present embodiment, the size of the block, the storage pattern, and the read pattern are only exemplary and may vary according to the implementation examples. For example, the input bit data can be distributed to the mappers in input order.

[260] FIG. 30 is a schematic block diagram showing an apparatus for receiving a signal according to an embodiment of the present invention. The embodiment of FIG. 30 is the receiving apparatus corresponding to the transmitting apparatus of FIG. 27 and shows the case of using a multi-mapping method in the signal receiving apparatus of FIG. 10.

[261] The embodiment of FIG. 30 includes a receiver 2800, a synchronizer 2810, a demodulator 2820, a frame parser 2830, a first deinterleaver 2840, a linear pre-coding decoder 2850, a multi-demapper 2860, a second deinterleaver 2870, an inner decoder 2880 and an outer decoder 2890. According to implementation embodiments, an outer interleaver may be inserted between the inner decoder 2880 and the outer decoder 2890 and a multi-input/output decoder may be inserted between the frame parser 2830 and the first deinterleaver 2840.

[262] The receiver 2800 down-converts the frequency band of a received RF signal, converts the signal into a digital signal, and outputs the digital signal. The synchronizer 2810 acquires synchronization of the received signal output from the receiver 2800 in a

frequency domain and a time domain and outputs the synchronization. The synchronizer 2810 may use an offset result of the data output from the demodulator 2820 in the frequency domain, for acquiring the synchronization of the signal in the frequency domain.

[263] The demodulator 2820 demodulates the received data output from the synchronizer 2810 and removes the guard interval. The demodulator 2820 may convert the received data into the frequency domain and decode data values dispersed into the subcarriers to the values allocated to subcarriers. The frame parser 2830 may output symbol data of the data symbol interval excluding the pilot symbol according the frame structure of the signal demodulated by the demodulator 2820.

[264] The first deinterleaver 2840 deinterleaves the data stream output from the frame parser 2830 and restores the data into the sequence of the data before interleaving. The first deinterleaver 2840 deinterleaves the data stream according to a method corresponding to the interleaving method of the second interleaver 2550 shown in FIG. 25 and restores the sequence of the data stream.

[265] The linear pre-coding decoder 2850 performs an inverse process of the linear pre- coding process of dispersing the data in the apparatus for transmitting the signal and restores original data dispersed in the data input to the linear pre-coding decoder 2850. The linear pre-coding decoder 2850 is used only when the linear pre-coder is used in the transmitting apparatus.

[266] The multi-demapper 2860 may restore the symbol data restored by the linear pre- coding decoder 2850 into a bitstream. As the demapping method of the multi- dempaper 2860, a method corresponding to the mapping method used by the symbol mapper 2530 included in the apparatus for transmitting the signal shown in FIG. 27 is used.

[267] The second deinterleaver 2870 performs the inverse process of the interleaving process of the bit data stream demapped by the multi-demapper 2860. The second deinterleaver 2870 performs the deinterleaving process corresponding to the first interleaver 2520 of FIG. 27. The inner decoder 2880 may decode the deinterleaved data and correct the error included in the data. The outer decoder 2890 performs an error correction decoding process with respect to the bit data decoded by the inner decoder 2880 and outputs the decoded bit data. The inner decoder 2880 and the outer decoder 2890 decode the data according to the decoding methods corresponding to the inner encoder 2510 and the outer encoder 2500 of FIG. 27.

[268] The first interleaver 3020 shuffles the data stream to random positions so as to become robust against a burst error which may occur in the data when the signal output from the inner encoder 3010 is transmitted. The symbol mapper 3030 maps the data interleaved by the first interleaver 3020 to symbol data according to the transmitting

method. Alternatively, an encoded symbol mapping method may be used in the symbol mapper 3030. For example, the data may be mapped to the encoded symbols using a trellis coded modulation method.

[269] The linear pre-coder 3040 disperses input symbol data into several pieces of output symbol data so as to decrease a probability that all information is lost due to fading when experiencing frequency- selective fading of a channel. The linear pre-coder 3040 may not be used according to implementation embodiments.

[270] The second interleaver 3050 interleaves the symbol data output from the linear pre- coder 3040 again such that the symbol data does not experience the same frequency- selective fading. The second interleaver 3050 may use a convolution interleaving method or a block interleaving method.

[271] The frame builder 3060 inserts a pilot signal into a data interval to build a frame such that the interleaved signal is modulated by an orthogonal frequency division multiplex (OFDM) method. The modulator 3070 inserts a guard interval into the data output from the frame builder 3060 and modulates the inserted data such that the data is transmitted in a state of being carried in OFDM subcarriers. The transmitter 3080 converts the digital signal having the guard interval and the data interval, which is output from the modulator 3070, into an analog signal and transmits the converted analog signal.

[272] FIG. 31 is a schematic block diagram showing the multi-demapper according to the embodiment of the present invention. The multi-demapper 2860 includes a symbol deinterleaver 2861, a first demapper 2862, a second demapper 2863, ..., an N demapper 2864, and a bitstream merger 2865.

[273] The symbol deinterleaver 2861 deinterleaves the input symbol data and restores an original symbol data sequence. The deinterleaving method of the deinterleaver 2861 corresponds to the interleaving method of the symbol interleaver 2535 in the multi- mapper 2530 of FIG. 26. The symbol deinterleaver 2861 transmits the deinterleaved symbol data to the demappers corresponding to the mapping methods.

[274] The demappers (the first demapper 2862 to the N demapper 2864) convert the received symbol data into bit data according to the respective demapping methods. The first demapper 2862 to the N demapper 2864 configure a demapping unit for demapping the input symbol data to the bit data. The demapping methods of the first demapper 2862 to the N demapper 2864 correspond to the mapping methods of the first mapper 2532 to the N mapper 2534 of FIG. 28, respectively.

[275] The bitstream merger 2865 receives the bit data output from the demappers and outputs one bitstream. The bitstream merger 2865 merges the bit data to the bitstream using the method corresponding to the method distributed by the bit stream distributor

[276] FIG. 32 is a schematic block diagram showing an apparatus for transmitting a signal using multi-encoding according to an embodiment of the present invention. FIG.32 shows an example of applying a multi-encoding method to the signal transmitting apparatus of FIG. 1.

[277] The embodiment of FIG. 32 includes an outer encoder 3000, an multi-encoder 3010, a first interleaver 3020, a symbol mapper 3030, a linear pre-coder 3040, a second in- terleaver 3050, a frame builder 3060, a modulator 3070 and a transmitter 3080.

[278] The outer encoder 3000 and the inner encoder 3010 encode respective input signals and output the encoded signals such that an error generated in transmitted data is detected and corrected by a receiving apparatus. The outer encoder 3000 encodes the input data in order to improve transmission performance of the input signal. The types of the encoders vary according to the coding methods used in the signal transmission system.

[279] The multi-encoder 3010 codes the data encoded by the outer encoder 3000 again in order to prevent an error from being generated in the transmitting process. The multi- encoder 3010 encodes the input data by using a hybrid of a plurality of encoding methods. For example, as the encoding method, a convolution coding method, a Reed- Solomon (RS) coding method, a low density parity check (LDPC) coding method, a turbo coding method or the like may be used.

[280] Using the multi-encoding method, a SNR gain can be obtained by an encoding method having a lower code rate and a capacity gain can be obtained by an encoding method having a high code rate. Accordingly, it is possible to adjust the SNR gain and the capacity gain and increase transmission efficiency by adjusting the mixture ratio of the encoding methods.

[281]

[282] FIG. 33 is a schematic block diagram showing the multi-encoder according to the embodiment of the present invention. The multi-encoder 3010 includes a bitstream distributor 3011, a first encoder 3012, a second encoder 3013, ..., an N encoder 3014 and a bitstream merger 3015.

[283] The bitstream distributor 3011 distributes the input bit data into several encoders.

The bitstream distributor 3011 distributes a necessary number of bit data according to the encoding methods of the encoders. The bitstream distributor 3011 may distribute the input bit data to the encoders according to the bitstream distributing method of FIG. 29or in the input order of the input bit data. The distributing method may vary according to the implementation embodiments.

[284] The bit data distributed by the bitsream distributor 3011 is output to the encoders (the first encoder 3012 to the N encoder 3014). The first encoder 3012 to the N encoder 3014 configure an encoding unit for encoding the input bit data and outputting the

encoded data. The encoders encode the input bit data according to the respective encoding methods. As the encoding methods, the channel coding methods such as the convolution coding method, the RS coding method, the LDPC coding method and the turbo coding method may be used.

[285] The encoders (the first encoder 3012 to the N encoder 3014) may be equal to one another in the encoding method and different from one another in the code rate or may be different from one another in the encoding method. For example, while all the first encoder 3012 to the N mapper 3014 use the LDPC method, the code rates of the encoders may be different from one another. Alternatively, the first encoder 3012 may encode the data using the LDPC and the N encoder 3014 may encode the data using the turbo coding method. This example may vary according to the implementation embodiments.

[286] The bitstream merger 3015 receives the bit data output from the encoders and merges the bit data to one bit data stream. The bitstream merger 3015 may merge the bit data to one bit data stream in the manner inverse to the distributing method of the bitstream distributor 3015 or another predetermined rule. This may vary according to the implementation embodiments, and the virtual interleaving effect can be obtained according to the merging method.

[287] FIG. 34 is a schematic block diagram showing an apparatus for receiving a multi- encoded signal according to an embodiment of the present invention. The receiving apparatus of FIG. 34 corresponds to the transmitting apparatus of FIG. 32.

[288] The embodiment of FIG. 32 includes a receiver 3200, a synchronizer 3210, a demodulator 3220, a frame parser 3230, a first deinterleaver 3240, a linear pre-coding decoder 3250, a symbol demapper 3260, a second deinterleaver 3270, a multi-decoder 3280 and an outer decoder 3290.

[289] The components of the receiving apparatus of FIG. 32 are substantially similar to those of the receiving apparatus shown in FIG. 30. Hereinafter, the portions different from those of FIG. 30 will be described.

[290] The symbol demapper 3260 may restore the symbol data restored by the linear pre- coding decoder 3250 to a bitstream. The symbol demapper 3260 demaps the symbol data using the method corresponding to the mapping method of the symbol mapper 3030 of FIG. 30.

[291] The multi-decoder 3280 receives the bit data deinterleved by the second deinterleaver 3270 and decodes the bit data according to the methods corresponding to the encoding methods of the transmitting apparatus.

[292] FIG. 35 is a schematic block diagram showing themulti-decoder according to the embodiment of the present invention. The multi-decoder 3280 includes a bitstream distributor 3281, a first decoder 3282, a second decoder 3283, ..., an N decoder 3284,

and a bitstream merger 3285.

[293] The bitstream distributor 3281 distributes the input bit data into several decoders. The bitstream distributor 3281 distributes the bit data according to the method corresponding to the method of merging the bit data to one bit data stream by the bitstream merger 3015 of the multi-encoder of FIG. 33. That is, the bitstream distributor 3281 distributes the bit data in the manner inverse to the method of receiving and merging the bit data to the bit data stream by the bitstream merger 3015 of the multi-encoder.

[294] The bit data distributed by the bitstream distributor 3281 is output to the decoders (the first decoder 3282 to the N" ¹ decoder 3284). The first decoder 3282 to the N" ¹ decoder 3284 configure a decoding unit for decoding the input bit data and outputting the decoded data. The decoders decode the input bit data according to the respective decoding methods. The decoding methods correspond to the encoding methods of the multi-encoder of FIG. 33.

[295] The bitstream merger 3285 receives the bit data output from the decoders and merges the bit data to one bit data stream. The bitstream merger 3285 merges the bit data in the manner inverse to the method of distributing the bit data by the bitstream distributor 3011.

[296] The outer decoder 3290 performs an error correction decoding process with respect to the bit data decoded by the multi-decoder 3280 and outputs the decoded data. That is, the multi-decoder 3280 and the outer decoder 3290 decode the data by the decoding methods corresponding to the multi-encoder 3010 and the outer encoder 3000 of FIG. 30.

[297] FIG. 36 is a schematic block diagram showing an apparatus for transmitting a signal using a multi-encoding method and a multi-mapping method according to an embodiment of the present invention. As shown in FIG. 36, the signal transmitting apparatus can be implemented using both the multi-encoding method and the multi- mapping method described in FIGs. 27 and 32.

[298] The signal transmitting apparatus includes an outer encoder 3400, a multi-encoder 3410, a first interleaver 3420, a multi-mapper 3430, a linear pre-coder 3440, a second interleaver 3450, a frame builder 3460, a modulator 3470, and a transmitter 3480. The blocks are equal to those of FIGs. 27 and 32 and thus the description thereof will be omitted.

[299] FIG. 37 is a schematic block diagram showing an apparatus for receiving a multi- encoded and multi-mapped signal according to an embodiment of the present invention. The signal receiving apparatus of FIG. 37 corresponds to the signal transmitting apparatus of FIG. 36 and includes a receiver 3500, a synchronizer 3510, a demodulator 3520, a frame parser 3530, a first deinterleaver 3540, a linear pre-coding

decoder 3550, a multi-demapper 3560, a second deinterleaver 3570, a multi-decoder 3580 and an outer decoder 3590. Similarly, the blocks of the signal receiving apparatus are equal to those of FIGs. 30 and 34 and thus the description thereof will be omitted.

[300] FIG. 38 is a schematic block diagram showing another example of an apparatus for receiving a multi-encoded and multi-mapped signal according to an embodiment of the present invention. The signal receiving apparatus includes a receiver 3600, a synchronizer 3610, a demodulator 3620, a frame parser 3630, a first deinterleaver 3640, an equalizer 3650, a linear pre-coding decoder 3660, a multi-demapper 3670, a channel estimator 3680, a second deinterleaver 3690, a multi-decoder 3692 and an outer decoder 3694.

[301] In a system using a multi-mapping method, a symbol having a small constellation size has a minimum required SNR which is relatively lower than that of a symbol having a large constellation size at the time of mapping the symbols. Accordingly in order to further increase the capacity, the symbol having the small constellation size can be utilized as a pilot symbol. That is, if separate pilot signals are not used or the function of some of the pilot symbols is performed using the symbol having the small constellation size, the capacity is increased by the number of pilot signals removed. In the case that the symbol having the small constellation size is used, the channel is estimated on the basis of a value decided by receiving the symbol.

[302] The minimum required SNR of the symbol having the large constellation size is relatively higher than that of the symbol having the small constellation size. Accordingly, since the reliability of the symbol having the small constellation size is relatively high in the SNR period in which the symbol having the large constellation size is decoded, the symbol having the small constellation size may be used as the pilot symbol.

[303] The distinguishment between the symbol having the small constellation size and the symbol having the large constellation size may vary according to the implementation embodiments. For example, in the case that the symbol having at least a predetermined number of constellation points is recognized as the symbol having the large constellation size, the number of points which is a criterion for distinguishing between the symbols may vary according to the implementation embodiments.

[304] In the case that the symbol data having the small constellation size and the symbol data having the large constellation size are multi-mapped, the signal transmitting apparatus can insert the pilot into the multi-mapped symbol data and transmit the inserted symbol data. As described above, in the case thatthe symbol data having the small constellation size is used as the pilot symbol, the signal transmitting apparatus may insert the symbol data having the small constellation size into the pilot insertion position instead of the pilot and may transmit the inserted data.

[305] In the case that the symbol data having the small constellation size is inserted into the pilot insertion position, the symbol data having the small constellation size may be inserted into the overall pilot insertion position or the symbol data having the small constellation size may be inserted into a portion of the pilot insertion position and the pilot may be inserted into the remaining portion of the pilot insertion position.

[306] For example, in the signal transmitting apparatus of FIG.36 the frame builder 3460 may insert the symbol data having the small constellation size into the overall the pilot insertion position of the frame so as to build the frame. Alternatively, the frame builder 3460 may insertthe symbol data having the small constellation size into a portion of the pilot insertion position of the frame and insert the pilot into the remaining portion of the frame, thereby building the frame. In consideration of a channel state and the transmitting/receiving system, any one of the above-described methods may be selected and implemented.

[307] Although the multi-encoding method is used in FIG. 36, the inner encoding method using only one encoding method may be used instead of the multi-encoding method using the plurality of encoding methods.

[308] FIG. 38 is a view showing the apparatus for receiving and processing the signal in the case that the signal transmitting apparatus of FIG. 36 transmits the signal using the symbol data having the small constellation size as the pilot symbol.

[309] Hereinafter, for convenience of description, the blocks of FIG. 38 which do not overlap with the blocks of FIG. 37 will be described.

[310] The frame parser 3630 parses the frame data demodulated by the demodulator 3620. In the case that the symbol data having the small constellation size is inserted into the overall pilot insertion position so as to build the frame in the signal transmitting apparatus, the frame parser 3630 extracts the symbol data inserted into the pilot position ad restores the symbol data together with the remaining symbol data. If the symbol data having the small constellation size is inserted into a portion of the pilot insertion position and the pilot is inserted into the remaining portion so as to build the frame in the signal transmitting apparatus, the frame parser 3630 extracts the pilot and the symbol data having the small constellation size and restores the symbol data.

[311] Hereinafter, for convenience of description, the case that the symbol data having the small constellation size is inserted into a portion of the pilot insertion position and the pilot is inserted into the remaining portion so as to build the frame will be described.

[312] The channel estimator 3680 estimates a transmission channel using the input/output information of the multi-demapper 3670 and the pilot output from the frame parser 3630. In the case that the channel is estimated using the pilot output from the frame parser 3630, if the pilot carried in a k carrier is P (k) and the promised pilot known by the receiver is P (k), a channel transfer function (CTF) is expressed by Math Figure 2.

[313] [Math Figure 2] [314,

^{δ=100 x (} ^Tli7 ^)%

[315] H (k) denotes a CTF estimated using the pilot.

P

[316] In the case that the channel is estimated using the symbol data having the small constellation size, which is inserted into the pilot insertion position, if the received symbol data, that is, the symbol data input to the multi-demapper 3670, is Y r (k) and the decided symbol data, that is, the symbol data output from the multi-demapper 3670, is

Y (k), the CTF is expressed by Math Figure 3. [317] [Math Figure 3] [318] Y _ik}

[319] H (k) denotes a CTF estimated using the symbol data having the small constellation d size. The division may be performed by designing a divider, by computing the reciprocal of a denominator or multiplying a numerator by the reciprocal of the denominator. Alternatively, the division may be performed by referring to a ROM table for storing the reciprocal of the denominator and multiplying the numerator by the reciprocal of the denominator. The division may be performed by multiplying the denominator and the numerator by a conjugate complex number of the denominator, obtaining the reciprocal of the denominator multiplied by the conjugate complex number using the ROM table and multiplying the numerator multiplied by the conjugate complex number of the denominator by the reciprocal. This may vary according to the implementation embodiments.

[320] In the case that the pilot symbol is not used in the signal transmitting apparatus, only the CTF using the symbol data having the small constellation size expressed by Math Figure 3 can be obtained.

[321] The CTF estimated by Math Figures 2 and 3 may be used for channel equalization. In the receiving apparatus, thechannel may be equalized by selecting one of the estimated values or by interpolating the two estimated values. For example, the selecting method may vary according to the implementation examples, that is, one estimated value may be selected in consideration of the channel state. The other estimated value may be selected and used if a specific estimated value is rapidly changed. Alternatively, the channel may be equalized by a value obtained by interpolating the two estimated values by linear interpolation.

[322] The first deinterleaver 3640 deinterleaves the symbol data output from the frame

parser 3630 and restores the sequence of the symbol data. The deinterleaved data is output to the equalizer 3650. The equalizer 3650 compensates for transmission channel distortion of the symbol data, of which the sequence is restored, using the CTF of the channel estimated by the channel estimator 3680.

[323] For example, the equalizer 3650 may use a zero forcing equalizing method for compensating for the channel distortion. Since the symbol received by the receiver can be expressed by a product of the transmitted symbol and the CTF, the transmitted symbol data value can be restored by dividing the received symbol by the estimated CTF. That is, if the received symbol data value is Y (k) and the estimated CTF is H(k), the r restored symbol data value Y (k) is expressed by Math Figure 4. [324] [Math Figure 4]

¹³²⁵¹

[326] The detailed embodiment of the equalizer 3650 will be described with reference to FIG. 40.

[327] The symbol data equalized by the equalizer 3650 is output to the linear pre-coding decoder 3660. The linear pre-coding decoder 3660 restores the dispersed symbol data and outputs the restored symbol data. The restored symbol data is input to the multi- demapper 3670 and the channel estimator 3680.

[328] The multi-demapper 3670 demaps the received symbol data using the demappers and outputs the bit data corresponding thereto. The multi-demapper 3670 transmits the symbol data value which is decided with respect to the symbol data having the small constellation size to the channel estimator 3680. Alternatively, the bit data demapped with respect to the symbol data having the small constellation size may be output to the channel estimator 3680. Since the estimation of the channel is performed in units of symbol data, in the case that the bit data demapped with respect to the symbol data having the small constellation size is output to the channel estimator 3680, the decision unit 3700 of FIG. 39 decides the symbol data corresponding to the received bit data again.

[329] The second deinterleaver 3690 deinterleaves the bit data received from the multi- demapper 3670 and restores the sequence of the bit data. The multi-decoder 3692 multi-decodes the bit data, of which the sequence is restored, according to the multi- encoding method and outputs the multi-encoded data. If one encoding method is used in the signal transmitting apparatus instead of the multi-encoding method, the m ulti- decoder is not used and one decoding method corresponding to the encoding method is used.

[330] FIG. 39 is a schematic block diagram showing a channel estimator according to an embodiment of the present invention. The channel estimator includes a decision unit 3700, a first operation unit 3710, a first multiplier 3720, a second multiplier 3730, a second operation unit 3740, a pilot generator 3750, a third operation unit 3760, a third multiplier 3770, a fourth multiplier 3780, and a fourth operation unit 3790. If the method which does not insert the pilot symbol is used, the pilot generator 3750, the third operation unit 3760, the third multiplier 3770, the fourth multiplier 3780 and the fourth operation unit 3790 are not used.

[331] The channel estimator of FIG. 39 multiplies the denominator and the numerator by the conjugate complex number of the denominatorso as to obtain the reciprocal of the denominator multiplied by the conjugate complex number and multiplies the numerator multiplied by the conjugate complex number of the denominator by the reciprocal so as to obtain the CTF.

[332] First, the pilot symbol data (the symbol data having the small constellation size in the above example) input to the symbol demapper 3670 and the pilot symbol data output from the symbol demapper 3670 are input to the decision unit 3700. The decision unit 3700 outputs the symbol data output from the symbol demapper 3670 to the first operation unit 3710 and the first multiplier 3720.

[333] The first operation unit 3710 obtains the conjugate complex number of the received input data and outputs the conjugate complex number to the first multiplier 3720 and the second multiplier 3730. The first multiplier 3720 multiplies the symbol data output from the decision unit 3700 by the conjugate complex number output from the first operation unit 3710 and outputs the multiplied value to the second operation unit 3740. The second multiplier 3730 multiplies the symbol data input to the symbol demapper 3670 in the symbol data input to the decision unit 3700 by the conjugate complex number output from the first operation unit 3710 and outputs the multiplied value to the second operation unit 3740.

[334] The second operation unit 3740 obtains the reciprocal of the value output from the first multiplier 3720, multiplies the value output from the second multiplier 3730 by the reciprocal, and outputs the multiplied value.

[335] In the case that the CTF is estimated using the pilot symbol, the pilot symbol extracted by the frame parser 3630 is used. The pilot generator 3750 generates the pilot symbol which is previously promised with the transmitter. The generated pilot symbol is output to the third operation unit 3760 and the third multiplier 3770.

[336] The third operation unit 3760 obtains the conjugate complex number of the received pilot symbol and outputs the conjugate complex number to the third multiplier 3770 and the fourth multiplier 3780. The third multiplier 3770 multiplies the pilot symbol output from the pilot generator 3750 by the conjugate complex number output from the

third operation unit 3760 and outputs the multiplied value to the fourth operation unit 3790. The fourth multiplier 3780 multiplies the pilot symbol extracted from the frame parser 3730 by the conjugate complex number output from the third operation unit 3760 and outputs the multiplied value to the fourth operation unit 3790.

[337] The fourth operation unit 3790 obtains the reciprocal of the value output from the third multiplier 3770, multiplies the value output from the fourth multiplier 3780 by the reciprocal, and outputs the multiplied value.

[338] FIG. 40 is a schematic block diagram showing an equalizer according to an embodiment of the present invention. The equalizer 3650 includes an interpolator 3800, a fifth operation unit 3810, a fifth multiplier 3820, a sixth multiplier 3830, and a sixth operation unit 3840. The equalizer of FIG. 40 is an example of implementing the zero forcing equalization method.

[339] The division may be performed by various methods as described above and the equalizer of FIG. 40 uses the same process as the division of FIG. 39.

[340] The interpolator 3800 interpolates the received CTF value with the value of the whole bandwidth. The CTF value interpolated by the interpolator 3800 is output to the fifth operation unit 3810 and the fifth multiplier 3820. The fifth operation unit 3810 computes the conjugate complex number of the CTF output from the interpolator 3800 and outputs the conjugate complex number.

[341] The fifth multiplier 3820 multiplies the CTF value output from the interpolator 3800 by the conjugate complex number of the CTF output from the fifth operation unit 3810 and outputs the multiplied value to the sixth operation unit 3840. The sixth multiplier 3830 multiplies the conjugate complex number output from the fifth operation unit 3810 by the received symbol data and outputs the multiplied value to the sixth operation unit 3840.

[342] The sixth operation unit 3840 obtains the reciprocal of the value output from the fifth multiplier 3820, multiplies the value output from the sixth multiplier 3830 by the reciprocal, and outputs the multiplied value.

[343] Since the estimation of the channel is performed in the units of symbol data, in the case where the bit data demapped with respect to the symbol data having the small constellation size is output to the channel estimator 3680, the decision unit 3700 of FIG. 39 decides the symbol data corresponding to the received bit data again.

[344] FIG. 41 is a schematic block diagram showing an apparatus for transmitting a signal by a data symbol channel estimation method according to an embodiment of the present invention. The signal transmitting apparatus includes an outer encoder 3900, an inner encoder 3910, a first interleaver 3920, a symbol mapper 3930, a linear pre-coder 3940, a second interleaver 3950, a frame builder 3960, a modulator 3970 and a transmitter 3980.

[345] In the case that the symbol data having the small constellation size is inserted into the overall pilot insertion position or the symbol data having the small constellation size is inserted into a portion of the pilot insertion position and the pilot is inserted into the remaining portion of the pilot insertion position as described above, the symbol data inserted into the pilot insertion position may be decided and the channel may be estimated on the basis of the decided symbol data. By the above-described method, if the pilot symbols are not used or some of the pilot symbols are used, it is possible to improve the channel estimation performance and increase the capacity of the system.

[346] However, if a decision error occurs in a low SNR environment, an error may occur in the channel estimation. The error of the data compensated for by the channel estimation value having an error is further increased and thus an error propagation phenomenon occurs.

[347] In order to prevent the error propagation phenomenon, the channel can be estimated using only a decision value having high reliability among the decision values of the received symbol data.

[348] For example, it is assumed that the symbol data having the small constellation size is inserted into the overall pilot insertion position in the signal transmitting apparatus of FIG. 41. The blocks of the signal transmitting apparatus of FIG. 41 are equal to those of the signal transmitting apparatus of FIG. 36, except that another symbol mapping method is used instead of the multi-mapping method. For example, the symbol mapping method such as a QAM method, a QPSK or an optimal constellation may be used and the trellis coded modulation method may be used as the encoded symbol mapping method. The signal transmitting apparatus of FIG. 39 is similar to the signal transmitting apparatus of FIG. 34 and thus the description thereof will be omitted.

[349] Since the frame builder 3960 of FIG. 41 does not insert the pilot and inserts the symbol data having the small constellation size to the pilot insertion position, the symbol data inserted into the pilot insertion position is extracted and is restored together with the remaining symbol data.

[350] FIG. 42 is a schematic block diagram showing an apparatus for receiving a signal by a data symbol channel estimation method according to an embodiment of the present invention. The signal receiving apparatus includes a receiver 4000, a synchronizer 4002, a demodulator 4004, a frame parser 4008, a first deinterleaver 4010, an equalizer 4012, a linear pre-coding decoder 4014, a symbol demapper4016, a channel state estimator 4018, a channel estimator 4020, a second deinterleaver 4022, an inner decoder 4024, and an outer decoder 4026. The signal receiving apparatus of FIG. 42 receives and processes the signal transmitted by the signal transmitting apparatus of FIG. 41.

[351] The signal receiving apparatus of FIG. 42 corresponds to the signal receiving

apparatus of FIG. 39and, for convenience of description, the common portions between FIG. 42 and FIG. 39will be omitted.

[352] Since the pilot is not inserted and the symbol data having the small constellation size is inserted into the pilot insertion position in the received frame data, the frame parser 4008 of FIG. 40 extracts the symbol data inserted into the pilot insertion position and restores the symbol data together with the remaining symbol data.

[353] The channel state estimator 4018 estimates the symbol data position, that is, the state of the transmission channel of the subcarriers. In order to estimate the channel state, a log-likelihood ratio (LLR) value used for the decision of the symbol data or the SNR of the channel may be used. The subcarriers for estimating the channel state may be subcarriers for transmitting the symbol data inserted into the pilot insertion position or subcarriers for transmitting the other symbol data included in the frame.

[354] The channel estimator 4020 determines a channel having a good state using the states of the channels estimated by the channel state estimator 4018 and estimates the channel using the symbol data received via the channel having the good state. For example, in the channel having the good state, the SNR of the channel is high and the LLR value is large. If high reliability is applied to the channel via which the symbol data having the small constellation size or the symbol data coded at a low code rate is received in addition to the above information, a channel estimation error can be reduced.

[355] The channel estimator 4020 can obtain the channel estimation function using the symbol data decided by the trellis coded decoder 4016 and the symbol data received via the channel having the good state. The equalizer 4012 compensates for the channel distortion of the received symbol data using the channel estimation function output from the channel estimator 4020.

[356] The multi-encoding method or the multi-mapping method may be used together with the method of estimating the channel using the decided symbol data. That is, any one or both of the multi-encoding method and the multi-mapping method may be used together with the method of estimating the channel using the decided symbol data.

[357] FIG. 43 is a schematic block diagram showing another example of an apparatus for transmitting a signal by a data symbol channel estimation method according to an embodiment of the present invention. FIG. 44 is a schematic block diagram showing another example of an apparatus for receiving a signal by a data symbol channel estimation method according to an embodiment of the present invention.

[358] The signal transmitting apparatus of FIG. 43 includes an outer encoder 4100, a multi- encoder 4110, a first interleaver 4120, a multi-mapper 4130, a linear pre-coder 4140, a second interleaver 4150, a frame builder 4160, a modulator 4170, and a transmitter 4180, and the signal receiving apparatus of FIG. 44 includes a receiver 4200, a syn-

chronizer 4202, a demodulator 4204, a frame parser 4206, a first deinterleaver 4208, an equalizer 4210, a linear pre-coding decoder 4212, a multi-demapper 4214, a channel state estimator 4216, a channel estimator 4218, a second deinterlever 4220, a multi- decoder 4222, and an outer decoder 4224.

[359] In the examples of FIGs. 43 and 44, both the multi-encoding method and the multi- mapping method are used together with the method of estimating the channel usingthe decided symbol data. The blocks are equal to those of the above-described embodiments and thus the description thereof will be omitted.

[360] In the embodiments described with reference to FIGs. 27 to 44, a multi input multi output (MIMO) method may be used. Like FIG. 1 or 9. If the MIMO method is used, the multi-input/output encoder is inserted between the interleaver and the frame builder in the transmitting apparatus and the multi-input/output decoder is inserted between the frame parser and the deinterleaver in the receiving apparatus.

[361] FIG. 45 is a view showing the structure of a transmission frame according to an embodiment of the present invention. The frame builders of the transmitting apparatuses of the above-described embodiments build and output transmission frame data having the structure shown in FIG. 45.

[362] The transmission frame of FIG. 45 includes a pilot symbol interval including pilot carrier information and a data symbol interval including data information and tracking pilot information. FIG. 45 shows an embodiment in which a pilot signal is inserted into (or mapped to) the data symbol interval of the transmission frame of FIG. 7.

[363] In the case that the frame having the structure shown in FIG. 45 is transmitted, the receiving apparatus performs channel estimation of the frame using the pilot carrier information located at the pilot symbol interval. However, in the case thata channel state is changed, it is difficult to accurately perform the channel estimation using only the pilot carrier information located at the pilot symbol interval bythe receiving apparatus. Accordingly, the channel estimation of the interval including the tracking pilot can be accurately performed using the tracking pilot included in the data symbol interval in additionto the pilot carrier information located at the pilot symbol interval. The tracking pilot is inserted (or mapped) in a scattered pilot form as shown in FIG. 47.

[364] FIG. 46 is a view showing the number of tracking pilots in a frame according to an embodiment of the present invention.In the OFDM method, symbols may be transmitted in a state of being carried in subcarriers using Fourier Transform.

[365] FIG. 46 shows the number of available subcarriers, the number of tracking pilots andthe number of pieces of symbol data according to a FastFourier Transform (FFT) mode in the case that the symbols are transmitted using the FFT. The number of available subcarriers denotes a value obtained by subtracting the number of subcarriers for a transmission parameter signal (TPS) from the total number of subcarriers, and the

number of tracking pilots denotes the number of tracking pilots inserted into the data symbol interval. The number of pieces of symbol data denotes a value obtained by subtracting the number of tracking pilots from the number of available subcarriers, that is, the number of subcarriers which can transmit the symbol data. For example, in a 2k mode, among 1688 available subcarriers, 68 subcarriers are used for transmitting the tracking pilots and the remaining 1620 subcarriers are used for transmitting the symbol data.

[366] FIG. 47 is a view showing a frame including tracking pilots according to an embodiment of the present invention. FIG. 47 shows a state in which the tracking pilots are inserted into one data symbol interval according to the 2k mode among transmission modes of FIG. 46.

[367] In FIG. 47, among 1688 subcarriers excluding the subcarriers for the TPS from 1710 (0 to 1709 ) subcarriers, 68 subcarriers are used for transmitting the tracking pilot information and 1620 subcarriers are used for transmitting the symbol data.

[368] The tracking pilots have five patterns (pattern 0 to pattern 4) according to a timeand are inserted in the scattered pilot form. The symbol distance between the tracking pilots of one pattern and another pattern is 5 and the symbol distance between the tracking pilots of one pattern is 25.

[369] FIG. 48 is a view showing margins of the frame of FIG. 47 according to an embodiment of the present invention. In the case that the tracking pilots are inserted in the form shown in FIG. 47, a left margin is a symbol distance of 4 and a right margin is a symbol distance of 5. In a region in which the margin is generated, since the channel estimation cannot be performed using the tracking pilots, the margin should be reduced in order to accurately perform the channel estimation.

[370] FIG. 48 shows the number of tracking pilots, the left margin and the right margin according to the FFT modes with respect to the frame shown in FIG. 47. For example, in the 2k mode, the left margin and the right margin are symbol distances of 4 and 5, respectively. In an 8k mode, the left margin and the right margin are symbol distances of 48 and 58, respectively. That is, it can be seen that, as the length of the symbol is increased according to the FFT mode, the margin region is increased.

[371] FIG. 49 is a view showing another frame including tracking pilots according to an embodiment of the present invention. FIG. 49shows another state in which the tracking pilots are inserted into one data symbol interval according to the 2k mode among transmission modes of FIG. 46.

[372] In FIG. 49, among 1688 subcarriers excluding the subcarriers for the TPS from 1710 (0 to 1709 ) subcarriers, 71 subcarriers are used for transmitting the tracking pilot information and 1617 subcarriers are used for transmitting the symbol data.

[373] The tracking pilots have six patterns (pattern 0 to pattern 5) and are inserted in the

scattered pilot form. The symbol distance between the tracking pilots of one pattern and another pattern is 4 and the symbol distance between the tracking pilots of one pattern is 24.

[374] FIG. 50 is a view showing margins of the frame of FIG. 48 according to an embodiment of the present invention. In the case that the tracking pilots are inserted in the form shown in FIG. 48, a left margin is a symbol distance of 2 and a right margin is a symbol distance of 2.

[375] FIG. 50 shows the number of tracking pilots, the left margin and the right margin according to the FFT modes with respect to the frame shown in FIG. 49. For example, in the modes (2k, 4k and 8k modes), the left margin and the right margin are symbol distances of 2 and 2, respectively. That is, in the frame shown in FIG. 49, the number of tracking pilots is slightly increased, but the margin region is reduced. Accordingly, the channel can be accurately estimated.

[376] FIG. 51 is a view showing the number of symbols included in a low density parity check (LDPC) block according to an embodiment of the present invention. In the case that an LDPC encoder is used as the inner encoders of the transmitting apparatuses of the above-described embodiments, since the size of the LDPC frame is different from that of the OFDM frame, the receiving apparatus needs to perform a separate process of synchronizing the LDPC frame. Accordingly, it is possible to readily realize the synchronization of the LDPC frame, by efficiently building the OFDM frame.

[377] FIG. 51 shows the number of symbols corresponding to one LDPC block according to a symbol mapping mode and the LDPC mode. The LDPC mode includes the cases where the length of the LDPC codeword is 64800 bits and 16200 bits and the multi- mapping method is used as the symbol mapper. FIG. 51 shows the multi-mapping method using a hybrid of 256-quadrature amplitude modulation (256QAM), 64QAM, 16QAM and 4QAM. That is, the data LDPC-encoded by the inner encoder is mapped to the symbols according to the hybrid of the 256QAM, 64QAM, 16QAM and 4QAM. The mapping method is exemplary and the value or the method described herein does not restrict the scope of the present invention.

[378] In FIG. 51, the constellation column shows the mapping methods used in the multi- mapping and rates of the mapping methods. For example, 256QAM shows the case where only the 256QAM method is used and Hyb256-64_r8 shows the case where two mapping methods, that is, the 256QAM method and the 64QAM method are used and the rate of the 256QAM method is 80%. The second column shows the rate of the mapping method having the larger constellation. If the rate is 1, only the mapping method having the larger constellation is used.

[379] Referring to FIG. 51, the case that the data is mapped by only the 256QAM method and is transmitted will be described. Since 8 bits per symbol can be transmitted in the

256QAM method, if the length of the LDPC codeword is 64800, the number of symbols corresponding to one LDPC block becomes 64800/8=8100. In addition, in the case that the length of the LDPC codeword is 16200, the number of symbols corresponding to one LDPC block becomes 2025.

[380] The case thatthe rate of the 256QAM method is 80% and the rate of the 64QAM method is 20%, that is, the multi-mapping method of Hyb256-64_r8, will be described. In this case, the number of symbols corresponding to one LDPC block is 8640 if the length of the LDPC codeword is 64800 and the number of symbols corresponding to one LDPC block is 2160 if the length of the LDPC codeword is 16200. The numbers of symbols of the remaining examples are shown in FIG. 49. The types and the number of mapping methods of FIG. 51 are exemplary. The case where the rate of the 256QAM method is 80% and the rate of the 16QAM method is 20%, that is, the multi- mapping method of Hyb256-16_r8, may be used. A hybrid of two types of mapping methods may be used as shown in FIG. 51 and a hybrid of at least two types of mapping methods may be used.

[381] FIG. 52 is a view showing the number of LDPC blocks included in an LDPC frame according to an embodiment of the present invention. FIG. 52shows the number of LDPC blocks necessary for building one LDPC frame according to the multi-mapping mode and the transmission mode (the FFT mode) if the length of the LDPC codeword is 64800.

[382] If the data is mapped to the symbols using only the 256QAM method as shown in FIG. 52, four LDPC blocks are included in the case of the 8k FFT mode and one LDPC block is included in the case of the 2k FFT mode. In the case that the rate of the 256QAM method is 80% and the rate of the 64QAM method is 20%, three LDPC blocks are included in the case of the 8k FFT mode and three LDPC blocks are included in the case of the 2k FFT mode.

[383] FIG. 53 is a view showing the number of OFDM blocks included in an LDPC frame according to an embodiment of the present invention. FIG. 53shows the number of OFDM blocks necessary for building one LDPC frame according to the symbol mapping mode and the FFT mode if the length of the LDPC codeword is 64800.

[384] If the data is mapped to the symbols using only the 256QAM as shown in FIG. 53, five OFDM blocks are included in the case of the 8k FFT mode and five OFDM blocks are included in the case of the 2k FFT mode. In the case thatthe rate of the 256QAM method is 80% and the rate of the 64QAM method is 20%, four OFDM blocks are included in the case of the 8k FFT mode and 16 OFDM blocks are included in the case of the 2k FFT mode.

[385] FIG. 54 is a view showing the number of LDPC blocks included in an LDPC frame of another mode according to an embodiment of the present invention. FIG. 55 is a

view showing the number of OFDM blocks included in an LDPC frame of another mode according to an embodiment of the present invention. FIG. 56is a view showing the number of OFDM blocks included in an LDPC frame of another mode according to an embodiment of the present invention.

[386] FIGs. 54 to 56 show the case that the length of the LDPC codeword is 16200. The values of FIGs. 51 to 56are obtained by calculation and, for convenience of description, the method of the calculating values will be omitted.

[387] FIG. 57 is a view showing the structure of an LDPC frame according to an embodiment of the present invention. FIG. 57shows a relationship among an LDPC frame, LDPC blocks and OFDM blocks.

[388] In FIG. 57, the length of the LDPC codeword is 64800, the symbol mapping mode is 256QAM, and the FFT mode is 8k. One LDPC frame includes four LDPC blocks and corresponds to five OFDM blocks. Under the above-described condition, it can be seen that the number of LDPC blocks included in one LDPC frame is 4 in FIG. 52 and the number of OFDM blocks included in one LDPC frame is 5 in FIG. 53.

[389] In FIG. 57, it can be seen that the start point of the LDPC block is not matched with that of the OFDM block. Accordingly, the frame parser of the receiving apparatus requires a synchronization process of detecting the start point of the LDPC block in order to build the LDPC block from the received OFDM blocks again.

[390] That is, a point in which the start point of the OFDM block is matched with the start point of the LDPC block may become the start point of the LDPC frame. Accordingly, at the start point of the LDPC frame, the start point of the OFDM block is matched with the start point of the LDPC block. In other words, the start point of the LDPC block can be obtained by the start point of the OFDM block matched with the start point of the LDPC frame. For synchronization, a method of transmitting an OFDM block index used for building one LDPC frame may be used. Hereinafter, this method will be described.

[391] FIG. 58is a view showing the structure of a TPS according to an embodiment of the present invention. The TPS is transmitted one bit by one bit in each of the OFDM blocks and one TPS frame includes total 68 bits. Accordingly, one TPS frame is transmitted via 68 OFDM blocks. FIG. 55 shows 68 bit numbers included in one TPS frame. The bit numbers are matched with OFDM block numbers for transmitting the bits.

[392] The information shown in the right column of FIG. 57 may be transmitted using the 68 bits included in one TPS frame. For example, initialization information may be transmitted using a 0 bit, and constellation information, that is, mapping method, may be transmitted using 25 and 26 bits. 38 and 39 bits may transmit transmission mode information.

[393] FIG. 59is a view showing constellation information according to an embodiment of the present invention. Since a maximum of four types of constellation information may be transmitted using the 25 and 26 bits among the TPS bits of FIG. 55, the number of bits should be increased in the case that more types of constellation information are transmitted. FIG. 59 shows the constellation information identified using four bits.

[394] That is, symbol data mapped by only the QPSK method is transmitted if the 25 to 28 ^th bits are "0000" (the 25 ^th bit is "0", the 26 ^th bit is "0", the 27 ^th bit is "0" and the 28 ^th bit is "0"), and symbol data mapped by the multi-mapping method in which the rate of the 64QAM method is 40% and the rate of the 16QAM method is 60% is transmitted if the 25 ^th to 28 ^th bits are "0111".

[395] Since 16 types of multi-mapping methods shown in FIGs. 51 to 55 are used in the example of FIG. 59, four bits (the 25 to 28 bits) are used. In the case that the types of the multi-mapping methods are increased or decreased, the number of bits used according to the number of types may be adjusted.

[396] For synchronization for detecting the start point of the LDPC block by the receiving apparatus, LDPC mode information may be further included in the TPS in addition to the mapping information.

[397] FIG. 60 is a view showing LDPC mode information according to an embodiment of the present invention. In FIG. 58, the bits for transmitting the LDPC mode information are not included. Accordingly, among the bit numbers 40 to 53, that is, the reserved bits, the LDPC mode information may be transmitted using a 42° bit and a 43 ^r bit. FIG. 60 shows the LDPC information identified using the two bits.

[398] That is, the used LDPC has a codeword length of 64800 if the 42 ^nd and 43 ^rd bits are "00" and has a codeword length of 16200 if the 40 ^th and 41 ^st bits are "01". Since two modes of 64800 and 16200 are described in the above example, the two bits (42° and 43 ^r bits) are used. If the number of modes is increased, the number of bits may be increased according to the number of modes.

[399] FIG. 61 is a view showing the structure of an extended TPS according to an embodiment of the present invention. FIG. 61 shows the extended TPS structure including the information of FIGs. 59 and 60. In the TPS frame of FIG. 50, as the constellation information is further increased by two bits as shown in FIG. 59, the sequence of bits after the constellation information is shifted by two bits such that the position is adjusted. The receiving apparatus can receive the TPS frame shown in FIG. 60 and obtain the constellation information, the LDPC mode information and the transmission mode information.

[400] FIG. 62 is a view showing OFDM block index information according to an embodiment of the present invention. In the TPS frame of FIG. 58, bits for transmitting the OFDM block index information are not included. Accordingly, among the reserved

bits, the OFDM block index information is transmitted using 44 to 48 bits. FIG. 61 shows the OFDM block index information identified using the five bits.

[401] In the examples of FIGs. 53 and 55, one LDPC frame may include a maximum of 28 OFDM blocks. Accordingly, the TPS frame including the TPS frame OFDM block indexes for distinguishing between the 28 OFDM blocks is transmitted. The OFDM block indicated by the OFDM block index may become any block from a first OFDM block to a last OFDM block of the TPS frame. For example, the index may be an index indicating a first block or anindex indicating a last block among the 28 OFDM blocks. This may vary according to implementation examples if the block can be identified by the promise between the transmitting apparatus and the receiving apparatus.

[402] In FIG. 62, the OFDM block index is 1 if the 44 ^th to 48 ¹ Vs are "00000" and the OFDM block index is 32 if the 44 ^th to 48 ^th bits are " 11111 ". As the bit value is increased one by one, the index value is increased one by one. Since the maximum of 28 blocks are identified in the above example, the five bits (the 44 to 48 bits) are used, but the number of bits used may be adjusted according to the maximum number of blocks.

[403] FIG. 63 is a view showing the structure of a TPS including OFDM block index information according to an embodiment ofthe present invention. The TPS frame includes the information described in FIGs. 59 and 60 and the information described in FIG. 61.

[404] The receiving apparatus can receive the TPS frame shown in FIG. 62 and obtain the constellation information, the LDPC mode information, the transmission mode information, and the index information of a specific OFDM block included in one LDPC frame. Accordingly, the number of OFDM blocks and the number of LDPC blocks included in one LDPC frame can be obtained using the constellation mode, the LDPC mode information and the transmission mode information obtained from the TPS frame, and the information shown in FIGs. 52 to 55. In addition, the start point of the LDPC block can be obtained using the number of OFDM blocks and the number of LDPC blocks included in one LDPC frame and the index information of the specific OFDM block included in the LDPC frame.

[405] For example, it is assumed that the OFDM block index information indicates a third block of the OFDM blocks included in one LDPC frame. As described above, it can be seen that the number of OFDM blocks and the number of LDPC blocks included in one LDPC frame can be checked and the LDPC block and the OFDM block are started from the block which precedes the block indicated by the OFDM block index by two blocks.

[406] As described above, the receiving apparatus can check the start point of the LDPC block using the TPS frame information having the structure shown in FIG. 63. The

receiving apparatus should previously know information of FIGs. 52 to 55 and the start point of the LDPC block can be checked using the above information and the information included in the received TS frame.

[407] Hereinafter, a method of obtaining the start point of the LDPC block without using the information shown in FIGs. 52 to 55 will be described.

[408] FIG. 64 is a view showing LDPC block information according to an embodiment of the present invention. In FIG. 64, information on the number of LDPC blocks included in one LDPC frame may be transmitted using the bits of the reserved region, which is not used, among the bits of the TPS frame.

[409] For example, the information on the number of LDPC blocks may be transmitted using 49 and 52° bits. As can be seen from FIGs. 52 and 54, the maximum number of LDPC blocks which may be included in one LDPC frame according to the LDPC modes is 48. However, since the number of types of the number of blocks used is 10 (1, 2, 3, 4, 6, 8, 12, 16, 24 and 48), the information on the number of LDPC blocks is transmitted using four bits, in FIG. 61.

[410] In FIG. 64, the number of LDPC blocks included in one LDPC frame is 1 if the 49 ^th to 52 ^nd bits are "0000" and is 16 if the 49 ^th to 52 ^nd bits are "0111". In Fig. 64, the values excluding the values corresponding to the 10 types of the number of blocks used in FIGs. 52 and 54 become the reserved region. Since the 10 types of values are distinguished in the above example, four bits (49 to 52° bits) are used. However, the number of bits used may be adjusted according to the types of the values of the number of blocks used. The bit value corresponding to the number of blocks is exemplary and may vary according to implementation embodiments.

[411] FIG. 65 is a view showing OFDM block information according to an embodiment of the present invention. In FIG. 65, the information on the number of OFDM blocks may be transmitted using 53 ^r to 57 bits. As can be seen from FIGs. 51 to 53, the maximum number of OFDM blocks which may be included in one LDPC frame according to the LDPC modes is 28. Accordingly, in FIG. 65, the information on the number of OFDM blocks is transmitted using five bits. Although the five bits are used in FIG. 64, a necessary number of bits may be used according to the types of the number of blocks as shown in FIG. 64.

[412] In FIG. 65, the number of OFDM blocks included in one LDPC frame is 1 if the 53 ^rd to 57 ¹ VtS are "00000" and is 32 if the 53 ^rd to 57 ^th bits are " 11111". As the bit value is increased one by one, the number of types of the number of blocks is increased one by one.

[413] Although the maximum of the 28 types of the number of blocks should be distinguished using the five bits (53 ^r to 57 bits) in the above example, the number of bits used may be adjusted according to the number of types of the number of blocks.

[414] FIG. 66 is a view showing the structure of a TPS including suggested information according to an embodiment of the present invention. FIG. 66 shows the structure including the information of FIGs. 58, 59, 60, 63 and 64 in the structure of the TPS frame of FIG. 61. Accordingly, the receiving apparatus may receive the TPS frame having the structure shown in FIG. 66and obtain the constellation information, the LDPC mode information, the transmission mode information, the index information of the specific OFDM block included in one LDPC frame, the number of LDPC blocks included in one LDPC frame, and the number of OFDM blocks included in the LDPC frame.

[415] The receiving apparatus can directly check the start point of the LDPC block using the information included in the received TPS frame without using the information of FIGs. 52 and 55.

[416] In the TPS structure of FIG. 66, 58 ^th to 7 T'bits include BCH error protection information. In the DVB, the BCH error protection information can be obtained using an original systematic codehaving the BCH (127, 113, t=2). 127 represents the total number of transmission bits, 113 represents the number of message bits, and the number of bits obtained by subtracting the number of message bits from the total number of transmission bits represents the number of parity bits. In addition, t=2 represents the number of bits of which the error can be corrected.

[417] In order to obtain the BCH error protection information, 60-bit zero is inserted into the input bitstream of the BCH encoder and is encoded. If the inserted 60-bit zero is removed from the encoded output bits, a shortened BCH code having the BCH (67, 53, t=2) can be obtained.

[418] In order to obtain the BCH code with respect to 57-bit message bits and the TPS having the total transmission bit number of 71 as shown in FIG. 66, 56-bit zero is inserted into the input bitstream of the BCH encoder and is encoded. If the inserted 56-bit zero is removed from the encoded output bits, a shortened BCH code having the BCH (71, 57, t=2) can be obtained.

[419] FIG. 67 is a view showing preamble period information according to an embodiment of the present invention. In FIG. 67, the preamble period information may be included in the TPS frame. As described above, the pilot symbol interval may be used in the transmission frame of FIG. 7 or 45 as the preamble. In this case, the period of the preamble indicates the period of the pilot symbol interval.

[420] The pilot symbol interval includes a known signal which may be used as the pilot. The receiving apparatus performs signal synchronization, channel estimation and channel compensation using the pilot signal. The data symbol interval including data to be transmitted is transmitted in a state of being included between the pilot symbol interval and a next pilot symbol interval. The transmitting apparatus can obtain trade-

off between the data capacity and the transmission reliability by adjusting the period of the pilot symbol interval.

[421] For example, if the channel environment is bad or the channel environment is changed like a mobile reception environment, the pilot symbol interval is more frequently inserted so as to increase the period. Alternatively, if the channel environment is good or the channel environment is not changed, the pilot symbol interval is less frequently inserted.

[422] The period of the pilot symbol interval may vary according to implementation embodiment. Accordingly, the transmitting apparatus transmits the preamble period information shown in FIG. 67to the receiving apparatus such that the receiving apparatus checks the period of the pilot symbol interval. The example of FIG. 67shows the case that the preamble is inserted into every 10 symbols, 15 symbols, 20 symbols and 25 symbols using two bits including a 58 bit and a 59 bit. The number of bits or the period information is exemplary and does not restrict the scope of the present invention.

[423] FIG. 68 is a view showing a structure of a TPS including the preamble period information according to an embodiment of the present invention. FIG. 68 shows the structure of the TPS in which the preamble period information is further included.

[424] In order to obtain a BCH code with respect to the TPS having 59-bit message bits and 73-bit transmission bits shown in FIG. 67 using an original systematic code having the BCH (127, 113, t=2), 54-bit zero is inserted into the input bitstream of the BCH encoder and is encoded. If the inserted 54-bit zero is removed from the encoded output bits, a shortened BCH code having the BCH (73, 59, t=2) can be obtained.

[425] FIG. 69 is a view showing a relationship between a pilot symbol interval and a single frequency network according to an embodiment of the present invention. In the transmission frame described with reference to FIG. 7 or 45, the pilot symbol interval may have the structure shown in FIG. 8.

[426] The pilot symbol interval shown in FIG. 69is divided into even pilots and odd pilots by interleaving the pilot carrier information. The single frequency network (SFN) is divided into an even carrier region A and an odd carrier region B, which transmit data using information corresponding to the even pilots and the odd pilots.

[427] FIG. 70 is a view showing a structure of a pilot symbol according to an embodiment of the present invention. The upper side of FIG. 70 shows the structure of the pilot symbol interval including the even pilot carrier and the lower side thereof shows the structure of the pilot symbol interval including the odd pilot carrier. In addition, the even pilot carrier and the odd pilot carrier, null carrier information is included.

[428] That is, in the antenna of the even carrier region A, the data is transmitted using the pilot symbol interval including the even pilot carrier as shown in the upper side of FIG.

70and, in the antenna of the odd carrier region B, the data is transmitted using the pilot symbol period including the odd pilot carrier as shown in the lower side of FIG. 70. The data of the data symbol interval transmitted in the even carrier region A is equal to that transmitted in the odd carrier region B are identical to each other and the pilot carrier information of the pilot symbol interval of the even carrier region A is different from that of the odd carrier region B.

[429] In the case that the even pilot and the odd pilot configure the pilot symbol interval, the totalpower is not changed by doubling the power of the pilot included in the pilot symbol interval. Accordingly, the receiving apparatus can estimate the channel using the pilot having the doubled power and more accurately estimate the channel.

[430] In a region C which the even carrier region A and the odd carrier region B overlap with each other as shown in FIG. 69, the even pilot signal and the odd pilot signal can be simultaneously received. Accordingly, the channel can be more accurately estimated using the even pilot signal and the odd pilot signal in the region C. For example, the channel may be estimated using the pilot of the better channel state or the channel may be compensated for using the both pilots and estimated. Accordingly, as shown in FIG. 69, when the antenna is provided such that the carrier region (i.e., B) partially overlaps with the carrier region (i.e., A), the channel can be accurately estimated even in a region which is relatively far apart from the antenna.

[431] In the case that the pilot symbol intervals including the even pilot and the odd pilot are used, the receiving apparatus can readily detect the pilot symbol intervals so as to perform synchronization. As shown in FIG. 69, since the null information (energy 0) is included in the pilot symbol interval but the carrier having energy of 0 is not included in the data symbol interval, the pilot symbol intervals (or the preambles) are synchronized by only the method of detecting the power of the carrier.

[432] FIG. 71 is a schematic block diagram showing another example of an apparatus for transmitting a signal according to an embodiment of the present invention. FIG. 71 shows the apparatus for transmitting the signal using the multi-encoding method, the multi-mapping method and the pilot symbol structure shown in FIG. 70, among the signal transmitting apparatuses of the above-described embodiments. That is, the pilot symbol structure shown in FIG. 69 may be used in all the embodiments of FIGs. 1, 14, 27, 32, 36, 41 and 43. In the components of FIG. 71, a necessary component may be added or an unnecessary component may not be used according to implementation embodiments such an embodiment in which an interleaveing process is performed between the outer encoder and the inner encoder or an embodiment in which the linear pre-coding process is not performed. The components of the signal transmitting apparatus of FIG. 71 are described in the above-described embodiments and thus only portions different from those of the above-described embodiments will be described.

[433] The symbol data interleaved by a second interleaver 6850 is input to a frame builder 6860. The frame builder 6860 inserts a pilot signal so as to build a frame such that the output signal can be modulated by the OFDM method. At this time, theframe builder 6860 builds the frame including the pilot symbol interval having the structure shown in FIG. 69. For example, the frame builder of the even carrier region builds the frame including the pilot symbol interval having the structure shown in the upper side of FIG. 69 and the frame builder of the odd carrier region builds the frame including the pilot symbol interval having the structure shown in the lower side of FIG. 69.

[434] The transmission frame built by the frame builder 6860 is OFDM-modulated by a modulator 6870 and is transmitted.

[435] FIG. 72 is a schematic block diagram showing another example of an apparatus for receiving a signal according to an embodiment of the present invention. FIG. 72shows the apparatus for receiving the signal using the multi-encoding method, the multi- mapping method and the pilot symbol structure shown in FIG. 70, among the signal receiving apparatuses of the above-described embodiments. The receiving apparatus of FIG. 72 corresponds to the transmitting apparatus of FIG. 71.

[436] Similarly, the components of the signal receiving apparatus of FIG. 72 are described in the above-described embodiments and thus only portions different from those of the above-described embodiment will be described.

[437] The data demodulated by a demodulator 6902 is input to a frame parser 693. The frame parser 6930 may parse the frame received from the demodulator 6902 and output the symbol data of the data symbol interval excluding the pilot symbol. At this time, the frame parser 6930 may perform the synchronization of the pilot symbol intervals (or the preambles) by only the method of detecting the power of the carrier.

[438] The symbol data parsed by the frame parser 6930 is output to a first deinterleaver 6950. The first deinterleaver 6950 deinerleaves the symbol data by the method corresponding to the interleaving method of the second interleaver 6850 of FIG. 71 and restores the sequence of the symbol data.

[439] The pilot data parsed by the frame parser 6930 is output to a channel estimator 6940. The channelestimator 6940 estimates the channel using the known pilot information and the pilot output from the frame parser 6930 and outputs the estimated value to an equalizer 6960. The equalizer 6960 equalizes the symbol data, of which the sequence is restored by the first deinterleaver 6950, using the channel estimating value.

[440] FIGs. 73 and 74are views showing suggested frame structures according to an embodiment of the present invention. The frame structures may be applied to the above-described embodiment. In FIGs. 73 and 74, one row represents a pilot symbol interval (preamble). Data symbol intervals of the number (1 to P-I) less than that of a preamble period P by one are included between the preamble and the preamble.

[441] As described above, only even or odd pilot carrier information may be may be transmitted in a state of being included in the pilot symbol interval of the frame shown in FIG. 7 or FIG. 45. FIG. 73is a view showing the frame composed of a pilot symbol interval including only even pilot carrier information and a data symbol interval including symbol data to be transmitted and continual pilot (CP) information. The CP may be used for tracking a channel variation and estimating a frequency offset.

[442] In a 2k mode, 1688 subcarriers which can transmit data are included in the data symbol interval. In FIG. 73, 68 subcarriers are used for transmitting the CP and the 1620 remaining subcarriers may be used for transmitting the symbol data.

[443] As shown in FIG. 73, in the 2k mode, one symbol interval includes 1705 (0 to 1704) pieces of subcarrier information. The pilot information is included in the pilot symbol interval at positions of the even carriers (k=0, 2, 4, ..., 1704) of the carriers. The symbol data and the CP information are included in the data symbol interval. In the data symbol interval, the CP information is inserted into 68 subcarriers. FIG. 73shows an example in which 68 subcarriers are inserted into the even carrier positions. For example, the CP information is inserted into 0 , 24 , ..., 1682° , and 1704' subcarriers. The positions of the CP information are exemplary. The CP information is irregularly arranged such that the SNR of the average CP is maintained in all channels. Thus, it is possible to ensure channel tracking performance regardless of the channel. In FIG. 73, the CP information may be inserted into the odd carrier positions instead of the even carrier positions or may be inserted regardless of the even or odd carrier positions.

[444] FIG. 74 is a view showing a frame composed ofa pilot symbol interval including only odd pilot carrier information and a data symbol interval including symbol data to be transmitted and CP information. In FIG. 74, among 1688 subcarriers which can transmit data, 68 subcarriers are used for transmitting the CP information and 1620 remaining subcarriers are used for transmitting the symbol data.

[445] The pilot information is included in the pilot symbol interval at positions of the odd carriers (k=l, 3, 5, ..., 1703) of the carriers. The symbol data and the CP information are included in the data symbol interval. In the data symbol interval, the CP information is inserted into 68 subcarriers. FIG. 74shows an example in which 68 subcarriers are inserted to the odd carrier positions. Similarly, the positionsof the CP information are exemplary. The CP information may be inserted into the even carrier positions instead of the odd carrier positions or may be inserted regardless of the even or odd carrier positions.

[446] FIGs. 75 to 77 are views showing insertion positions of the CP information of modes according to an embodiment of the present invention. FIG. 75 shows the positions where 68 pieces of CP information are inserted in the 2k mode, FIG. 76shows the positions where 135 pieces of CP information are inserted in a 4k mode, and FIG. 77

shows the positions where 269 pieces of CP information are inserted in an 8k mode. The positions of the 4k mode of FIG. 76and the 8k mode of FIG. 77 are obtained by repeating the arrangement of the 2k mode of FIG. 75 two times or four times. In the 4k mode and the 8k mode, the positions obtained by repeating the arrangement of the 2k mode two times or four times as shown in FIGs. 76 and 77may be used or other positions may be used.

[447] Although the CP information is inserted into the even carrier positions in the examples of FIGs. 75 to 77, the CP information may be inserted into the odd carrier positions or may be inserted regardless of the even or odd carrier positions.

[448] FIGs. 78 and 79 are views showing the structures of the frames having the same CP positions according to an embodiment of the present invention. In the pilot symbol intervals (preambles) of FIG. 78 and 79, the pilot information is inserted to the even carrier positions and the odd carrier positions, respectively. In the data symbol interval, the CP information (common CP information) is inserted to the same carrier positions such that data is transmitted. For example, in FIGs. 78 and 79, the CP information is inserted into 0 , 25 , ..., 1682° and 1704 subcarrier positions. The positions of the CP information are exemplary. The CP information may be inserted into the even carrier positions or the odd carrier positions or may be inserted regardless of the even or odd carrier positions.

[449] As described with reference to FIG. 69, the frames having the structures shown in FIGs. 78 and 79may be used when the signal is transmitted while distinguishing between the even carrier region A and the odd carrier region B in a single frequency network. In the transmitted signal of the even carrier region A, the even pilot carrier information is included in the pilot symbol interval and, in the transmitted signal of the odd carrier region B, the odd pilot carrier information is included in the pilot symbol interval. At this time, the CP information is inserted into the data symbol interval included in the transmitted signals of the regions and the CP information is inserted into the same positions.

[450] For example, the frame including the even pilot carrier information in the pilot symbol interval as shown in FIG. 78may be transmitted via the antenna of the even carrier region A and the frame including the odd carrier information in the pilot symbol interval as shown in FIG. 79may be transmitted via the antenna of the odd carrier region B.

[451] FIG. 80 is a view showing insertion positions of common CP information according to an embodiment of the present invention. FIG. 80shows the positions where 68 pieces of CP information are inserted in the 2k mode. In the 4k mode and the 8k mode, the positions obtained by repeating the arrangement of the 2k mode of FIG. 80two times or four times may be used or other positions may be used. Similarly, the

common CP information may be inserted into the even carrier positions or the odd carrier positions or may be inserted regardless of the even or odd carrier positions.

[452] Although the SISO transmission/reception using the single frequency network is described in FIGs. 78 and 79, the frame structure may be applied to the MIMO transmission/reception.

[453] FIGs. 81 to 83 are views showing the structures of multi-input/output transmission frames according to an embodiment of the present invention. FIGs. 81 to 83show the pilots of the preamble and the positions of the CP information according to the transmission paths. In the examples of FIGs. 81 to 83, the data is transmitted using two transmission paths ant 1 and ant 2. The subcarrier positions of the CP information inserted into the data symbol interval are identical with respect to the two transmission paths.

[454] As described with reference to FIG. 1, in the MIMO method, the receiving apparatus distinguishes between the transmission paths. In the examples of FIGs. 81 to 83, the transmission paths can be distinguished using the pilot insertion position of the pilot symbol interval (preamble).

[455] For example, in the transmitted signal of the first transmission path ant 1, the even pilot carrier information is included in the pilot symbol interval and, in the transmitted signal of the second transmission path ant 2, the odd pilot carrier information is included in the pilot symbol interval. The receiving apparatus can distinguish between the transmission paths using the position of the pilot inserted into the pilot symbol interval of the received frame.

[456] The CP information is inserted into the data symbol interval of the signal transmitted via each transmission path. The CP information may be inserted into the same positions or different positions of each transmission path.

[457] FIGs. 81 to 83 show examples in which the CP information is inserted into the same positions of each transmission path. FIG. 81 shows an example in which the CP information is inserted into the even carrier positions and FIG. 82 shows an example in which the CP information is inserted into the odd carrier positions. FIG. 83 shows an example in which the CP information inserted regardless of the even or odd carrier positions.

[458] The positions of the CP information of FIGs. 81 to 83 are exemplary and other positions may be used according to implementation embodiments.

[459] In the frame structure including the pilot symbol interval and the CP information, the pilot of the pilot symbol interval and the CP information of the data symbol interval may be scrambled and used. A DC component of the transmitted signal is removed by scrambling the pilot information such that the receiving apparatus readily detect the preamble and correct the frequency offset.

[460] For example, in order to scramble the pilot information, a pseudo random binary sequenc (PRBS) may be used. At this time, the same PRBS or different PRBS may be used with respect to the pilot of the pilot symbol interval and the CP information of the data symbol interval.

[461] Math Figure 5 shows an embodiment for scrambling. The pilot of the pilot symbol interval and the CP information of the data symbol interval may be scrambled using Math Figure 5. Alternatively, the CP information may be scrambled using Math Figure 5 and the pilot of the pilot symbol interval may be scrambled or may not scrambled using Math Figure. The pilot which is scrambled using Math Figure may be changed according to implementation embodiments.

[462] [Math Figure 5]

[463] 1 4

Re{c _k ) = bf X 2(— -w _k ) , bf=-

Im(C^ = 0

[464] In Math Figure 5, C denotes the pilot information at the position corresponding to k and W denotes the PRBS for scrambling. In addition, Re(C ) denotes the real value of k k the C value and Im(C ) denotes an imaginary value of the C value, bf denotes a k k k power boosting factor. The value of the power boosting factor is exemplary and is adjusted such that the channel estimation performance and the SNR performance of the data are adjusted.

[465] In the case that the CP information of the above-described frame structure is scrambled using Math Figure 5, since only the CP information is used, the decrease in power of the data due to boostingis reduced compared with the DVB-T. In addition, since more CPs are used compared with the DVB-T, it is possible to obtain better channel tracking performance.

[466] FIG. 84 is a view showing a PRBS generator according to an embodiment of the present invention. The PRBS value W k of Math Figure 5 can be obtained using the generator.

[467] The PRBS generator includes a bit delay unit 700 and an operation unit 7710. In the embodiment of FIG. 83, the PRBS generator includes 11 1-bit delay units and an XOR gate. The number of bit delay units and the type of the gate are exemplary and the number of delay units or the type and position of the gate may be changed according to implementation examples.

[468] An initial value of 1 is input to the bit delay units of the PRBS generator of FIG. 84. The XOR gate 7710 receives the output of the ninth bit delay unit and the output of the eleventh bit delay unit and performs an XOR operation. The output of the XOR gate

7710 is input to the first bit delay unit and the output value of the eleventh bit delay unit may be used as the PRBS value W of Math Figure 5. In the PRBS generator of k

FIG. 77, after all 11 initial values are output, the value operated by the XOR gate 7710 is output.

[469] The PRBS generator may output a value 0 or 1. If the value 1 or 0 is substituted for Math Figure 5,

4

or

can be obtained as the real value Re(C )) of the pilot.

[470] FIG. 85 is a schematic block diagram showing another example of an apparatus for transmitting a signal according to an embodiment of the present invention. FIG. 85shows the apparatus for transmitting the signal using the frame structure including the above-described CP information using the multi-encoding method and the multi- mapping method, among the signal transmitting apparatuses of the above-described embodiments.

[471] The signal transmitting apparatus of FIG. 85 is equal to the signal transmitting apparatus of FIG. 71 except that the CP information is inserted into the data symbol interval of the transmission frame. In the signal transmitting apparatus of FIG. 85, a necessary component may be added or an unnecessary component may not be used according to implementation embodiments such an embodiment in which an in- terleaveing process is performed between the outer encoder and the inner encoder or an embodiment in which the linear pre-coding process is not performed. Thus, only portions different from those of the above-described embodiments will be described.

[472] The symbol data interleaved by a second interleaver 7850 is input to a frame builder 7860. The frame builder 7860 inserts a pilot signal so as to build a frame such that the output signal can be modulated by the OFDM method. At this time, the frame builder 7860 builds the frame including the pilot symbol interval and the data symbol interval as described in the above-described embodiments. The above-described CP information is inserted into the data symbol interval. The transmission frame built by the frame builder 7860 is OFDM-modulated by a modulator 7870 and is transmitted.

[473] FIG. 86 is a schematic block diagram showing another example of an apparatus for receiving a signal according to an embodiment of the present invention. The receiving apparatus of FIG. 86corresponds to the transmitting apparatus of FIG. 85. In the signal

receiving apparatus of FIG. 85, a necessary component may be added or an unnecessary component may not be used according to implementation embodiments.

[474] Similarly, the components of the signal receiving apparatus of FIG. 86 are equal to those of the above-described embodiments and thus only portions different from those of the above-described embodiments will be described.

[475] A first synchronizer 7910 may use an offset result of the frequency domain of the data output from a demodulator 7920 and a second synchronizer 7930, for acquiring the synchronization of the frequency domain signal. The second synchronizer 7930 parses the frame output from the demodulator 7920, extracts the CP information, and tracks the channel. That is, the second synchronizer 7930 outputs frequency offset correction information of the received signal to the first synchronizer 7910 using the CP information included in the data symbol interval of the frame. The first synchronizer 7910 can accurately perform the synchronization using the frequency offset correction information output from the second synchronizer 7930.

[476] The data demodulated by the demodulator 7920 is output to a frame parser 7940. The frame parser 7940 may parse the frame received from the demodulator 7920 and output symbol data of the data symbol interval excluding the pilot symbol. At this time, the frame parser 7940 can perform the synchronization of the pilot symbol interval (or the preamble) by only the method of detecting the power of the carrier.

[477] If the CP information or the pilot information of the pilot symbol interval is scrambled using the PRBS in the transmitting apparatus, the second synchronizer 7930 or the frame parser 7940 may descramble the CP information or the pilot information of the pilot symbol interval.

[478] FIG. 87 is a view showing a descrambling device according to an embodiment of the present invention. The descrambling device includes a PRBS generator 8000, a selective output unit 8010 and an operation unit 8020.

[479] The PRBS generator 8000 generates and outputs a binary sequence like the PRBS generator of FIG. 84. The PRBS generator 8000 outputs 0 or 1, and the output value is input to the selective output unit 8010.

[480] The selective output unit 8010 selectively outputs one of two input values 1 and -1 using the value 0 (false) or 1 (true) as a control value. For example, in FIG. 87, if the value 0 is received from the PRBS generator 8000, the selective output unit 8010 outputs the value 1 and, if the value 1 is received from the PRBS generator 8000, the selective output unit 8010 outputs the value -1. The value output from the selective output unit 8010 is input to the operation unit 8020.

[481] The operation unit 8020 multiplies the pilot received via the channel by the value output from the selective output unit 8010 and outputs the multiplied value. If the pilot is scrambled by Math Figure 5 and is transmitted, the pilot received via the channel has

a value

. That is, the pilot received via the channel is obtained by convolution of the channel transfer function (CTF) with the scrambled pilot

[482] As described in Math Figure 5, the scrambled pilot has a value bfxl if W is 0 and k has a value bfx-1 if W is 1. The selective output unit 8010 of FIG. 80 outputs the value 1 if the value 0 is received and outputs the value -1 if the value 1 is received.

[483] Accordingly, the operation unit 8020 may descramble the pilot scrambled according to the PRBS of the transmitting apparatus and output the descrambled value. In FIG. 87, the descrambled value becomes bf*CTF.

[484] The symbol data parsed by the frame parser 7940 is output to the first deinterlaver 7960. The first deinterleaver 7960 deinterleaves the symbol data by the method corresponding to the interleaving method of the second interleaver 7850 of FIG. 85 and restores the sequence of the symbol data.

[485] The pilot data parsed by the frame parser 7940 is output to a channel estimator 7950. The channel estimator 7950 estimates the channel using the pilot output from the frame parser 7940 and known pilot information. The estimated value is output to an equalizer 7970. The equalizer 7970 equalizes the symbol data, of which the sequence is restored, using the estimated channel value.

[486] FIG. 88 is a view showing the comparison of the TPS transmission bit per symbol according to an embodiment of the present invention. The receiving apparatus should receive all TPS information of a period in order to decode the TPS information. In the TPS, one symbol is transmitted in a state in which one TPS bit is included therein. In this case, a symbol time is consumed for the synchronization of the TPS by the number of TPS bits.

[487] Accordingly, if the data symbol interval is transmitted in a state in which the TPS information is further included therein, the time for the TPS synchronization can be reduced. For example, if a portion of the CP insertion positions is used for transmitting the TPS, the time for the TPS synchronization can be reduced. That is, in addition to the subcarriers for transmitting the existing TPS information, at least one piece of TPS information may be further included in the CP information insertion positions of the data symbol interval instead of the pilot information. The TPS bits may be included in one CP pilot information insertion position of the data symbol interval and the TPS bits

may be repeatedly included in a plurality of CP information insertion positions of one data symbol interval.

[488] For example, it is assumed that one TPS bit is repeatedly included in one data symbol interval 17 times. In this case, in the 2k mode, the TPS bits may be included in 17 subcarriers and the CP information may be included in the 51 remaining subcarriers, among the 68 pilot carriers. In the 4k mode and the 8k mode, the CP information may be included in 101 and 201 subcarriers, respectively.

[489] FIG. 88 is a view showing a TPS synchronization latency consumed for transmitting 2 TPB bits and transmitting one TPS bit to one symbol on the basis of the TPS suggested in FIG. 66. In the drawing, the time is an expected latency when it is assumed that one symbol length is 1120 usec (DVB-T, 8k-mode), and is obtained by multiplying the total symbol by the symbol length.

[490] In the case that one TPS bit is transmitted to one symbol, 72 symbols should be received for the TPS synchronization. In the 8k mode, a maximum of 19 symbols should be received for the LDPC synchronization as shown in FIG. 55. The total symbol indicates a maximum symbol time for next synchronization when one symbol is missed. For example, if a first symbol is missed, the maximum symbol time for next synchronization is consumed. If one TPS bit is transmitted to one symbol, the maximum symbol time becomes 72(TPS synchronization)x2+19(LDPC syn- chronization)-l=162. If two TPS bits are transmitted to one symbol, the maximum symbol time becomes 36(TPS synchronization)x2+19(LDPC synchronization)- 1=90. In this case, the data can be efficiently transmitted in view of the latency or the data.

[491] FIG. 89 is a schematic block diagram showing an apparatus for transmitting a signal using scramble according to an embodiment of the present invention. The signal transmitting apparatus includes an energy scrambler 8200, an outer encoder 8210, an inner encoder 8220, a first interleaver 8230, a multi-mapper 8240, a second interleaver 8250, a frame builder 8260, a modulator 8270, a D/A converter 8280 and a transmitter 8290.

[492] The signal transmitting signal of FIG. 89 can a peak to average power ration (PARP) of the transmitted signal using energy dispersal scramble.

[493] The energy scrambler 8200 scrambles input bit data and disperses the energy of the data. For example, the input bit data and a scramble pattern value generated which is randomly generated are XOR-operated and the result value is output. The scramble pattern value or the operation method may be changed according to implementation embodiments. The correlation of the input bitstream can be reduced by the energy scramble.

[494] The outer encoder 8210 and the inner encoder 8220 encode the respective input signals and output the encoded signals such that an error generated in transmitted data

is detected and corrected by the receiving apparatus. That is, as the outer encoder 8210 and the inner encoder 8220, a BCH encoder and an LDPC encoder may be used, respectively. An interleaver may be interposed between the outer encoder 8210 and the inner encoder 8220 according to implementation embodiments. Alternatively, the above-described multi-encoding method may be used in the outer encoder 8210 and the inner encoder 8220.

[495] The first interleaver 8230 shuffles the data stream output from the outer encoder 8210 to random positions. The multi-mapper 8240 maps the data interleaved by the first interleaver 8230 to symbols according to the transmitting method. The multi- mapper 8240 maps the input data to symbol data using a hybrid ofa plurality of mapping methods. As the mapping method, a QAM, a QPSK, an APSK, a PAM or an optimal constellation may be used.

[496] In the multi-mapper 8240, a method of mapping the data to the symbols according to the respective mapping methods in the bit data units or the block units may be used. For example, the input bit data may be mapped in a state of being sequentially divided by the number of pieces of bit data necessary for the respective mapping methods or may be mapped according to the respective mapping methods in a state of being divided in the block units.

[497] FIG. 90 is a schematic block diagram showing a multi-mapper of block units according to an embodiment of the present invention. The multi-mapper includes a block distributor 8241, a first symbol mapper 8242, a second symbol mapper and a block interleaver 8244. Although two symbol mappers are used in the example of FIG. 90, this is only exemplary and at least one symbol mapper may be used.

[498] The block distributor 8214 distributes the input bit data to several mappers in the block units. The block distributor 8241 divides the data into a necessary number of blocks for mapping the symbols according to the mapping methods of the mappers and distributes the bit data.

[499] FIG. 91 is a view showing a block distributing method according to an embodiment of the present invention. That is, the distributing method is an example of the method of distributing the bitstreams by the block distributor 8214. In A of the upper side of n

FIG. 91, the bit data input to the block distributor 8241 is divided into five blocks SubBlocks 0 to 4. In B of the lower side of FIG. 91, the divided blocks are distributed n to the symbol mappers.

[500] If two symbol mapping methods are divided by five levels (100:0(r=5), 80:20(r=4), 60:40(r=3), 40:60(r=2), 20:80(r=l)) as shown in FIG. 59, the input bitstreams are divided into five equal blocks as shown in the upper side of FIG. 91. For example, in the case that the encoded data is distributed according to the LDPC, the length of one block is 12,960 bits if the length of the LDPC codeword is 64,800 bits and the length

of one block is 3,240 bits if the length of the codeword is 16,200.

[501] The blocks divided according to the value 'r' are merged and the merged block is output. That is, 'r' blocks and '5-r' blocks are distributed to the two symbol mapping methods according to the value 'r'. The 'r' blocks and the '5-r'blocks may be sequentially merged or blocks may be extracted from the divided blocks according to the promise and may be merged. The example of the merging the blocks may be changed according to implementation embodiments.

[502] For example, in the case that the multi-mapper 8240 maps the input data to the symbols by mixing the 256QAM mapping method and the 64QAM mapping method by a ratio of 80%:20%, the value 'r' becomes 4. Accordingly, four blocks are distributed in the 256QAM mapping method and one block is distributed in the 64QAM mapping method. The lengths of the bit data mapped according to the symbol mapping methods become 4xSubBlock and lxSubBlock, respectively.

[503] The first symbol mapper 8242 and the second symbol mapper 8243 map the bit data of the block units distributed by the block distributor 8241 to the symbols according to the respective symbol mapping methods.

[504] The block interleaver 8244 interleaves the symbol data output from the first symbol mapper 8242 and the second symbol mapper 8243 and disperses the symbol data to random positions. The symbol data output from the first symbol mapper 8242 and the second symbol mapper 8243 may be sequentially aligned and output without using the interleaver.

[505] FIGs. 92 and 93 are view showing a method of interleaving symbol data according to an embodiment of the present invention.

[506] In the embodiment of FIG. 92, the symbol data is written in a matrix memory in a column direction and the written symbol data is read and output in a row direction. Accordingly, the data output from the first symbol mapper 8242 and the second symbol mapper 8243 may be randomly shuffled and output. The symbol data output from the first symbol mapper 8242 may be first written or the symbol data output from the second symbol mapper 8243 may be first written. The writingorder may be changed according to implementation embodiments. In FIG. 85, a position corresponding to a first row and a first column is a most significant symbol (MSS) and a position corresponding to a last row and a last column is a least significant symbol (LSS).

[507] FIG. 93 is a view showing another method of interleaving the symbol data. Similar to FIG. 92, the input symbol data is written in a memory in a column direction and the written symbol data is read and output in a row direction. However, when the written symbol data is read, a position where the reading of the symbol data is started in each row is changed.

[508] For example, in FIG. 93, the symbol data from a first column to a last column is read

and output in a first row. In a second row, the symbol data from a second column to the last column is read and output and the symbol data of the first column is then read and output. In a third row, the symbol data from a third column to the last column is read and output and the symbol data from the first column to the secondcolumn is then read and output. That is, in an n row, the symbol data from the n column to the last column is read and output and the symbol data from the first column to an n- 1 column is then read and output. The example of FIG. 93 is exemplary and the read start position may be changed according to implementation embodiments.

[509] FIG. 94 is a view showing the length of the column of the memory according to an embodiment of the present invention. In FIGs. 92 and 93, the size of the memory may be changed according to implementation embodiments. For example, FIG. 94 shows the case that the length of the row is 540 symbols if the LDPC codeword is 64,800 bits and the case that the length of the row is 135 symbols if the LDPC codeword is 16,200 bits. That is, in the example of FIG. 94, the length of the column of the memory is 16 if the input data is mapped to the symbols by mixing the 256QAM mapping method and the 64QAM mapping method by a ratio of 80%:20% (Hyb256-64_r8).

[510] The symbol data mapped by the multi-mapper 8240 is output to the second in- terleaver 8250. The second interleaver 8250 disperses the input symbol data to random positions. The interleavers described in the above-described embodiments may be used in the first interleaver 8230 and the second interleaver 8250.

[511] The frame builder 8260 inserts a pilot signal so as to build a frame such that the symbol data output from the second interleaver 8250 is modulated by the OFDM method. Similarly, the frame builder 8260 may build the frame using the frame structures described in the above-described embodiments.

[512] The modulator 8270 OFDM-modulates the built frame and outputs the modulated signal, and the D/A converter 8280 converts the modulated signal from a digital signal into an analog signal. The converted analog signal is transmitted via the transmitter 8290 as a radio frequency (RF) signal.

[513] FIG. 95 is a schematic block diagram showing an apparatus for receiving a signal using descramble according to an embodiment of the present invention. The signal receiving apparatus corresponds to the signal transmitting apparatus of FIG. 89. The signal receiving apparatus includes a tuner 8800, an A/D converter 8810, a synchronizer 8820, a demodulator 8830, a frame parser 8840, a channel estimator/ equalizer 8850, a first deinterleaver 8860, a multi-demapper 8870, a second dein- terleaver 8880, an inner decoder 8890, an outer decoder 8892, and an energy de- scrambler 8894.

[514] The tuner 8800 tunes to and receives a signal of a selected channel. The RF signal received by the tuner 8800 is converted into a digital signal by the A/D converter 8810

and the digital signal is output. The synchronizer 8820 acquires synchronization of a frequency-domain signal using an offset result of the frequency domain of the demodulated data. The demodulator 8830 demodulates the signal of which the synchronization is acquired and outputs the demodulated signal. The frame parser 8840 parses the demodulated frame and extracts the symbol data and the pilot.

[515] The channel estimator/equalizer 8850 estimates the channel using the pilot extracted by the frame parser 8840and equalizes the symbol data using the estimated channel. The first deinterleaver 8860 deinterleaves the symbol data equalized by the channel estimator/equalizer 8850 and restores the symbol data before interleaving. The first deinterleaver 8860 corresponds to the second interleaver 8250 of FIG. 82.

[516] Although the channel estimator and the equalizer are represented by one block in

FIG. 95 and the equalized symbol data is deinterleaved, the channel estimator and the equalizer may be represented by different blocks and the symbol data extracted from the frame may be deinterleaved and equalized. That is, this may be changed according to implementation embodiments.

[517] The deinterleaved symbol data is demapped to the bit data by the multi-demapper 8870 and the demapped bit data is output. The multi-demapper 8870 demaps the symbol data by the method corresponding to the method of the multi-mapper 8240 of FIG. 89 and outputs the demapped data.

[518] FIG. 96 is a schematic block diagram showing a multi-demapper of block units according to an embodiment of the present invention. The multi-demapper includes a block deinterleaver 8871, a first symbol demapper 8872, a second symbol demapper 8873, and a block merger 8874. Although two symbol demappers are used in the example of FIG. 96, this is exemplary and the symbol demappers may be used by the number of symbol mappers of the multi-mapper 8240.

[519] The block deinterleaver 8871 deinterleaves the input symbol data to several symbol demappers. The block deinterleaver 8271 deinterleaves the symbol data according to the method corresponding to the interleaving method of the block interleaver 8244 of FIG. 90 and distributes the symbol data.

[520] The first symbol demapper 8872 and the second symbol demapper 8873 demap the symbol data, which is deinterleaved and distributed, to the bit data according to the respective demapping methods. The first symbol demapper 8872 and the second symbol demapper 8873 correspond to the first symbol mapper 8242 and the second symbol mapper 8243 of FIG. 90, respectively.

[521] The block merger 8874 receives the bit data demapped by the first symbol demapper 8872 and the second symbol demapper 8873 and outputs one bit data stream. The block merger 8874 merges the bit data in a manner inverse to the distributing method of the block units by the block distributor 8241 of FIG. 83 and outputs the merged bit

data.

[522] The inner decoder 8890 and the outer decoder 8892 FEC-decode the data, of which the sequence is restored, such that an error generated in the received data is detected and corrected. A deinterleaver may be interposed between the inner decoder 8890 and the outer decoder 8892 according to implementation embodiments. That is, the deinterleaver may be used or may not be used depending on whether the interleaver is interposed between the outer encoder 8210 and the inner encoder 8220 in the transmitting apparatus of FIG. 89.

[523] The data decoded by the outer decoder 8892 is descrambled by the energy de- scrambler 8894. The energy descrambler 8894 performs the inverse process of the scrambling process of the energy scrambler 8200 of FIG. 89 and restores the data.

[524] In the transmitting/receiving apparatus of FIGs. 89 and 95, a necessary component may be further included or a specific component may be omitted according to implementation examples. For example, the interleaver may be interposed between the inner encoder and the outer encoder or a linear pre-coding decoder may be used. In addition, if the multi-input/output method is used, a multi-input/output encoder may be interposed between the second interleaver 8250 and the frame builder 8260. Alternatively, the first interleaver 8230 or the second interleaver 8250 may not be used. In addition, the mapping or demapping method of the block units and the energy scramble and descramble may be applied to the embodiments of FIGs. 1 to 88.

[525] FIGs. 97 to 99 are views showing experimental results of the performance of a transmitting/receiving system according to a plurality of symbol mapping methods. In the experiments of FIGs. 97 to99, the LDPC is used as the error correction encoding code and the data is encoded according to the LDPC mode having a length of 64800 bits.

[526] In the drawings, a horizontal axis denotes a required SNR for delivering information and a vertical axis denotes acapacity. Solid lines which travel toward the upper right side of the drawings represent information delivering rate according to the Shannon theory.

[527] The symbol mapping rates according to the plurality of symbol mapping methods are included in an upper left table. For example, FIG. 97 shows the results of the respective symbol mapping methods using 4QAM and 16QAM and the result of the symbol mapping method using the hybrid of 4QAM and 16QAM. HYB 1 represents a rate of a method of mapping a small number of symbols (4QAM in FIG. 97) to a method of mapping a large number of symbols (16QAM in FIG. 97) and is 1/5 (that is, 4QAM: 16QAM=I :4). HYB2 is 2:3, HYB3 is 3:2, and HYB4 is 4:1. cr denotes an error correction encoding code rate and uses 1/2, 2/3, 3/4 and 5/6.

[528] In FIG. 97, it can be seen that the plurality of symbol mapping methods can obtain a

SNR gain of about 0.5 dB at a portion overlapping with a line representing information transmission rates of the 4QAM and the 16QAM with respect to the 4QAM and the 16QAM.

[529] In FIGs. 97 to 99, it can be seen that the plurality of symbol mapping methods are more excellent than a single symbol mapping method in a data transmission capacity and a larger amount of data can be transmitted with respect to the same SNR value.

[530] FIG. 98 shows the results of the respective symbol mapping methods using the 16QAM and the 64QAM and the result of the symbol mapping method using the hybrid of the 16QAM and the 64QAM, and FIG. 99 shows the results of the respective symbol mapping methods using the 64QAM and the 256QAM and the result of the symbol mapping method using the hybrid of the 64QAM and the 256QAM.

[531] Even in FIGs. 98 and 99, according to the plurality of symbol mapping methods, a

SNR gain can be obtained compared with a single symbolmapping method. That is, the plurality of symbol mapping methods have a data transmission rate larger than that of the single symbol mappingmethod with respect to the same SNR and the data can be transmitted by more robust characteristics.

[532] Accordingly, it is possible to improve flexibility of the transmitting/receiving system by adequately adjusting the plurality of symbol mapping methods.

[533] FIGs. 100 and 101 are views showing times necessary for frame synchronization according to an error correction encoding frame. Referring to FIG. 91, if the LDPC is used as the error correction encoding, an error correction encoding block can be generated according to one error correction encoding mode and at least one error correction encoding block can build an error correction encoding frame. The error correction encoding frame may be mapped with the rate of the plurality of symbol mapping methods.

[534] FIG. 100 shows the time necessary for synchronizing the LDPC frame according to signal transmission bandwidths and FFT modes in millisecondunits. For example, if the FFT mode is the 8k mode and the bandwidth is 8 MHz, a maximum of a time of about 5.60 ms is consumed. The time does not exceed 8 ms.

[535] FIG. 101 shows a maximum time necessary for obtaining information necessary for synchronizing the error correction encoding frame from the TPS in order to obtain the error correction encoding frame and synchronizing the error correction encoding frame using the information.

[536] FIGs. 102 and 103 are equal to FIGs. 100 and 101 and show the time necessary for synchronizing the error correction encoding frame and the time necessary for synchronizing the error correction encoding frame after obtaining the TPS information in the case that the plurality of symbol mapping methods are used. In FIG. 102, in any combination of experiments, the synchronization can be obtained earlier than the

maximum time by 24 ms.

[537] FIG. 104 shows power enhancement of the DVB-T in the case that the pilot is transmitted by the above-described preamble structure (denoted by "proposed").

[538] In the pilot is transmitted by the above-described preamble structure, the power is higher than that of the DVB-T by 0.512 dB. The density indicates the rate of the pilot. While the DVB-T includes power density of 1/3, the power density of 1/2 is included in the pilot is transmitted by the above-described preamble structure. Accordingly, if the rate of the pilot is considered and the pilot is transmitted to the odd or even carriers of the preamble, the power enhancement of 2.272 can be obtained.

[539] FIG. 105 shows power enhancement according to the consecutive pilot structure of the DVB-T system, that is, the number of consecutive pilots included in the FFT modes and the power enhancements of the FFT modes in the case that a power boosting factor of 16/9 is used. For example, if the FFT mode is the 2k mode, while 45 consecutive pilots are included in one OFDM symbol in the DVB-T system, 68 consecutive pilots are included in one OFDM symbol in the embodiment of the present invention. According to the above-described consecutive pilot structure, in the case that the FFT mode is the 2k mode, the power enhancement of 1.793 dB can be obtained.

[540] FIG. 106 shows power enhancement of a data symbol carrier in the above-described frame structure. While the pilot symbol carrier occupies 10.3% of the OFDM symbols in the DVB-T system, the pilot symbol carrier occupies about 4% of the OFDM symbols in the above-described frame structure. Since the power of the data symbol data is decreased by the power boosting factor but the power of the pilot symbol carrier is increased, the power of the data symbol data is associated with the number of pilot symbol carriers. The above-described frame structure has power enhancement of about 0.27 dB compared with the DVB-T system.

[541] FIG. 107 shows the decrease rate of a data transfer rate according to the above- described frame structure. While the consecutive pilots and the dispersed pilots are included in the DVB-T system, only the consecutive pilots are included in the above- described frame structure. Here, a preambleperiod is 20, that is, one preamble is included in 19 data symbols. For example, in the case that the FFT mode is the 8k mode, the above-described frame structure has the data transfer rate enhancement of about 1.549% compared with the DVB-T system.FIGs. 108 and 109 are views showing mobility characteristics according to the above-described frame structure.

[542] FIGs. 108 and 109 show the mobility characteristics according to the above- described frame structure. FIG. 108 shows the mobility characteristics of the 2k FFT mode and FIG. 109 shows the mobility characteristics of the 8k FFT mode.

[543] The Doppler effect due to the mobility is improved as the preamble period is

decreased. For example, if the preamble period is 10, 216.45 Hz (2k mode) and 54.11 Hz (8k mode are obtained in a guard interval (GI) mode of 1/32. If the preamble period is 20, 89 Hz (2k mode) and 22 Hz (8k mode) are obtained in a GI mode of 1/4.

[544] FIG. 110 is a flowchart illustrating a method of transmitting a signal according to an embodiment of the present invention.

[545] The signal transmitting apparatus energy- scrambles data to be transmitted so as to reduce correlation between data (S9000). The scrambled data isFEC-encoded data such that an error of a transmitting process is found and corrected (S9002). The FEC- encoded data is mapped to symbol data (S9004). For example, for FEC-encoding, an LDPC encoding method, a turbo encoding method or a multi-encoding method may be used. As the mapping method, the QAM, the QPSK method, the optimal constellation mapping method or the multi-mapping method may be used.The symbol mapping process may be performed in bit data units or block units.

[546] The mapped symbol data is converted into a transmission frame according to a transmitting method. The transmitting apparatus modulates the transmission frame and transmits the modulated transmission frame (S9006). For example, in the case that the data is transmitted using an OFDM method, the transmitting apparatus builds and transmits an OFDM transmission frame. The OFDM transmission frame may include above-described pilot symbol interval and data symbol interval.

[547] In the case that the signal transmitting apparatus transmits the data using the pilot symbol intervalincluding only the even pilot carrier information and the pilot symbol interval including only the odd pilot carrier information, the data can be transmitted in a state of distinguishing betweenthe even carrier region and the odd carrier region as shown in FIG. 68.

[548] FIG. 111 is a flowchart illustrating a method of receiving a signal according to an embodiment of the present invention.

[549] The signal receiving apparatus receives, synchronizes and modulates the signal to frame data. The demodulated frame data is parsed such that the pilot and the symbol data included in the frame are extracted (S9010).

[550] In the receiving apparatus, the transmission channel is estimated using pilot information extracted from a pilot symbol interval and the extracted symbol data is equalized using the estimated channel.

[551] The equalized symbol data is demapped so as to be restored to bit data corresponding thereto (S9012). The signal receiving apparatus demaps symbol data according to the method corresponding to the mapping method ofthe signal transmitting apparatus. For example, in the case that the data is mapped in the block units in the signal transmitting apparatus, the data is demapped in the block units in the signal receiving apparatus.

[552] The signal receiving apparatus FEC-decodes the demapped bit data such that the

error is corrected (S9014). The error correction decoding method may correspond to the error correction encoding method of the transmitting apparatus. The FEC-decoded data is energy-descrambled in a manner inverseto the scrambling method of the transmitting apparatus and the descrambled data is output (S9016).

[553] The apparatus for transmitting/receiving the signal and the method of transmitting/ receiving the signal are not limited to the above-described embodiments and are applicable to all the signal transmitting/receiving system such as broadcast or communication.

[554] It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents. Mode for the Invention

[555] The embodiments of the invention are described in the best mode of the invention. Industrial Applicability

[556] A method of transmitting/receiving a signal and an apparatus for transmitting/ receiving a signal of the present invention can be used in broadcast and communication fields.