Description of the Related Art Recent improvements in circuitry of ultra-large scale integration (ULSI) on semiconductor substrates indicate that future generations of semiconductor devices will require sub-quarter micron multi-level metallization. The multilevel interconnects that lie at the heart of this technology require planarization of interconnect features formed in high aspect ratio apertures, including contacts, vias, lines and other features. Reliable formation of these interconnect features is very important to the success of ULSI and to the continued effort to increase circuit density and quality on individual substrates and die.

ULSI circuits include metal oxide semiconductor (MOS) devices, such as complementary metal oxide semiconductor (CMOS) field effect transistors (FETs).

The transistors can include semiconductor gates disposed between source and drain regions. In the formation of integrated circuit structures, and particularly in the formation of MOS devices using polysilicon gate electrodes, it has become the practice to provide a metal silicide layer over the polysilicon gate electrode, and over the source and drain regions of the silicon substrate, to facilitate lower

resistance and improve device performance by electrically connecting the source and drain regions to metal interconnects.

One important processing technique currently used in CMOS processing technology is the Self-Aligned Silicidation (salicide) of refractory metals such as titanium and cobalt. In a salicide process using cobalt (Co), for example, the source and drain and polysilicon gate resistances are reduced by forming a high conductivity overlayer and the contact resistance is reduced by increasing the effective contact area of the source and drain with subsequently formed metal interconnects. Salicide processing technology seeks to exploit the principle that a refractory metal such as cobalt deposited on a patterned silicon substrate will selectively react with exposed silicon under specific processing conditions, and will not react with silicon oxide material.

For example, a layer of cobalt is sputtered onto silicon, typically patterned on a substrate surface, and then subjected to a thermal annealing process to form cobalt silicide (CoSi2). Unreacted cobalt, such as cobalt deposited outside the patterned silicon or on a protective layer of silicon oxide, can thereafter be selectively etched away. The selective reaction of cobalt silicide will result in maskless, self-aligned formation of a low-resistivity refractory metal silicide in source, drain, and polysilicon gate regions formed on the substrate surface and in interconnecting conductors of the semiconductor device. After the etch process, further processing of the substrate may occur, such as additional thermal annealing, which may be used to further reduce the sheet resistance of the silicide material.

However, it has been difficult in integrating cobalt silicide processes into conventional manufacturing equipment. Current processing systems performing cobalt silicide processes require transfer of the substrate between separate chambers for the deposition and annealing process steps. Transfer between

chambers may expose the substrate to contamination and potential oxidation of silicon or cobalt deposited on the substrate surface.

Oxide formation on the surface of the substrate can result in increasing the resistance of silicide layers as well reducing the reliability of the overall circuit. For example, oxidation of the deposited cobalt material may result in cobalt agglomeration and irregular growth of the silicide layer. The agglomeration and irregular growth of the cobalt layer may result in device malformation, such as source and drain electrodes having different thicknesses and surface areas.

Additionally, excess cobalt silicide growth on substrate surface may form conductive paths between devices, which may result in short circuits and device failure.

One solution to limiting cobalt and silicon contamination is to sputter a capping film of titanium or titanium nitride on the cobalt and silicon film prior to transferring the substrate between chambers. The capping film is then removed after annealing the substrate and prior to further processing of the substrate.

However, the addition of titanium nitride deposition and removal processes increase the number of processing steps required for silicide formation, thereby reducing process efficiency, increasing processing complexity, and reducing substrate through-put.

Therefore, there is a need for a method and apparatus for forming silicide materials on a substrate while reducing processing complexity and improving processing efficiency and throughput.

SUMMARY OF THE INVENTION Embodiments of the invention described herein generally provide methods and apparatus for forming a metal silicide layer using a deposition and annealing process. In one aspect, a system is provided for processing a substrate including a load lock chamber, an intermediate substrate transfer region connected to the load lock chamber, the intermediate substrate transfer region comprising a first

substrate transfer chamber and a second substrate transfer chamber, wherein the first substrate transfer chamber is coupled to the load lock chamber and the second substrate transfer chamber is coupled to the first substrate transfer chamber, a physical vapor deposition (PVD) processing chamber disposed on the first substrate transfer chamber and an annealing chamber disposed on the second substrate transfer chamber.

In another aspect, a method is provided for forming a silicide layer on a substrate including positioning a substrate having silicon material disposed thereon on a substrate support disposed in a deposition chamber having a metal target disposed therein, applying a current to the substrate support to heat the substrate to a first temperature, introducing an inert gas into the deposition chamber, generating a plasma by applying a bias between a metal target and the substrate support in the inert gas environment to sputter material from the metal target, depositing the sputtered material on at least the silicon material, providing a backside gas between the substrate pedestal and the substrate, and annealing the substrate in situ at a second temperature greater than the first temperature to form a metal silicide layer.

In another aspect, a method is provided for processing a substrate including introducing a substrate having silicon material disposed thereon into a load lock, transferring the substrate to a first transfer chamber having a physical vapor deposition processing chamber disposed thereon, the first transfer chamber is connected to the loadlock and the depositing chamber has a metal target and heating pedestal disposed therein, positioning the substrate into the physical vapor deposition chamber, depositing a metal layer on the silicon material, annealing the substrate prior to transferring the substrate to a second transfer chamber having an annealing chamber disposed thereon, wherein the second transfer chamber is connected to the first transfer chamber, and annealing the substrate in the annealing chamber to form a metal silicide layer.

BRIEF DESCRIPTION OF THE DRAWINGS So that the manner in which the above recited aspects of the invention are attained and can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to the embodiments thereof which are illustrated in the appended drawings.

It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.

Figure 1 is schematic top view of one embodiment of an integrated multi- chamber apparatus suitable for depositing a conformal PVD layer on a semiconductor substrate and suitable for annealing the deposited layer ; Figure 2 is schematic top view of another embodiment of an integrated multi-chamber apparatus suitable for depositing a conformal PVD layer on a semiconductor substrate and suitable for annealing the deposited layer Figure 3 is a cross-sectional view of one embodiment of a sputtering chamber included within the invention; Figure 4 is an expanded view of Figure 3 including upper area of the shields near the target; Figure 5 is a plan view of one embodiment of a ring collimator ; Figure 6 is a partial plan view of one embodiment of a honeycomb collimator ; Figure 7A is a cross-sectional view of one embodiment of a pedestal for annealing a substrate;

Figure 7B is a cross-sectional view of another embodiment of a pedestal for annealing a substrate; and Figure 8 is a simplified sectional view of a silicide material used as a contact with a transistor.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT Embodiments of the invention described herein provide methods and apparatus for forming a metal silicide layer in a deposition chamber or substrate processing system. One embodiment described below in reference to a physical vapor deposition (PVD) process is provided to illustrate the invention, and should not be construed or interpreted as limiting the scope of the invention.

Aspects of the invention may be used to advantage in other processes, such as chemical vapor deposition, in which an anneal is desired for forming metal silicide layers.

Figure 1 is schematic top view of one embodiment of an integrated multi- chamber substrate processing system suitable for performing at least one embodiment the metal deposition and annealing processes described herein. The deposition and annealing processes may be performed in a multi-chamber processing system or cluster tool having a PVD chamber disposed thereon. One processing platform that may be used to advantage is an Endura processing platform commercially available from Applied Materials, Inc., located in Santa Clara, California.

The processing platform 35 typically includes a cluster of process chambers including two transfer chambers 48,50 and at least one long throw physical vapor deposition (PVD) chamber 36, additional processing chambers 38 and 40, and an annealing chamber 41. Generally, the annealing chambers 41 and the PVD chambers 36 are disposed in separate transfer chambers, which are operated at different vacuum pressures. Chambers 38 and 40 may include PVD chambers or

chemical vapor deposition (CVD) chambers for depositing other materials as desired by the operator. Rapid thermal annealing (RTA) chambers that can anneal substrates at vacuum pressures may be used for the annealing chamber 41 on transfer chamber 48 or 50 based upon the configuration desired by the operator.

The processing platform 35 may further comprise one or more pre-clean chambers 42, such as PreClean II chambers available from Applied Materials, for removing contaminants, two degas chambers 44, and two load lock chambers 46.

The processing platform 35 typically includes transfer robots 49,51, disposed in transfer chambers 48,50 respectfully, and two cooldown or pre-heating chambers 52 separating the transfer chambers 48,50. The processing platform 35 is automated by programming a microprocessor controller 54. RTA chambers (not shown) may also be disposed on the first transfer chamber 48 of the processing platform 35 to provide post deposition annealing processes prior to substrate removal from the platform 35. While not shown, a plurality of vacuum pumps are disposed in fluid communication with each transfer chamber and each of the processing chambers to independently regulate pressures in the respective chambers. The pumps may establish a vacuum gradient of increasing pressure across the apparatus from the load lock chamber to the processing chambers.

Figure 2 is a schematic top view of another embodiment of an integrated multi-chamber substrate processing system suitable for performing at least one embodiment the metal deposition and annealing processes described herein. In this embodiment, two PVD deposition chamber are disposed on the first transfer chamber 48 with two degas chambers 44, and two load lock chambers 46. One of the PVD deposition chambers may be substitute with a vacuum annealing chamber or a pre-clean chamber 42, such as the PreClean II chamber. Two annealing chambers 41, are disposed on the second transfer chamber 50. The operating pressure of the first transfer chamber 48 is generally lower than that for the second transfer chamber 50 since high vacuum PVD processes are performed on the first transfer chamber 48 and high pressure processes, such as atmosphere annealing

processes, are performed on the second transfer chamber 50.

Figure 3 illustrates one embodiment of a long throw physical vapor deposition chamber. Example of suitable long throw PVD chambers are ALPS plusTM and SIP PVD processing chambers, both commercially available from Applied Materials, Inc., Santa Clara, California.

Generally, the long throw PVD chamber 36 contains a sputtering source, such as a target 142, and a substrate support pedestal 152 for receiving a semiconductor substrate 154 thereon and located within a grounded enclosure wall 150, which may be a chamber wall as shown or a grounded shield.

The chamber 36 includes a target 142 supported on and sealed by 0-rings to a grounded conductive aluminum adapter 144 through a dielectric isolator 146.

The target 142 may be a bonded composite of a metallic cobalt surface layer and a backing plate of a more workable metal. The target 142 comprises the material to be deposited on the substrate surface during sputtering. The target may include, for example, materials including cobalt, titanium, tantalum, tungsten, molybdenum, platinum, nickel, iron, niobium, palladium, and combinations thereof, which are used in forming metal silicide layers. For example, targets comprising elemental cobalt, nickel cobalt alloys, or nickel iron alloys may be used as the target 142.

A controllable DC power source 148 applies a negative voltage or bias to the target 142, typically between about between about 0 V and about 2400 V to the target 142 to excite the gas into a plasma state. The adapter 144 in turn is sealed and grounded to an aluminum chamber sidewall 150. Ions from the plasma bombard the target 142 to sputter atoms and larger particles onto the substrate 154 disposed below. While, the power supplied is expressed in voltage, power may also be expressed as kilowatts or a power density (W/cm2). The amount of power supplied to the chamber may be varied depending upon the amount of sputtering and the size of the substrate size being processed.

A pedestal 152 supports a substrate 154 to be sputter coated in planar

opposition to the principal face of the target 142. The substrate support pedestal 152 has a planar substrate receiving surface disposed generally parallel to the sputtering surface of the target 142. In operation, the substrate 154 is positioned on the substrate support pedestal 152 and plasma is generated in the chamber 36.

A long throw distance of at least about 90 mm separates the target 142 and the substrate. The substrate support pedestal 152 and the target 142 may be separated by a distance between about 100 mm and about 300 mm for a 200 mm substrate. The substrate support pedestal 152 and the target 142 may be separated by a distance between about 150 mm and about 400 mm for a 300 mm substrate. Any separation between the substrate and target that is greater than 50% of the substrate diameter is considered a long throw processing chamber.

A RF power supply 156 in some applications is connected to the pedestal electrode 152 in order to induce a negative DC self-bias on the substrate 154, but in other applications the pedestal 152 is grounded or left electrically floating. The D. C. power supply 148 or another power supply may be used to apply a negative bias, for example, between about 0 V and about 500 V, to the substrate support pedestal 152. The pedestal 152 is vertically movable through a bellows 158 connected to a lower chamber wall 160 to allow the substrate 154 to be transferred onto the pedestal 152 through an load lock valve (not shown) in the lower portion of the chamber and thereafter raised to a deposition position.

Processing working gas is supplied from a gas source 162 through a mass flow controller 164 into the lower part of the chamber. A vacuum pumping system 166 connected through a pumping port 168 in the lower chamber is capable of maintaining the chamber at a base pressure of less than 10-6 Torr, but the processing pressure within the chamber is typically maintained at between 0.2 and 2 milliTorr, preferably less than 1 milliTorr, for cobalt sputtering. The processing gas includes non-reactive or inert species such as argon (Ar), xenon (Xe), helium (He), or combinations thereof.

A rotatable magnetron 170 is positioned in back of the target 142 and

includes a plurality of horseshoe magnets 172 supported by a base plate 174 connected to a rotation shaft 176 coincident with the central axis of the chamber 140 and the substrate 154. The horseshoe magnets 172 are arranged in closed pattern typically having a kidney shape. They produce a magnetic field within the chamber, generally parallel and close to the front face of the target 142 to trap electrons and thereby increase the local plasma density, which in turn increases the sputtering rate. The magnets 172 are rotated so as to more uniformly sputter the target 142 and coat the substrate 154.

The chamber 36 of the invention includes a grounded bottom shield 180 having, as is more clearly illustrated in the exploded cross-sectional view of Figure 4, an upper flange 182 supported on and electrically connected to a ledge 184 of the adapter 144. A dark space shield 186 is supported on the flange 182 of the bottom shield 180, and screws (not shown) recessed in the upper surface of the dark space shield 186 fix it and the flange 182 to the adapter ledge 184 having tapped holes receiving the screws. This metallic threaded connection grounds the two shields 180,186 to the adapter 144. Both shields 180,186 are typically formed from hard, non-magnetic stainless steel. The dark space shield 186 has an upper portion that closely fits an annular side recess of the target 142 with a narrow gap 188 between the dark space shield 186 and the target 142 which is sufficiently narrow to prevent the plasma to penetrate, hence protecting the ceramic isolator 146 from being sputter coated with a metal layer, which would electrically short the target 142. The dark space shield 186 also includes a downwardly projecting tip 190, which prevents the interface between the bottom shield 180 and dark space shield 186 from becoming bonded by sputter deposited metal.

Returning to the overall view of Figure 3, the bottom shield 180 extends downwardly in a upper generally tubular portion 194 of a first diameter and a lower generally tubular portion 196 of a smaller second diameter to extend generally along the walls of the adapter 144 and the chamber body 150 to below the top surface of the pedestal 152. It also has a bowl-shaped bottom including a radially

extending bottom portion 198 and an upwardly extending inner portion 100 just outside of the pedestal 152. A cover ring 102 rests on the top of the upwardly extending inner portion 100 of the bottom shield 180 when the pedestal 152 is in its lower, loading position but rests on the outer periphery of the pedestal 152 when it is in its upper, deposition position to protect the pedestal 152 from sputter deposition. An additional deposition ring (not shown) may be used to shield the periphery of the substrate 154 from deposition.

The chamber 36 may also be adapted to provide a more directional sputtering of material onto a substrate. In one aspect, directional sputtering may be achieved by positioning a collimator 110 positioned between the target 142 and the substrate support pedestal 152 to provide a more uniform and symmetrical flux of deposition material on the substrate 154.

A metallic ring collimator 110 rests on the ledge portion 106 of the lower shield, thereby grounding the collimator 110. The ring collimator 110 includes, as better illustrated in the plan view of Figure 5, three concentric tubular sections 112, 114,116 linked by cross struts 118,120. The outer tubular section 116 rests on the ledge portion 106 of the lower shield 180. The use of the lower shield 180 to support the collimator 110 simplifies the design and maintenance of the chamber.

At least the two inner tubular sections 112,114 are sufficiently high to define high aspect-ratio apertures that partially collimate the sputtered particles. Further, the upper surface of the collimator 110 acts as a ground plane in opposition to the biased target 142, particularly keeping plasma electrons away from the substrate 154.

Another type of collimator usable with the invention is a honeycomb collimator 124, partially illustrated in the plan view of Figure 6 having a mesh structure with hexagonal walls 126 separating hexagonal apertures 128 in a close- packed arrangement. An advantage of the honeycomb collimator 124 is, if desired, the thickness of the collimator 124 can be varied from the center to the periphery of the collimator, usually in a convex shape, so that the apertures 128 have aspect

ratios that are likewise varying across the collimator 124. The collimator may have one or more convex sides. This allows the sputter flux density to be tailored across the substrate, permitting increased uniformity of deposition. Collimators that may be used in the PVD chamber are described in United States Patent No. 5,650, 052, issued July 22,1997, which is hereby incorporated by reference herein to the extent not inconsistent with aspects of the invention and claims described herein.

Referring to Figures 7A and 7B, embodiments of the substrate support pedestal 152 may be heated by resistive heaters electrically coupled to a power source and may be cooled by a thermal medium passing through fluid conductors connected fluid source, i. e. , a liquid heat exchanger. Embodiments of the substrate support pedestal 152 are described below, and are provided for illustrative purposes and should not be construed or interpreted as limiting the scope of the invention.

One embodiment of a substrate support pedestal 152 is shown in Figure 7A.

The substrate support pedestal 152 is suitable for use in a high temperature high vacuum annealing process. Generally, the substrate support pedestal 152 includes a heating portion 210 disposed on a base 240 coupled to a shaft 245.

The heating portion 210 generally includes heating elements 250 disposed in a thermally conducting material 220 and a substrate support surface 275. The thermally conducting material 220 may be any material that has sufficient thermal conductance at operating temperatures for efficient heat transfer between the heating elements 250 and a substrate support surface 275. An example of the conducting material is steel. The substrate support surface 275 may include a dielectric material and typically includes a substantially planar receiving surface for a substrate 280 disposed thereon.

The heating elements 250 may be resistive heating elements, such as electrically conducting wires having leads embedded within the conducting material 220, and are provided to complete an electrical circuit by which electricity is passed

through the conducting material 220. An example of a heating element 250 includes a discrete heating coil disposed in the thermally conducting material 220.

Electrical wires connect a voltage source (not shown) to the ends of the electrically resistive heating coil to provide energy sufficient to heat the coil. The coil may take any shape that covers the area of the substrate support pedestal 152. More than one coil may be used to provide additional heating capability, if needed.

The body provides support for the heating portion and includes fluid channels 290 disposed therein. The fluid channels 290 are generally coupled to a surface of the heating portion 210 and may provide for either heating or cooling of the substrate support pedestal 152. The combination of heating elements 250 and fluid channels 290 generally achieve temperature control of the surface of the substrate support pedestal 152.

The fluid channels 290 may include a concentric ring or series of rings, or other desired configuration, having fluid inlets and outlets for circulating a liquid from a remotely located source (not shown). The fluid channels 290 are connected to the fluid source 294 by fluid passage 292 formed in the shaft 245 of substrate support pedestal 152.

The heating elements 250 can heat the substrate on the substrate support pedestal up to about 900°C and the fluid channels may cool the substrate to a temperature of about 0°C. The combination of heating elements 250 and the fluid channels 290 are generally used to control the temperature of a substrate 280 between about 10°C and about 900°C, subject to properties of materials used in substrate support pedestal 152 and the process parameters used for processing a substrate in the chamber 36.

Temperature sensors 260, such as a thermocouple, may be attached to or embedded in the substrate support pedestal 152, such as adjacent the heating portion 210, to monitor temperature in a conventional manner. For example, measured temperature may be used in a feedback loop to control electric current

applied to the resistive heaters from a power supply, such that substrate temperature can be maintained or controlled at a desired temperature or within a desired temperature range. A control unit (not shown) may be used to receive a signal from temperature sensor and control the heat power supply or a fluid source in response.

The power supply and the fluid supply of the heating and cooling components are generally located external of the chamber 36. For example, each of the resistive heaters communicate via voltage sources by wires disposed through utility passages (not shown) formed in the base 240 and shaft 245 of the substrate support pedestal 152 and are coupled to utility sources, such as power, located externally to the chamber 36. The utility passages, including the fluid passage 294, are disposed axially along the base 240 and shaft 245 of the substrate support pedestal 152. A protective, flexible sheath 295 is disposed around the shaft 245 and extends from the substrate support pedestal 152 to the chamber wall (not shown) to prevent contamination between the substrate support pedestal 152 and the inside of the chamber.

The substrate support pedestal 152 may further contain gas channels (not shown) fluidly connecting with the substrate receiving surface 275 of the heating portion 210 to a source of backside gas (not shown). The fluid channels 270 define a backside gas passage control passage of a heat transfer gas or masking gas between the heating portion and the substrate 280.

A support pedestal disposed in the chamber may include an electrostatic chuck for supporting a substrate during deposition. Examples of suitable electrostatic chucks that may be used for the support pedestal include MICA Electrostatic E-chuck or Pyrolytic Boron Nitride Electrostatic E-Chuck, both available from Applied Materials, Inc., of Santa Clara, California.

Figure 7B illustrates another embodiment of the substrate support pedestal 152 having an electrostatic chuck 210 mounted to or forming the heating portion of

the substrate support pedestal 152. The electrostatic chuck 210 includes an electrode 230 and a substrate receiving surface 275 coated with a dielectric material 235. Electrically conducting wires (not shown) couple the electrodes 230 to a voltage source (not shown). A substrate 280 may be placed in contact with the dielectric material 235, and a direct current voltage is placed on the electrode 230 to create the electrostatic attractive force to grip the substrate.

Generally, the electrodes 230 are disposed in the thermally conducting material 220 in a spaced relationship with the heating elements 250 disposed therein. The heating elements 250 are generally disposed in a vertically spaced and parallel manner from the electrodes 230 in the thermally conducting material 220. Typically, the electrodes are disposed between the heating elements and the substrate receiving surface 275 though other configurations may be used. Fluid channels 290 disposed on a bottom portion of the electrostatic chuck 210 may also be used to achieve temperature control of the substrate support pedestal 152 and are connected to the fluid source by fluid passage 292 formed in the substrate support pedestal base 240. Temperature sensors 260 are attached to or embedded in the electrostatic chuck 210 to monitor temperature.

The electrostatic chuck 210 may further contain channels 270 formed in the substrate support pedestal 152 fluidly connecting with the substrate receiving surface 275 of the electrostatic chuck 210 to a source of backside gas (not shown).

The fluid channels 270 define a backside gas passage control passage of a heat transfer gas or masking gas between the electrostatic chuck 210 and the substrate 280.

The embodiments of the substrate support pedestals 152 described above may be used to form a high vacuum anneal chamber. The high vacuum anneal chamber may include substrate support pedestals 152 disposed in a PVD chamber, such as the long throw chamber 36 described herein, with a blank target disposed therein or without a target and without bias coupled to either the target or substrate support pedestal. In operation, a substrate is disposed on the substrate

support pedestal, and the substrate is heated, with or without the presence of a backside gas, by the heating elements 250 to the desired processing temperature, processed for sufficient time to anneal the substrate for the desired anneal results, and then removed from the chamber.

While the embodiments of substrate support pedestal 152 described herein may be used to anneal the substrate, commercially available anneal chambers, such as rapid thermal anneal (RTA) chambers may also be used to anneal the substrate to form the silicide films. The invention contemplates utilizing a variety of thermal anneal chamber designs, including hot plate designs and heated lamp designs, to enhance the electroplating results. One particular thermal anneal chamber useful for the present invention is the WxZ chamber available from Applied materials, Inc., located in Santa Clara, Calif. One particular hot plate thermal anneal chamber useful for the present invention is the RTP XEplus Centras) thermal processing chamber available from Applied Materials, Inc., located in Santa Clara, California. One particular lamp anneal chamber is the Radiance thermal processing chamber available from Applied Materials, Inc., located in Santa Clara, California.

Anneal chambers capable of operating at vacuum pressures may be disposed on the PVD transfer chamber 50, to allow post deposition annealing without breaking vacuum. Anneal chamber that are capable of operating at near atmosphere pressures may be disposed on the first transfer chamber 48. In the embodiment shown in Figure 3, PVD deposition chambers with cobalt targets are disposed on the first transfer chamber 48 and the anneal chambers 41 that are capable of operating at near atmosphere pressures may be disposed on the second transfer chamber 50.

Metal Silicide Process The deposition and annealing step used in forming a metal silicide layer

may be formed in situ, such as in a deposition chamber or in a processing system without breaking vacuum. In situ is broadly defined herein as performing two or more processes in the same chamber or in the same processing system without breaking vacuum. For example, in situ annealing may be performed in the same processing chamber as the metal deposition.

In another example, in situ annealing may performed in a chamber adjacent to the deposition chamber, both of which are coupled to a transfer chamber, and the vacuum on the transfer chamber is not broken during processing. In a further example, in situ annealing may be performed on the same processing system at separate processing pressures, such as processing a substrate in processing chambers and annealing chambers disposed on the first and second transfer chambers 48,50, respectfully, in system 35 without breaking the vacuum on the system 35 or transfer of the substrate to another processing system.

While the following material describes the deposition of a cobalt film, the invention contemplates the use of other materials, including titanium, tantalum, tungsten, molybdenum, platinum, nickel, iron, niobium, palladium, and combinations thereof, to form the metal silicide material as described herein.

Metal Deposition In one embodiment, a metal layer may be deposited on a silicon substrate disposed in chamber 36 and annealed on the substrate pedestal 152 to form the metal silicide layer without breaking vacuum. Metal for forming the metal silicide layer is deposited using the PVD chamber 36 described above. The target 142 of material, such as cobalt, to be deposited is disposed in the upper portion of the chamber 36. A substrate 154 is provided to the chamber 36 and disposed on the substrate support pedestal 152. The substrate 154 includes silicon material disposed thereon and is generally patterned to define features into which metal silicide films will be formed.

A processing gas is introduced into the chamber 38 at a flow rate of

between about 5 sccm and about 30 sccm. The chamber pressure is maintained below about 5 milliTorr to promote deposition of conformal PVD metal layers.

Preferably, a chamber pressure between about 0.2 milliTorr and about 2 milliTorr may be used during deposition. More preferably, a chamber pressure between about 0.2 milliTorr and about 1.0 milliTorr has been observed to be sufficient for sputtering cobalt onto a substrate.

A plasma is generated by applying a power level to the target 142 between about 0 volts (V) and about 2400 V. For example, a power level is delivered to the target 142 at between about 0 V and about 1000 V to sputter material on a 200 mm substrate. A power level between about 0 V and about 500 V may be applied to the substrate support pedestal 152 to improve directionality of the sputtered material to the substrate surface. The substrate is maintained at a temperature between about 10°C and about 500°C during the deposition process.

An example of a deposition process includes introducing an inert gas, such as argon, into the chamber at a flow rate between about 5 sccm and about 30 sccm, maintaining a chamber pressure between about 0.2 milliTorr and about 1.0 milliTorr, applying a negative bias of between about 0 volts and about 1000 volts to the target 142 to excite the gas into a plasma state, maintaining the substrate at a temperature between about 10°C and about 500°C, preferably about 50°C and about 300°C, and most preferably, between about 50°C and about 100°C during the sputtering process, and spacing the target between about 100 mm and about 300 mm from the substrate surface for a 200 mm substrate. Cobalt may be deposited on the silicon material at a rate between about 300 A/min and about 2000 A/min using this process.

General In-Situ Annealing Process The cobalt and silicon layer is then annealed in situ at a temperature between about 300°C and about 900°C for between about 10 seconds and about 600 seconds to form the metal silicide layer. The annealing process may be

performed under an inert gas environment in the deposition chamber by first introducing an inert gas into the chamber at a flow rate between about 0 sccm (i. e., no backside gas) and about 15 sccm, maintaining a chamber pressure between of about 2 milliTorr or less, heating the substrate to a temperature between about 300°C and about 900°C for between about 5 seconds and about 600 seconds to form the metal silicide layer.

Deposition and Annealing Process with Backside Gases in the Deposition Chamber.

The metal may be deposited at substrate temperature of 200°C or less, and then rapidly annealed on the substrate support pedestal 152 at temperatures of about 400°C or greater by introducing a backside gas flow. An example of a deposition process includes introducing an inert gas, such as argon, into the chamber at a flow rate between about 5 sccm and about 30 sccm, maintaining a chamber pressure between about 0.2 milliTorr and about 1.0 milliTorr, applying a negative bias of between about 0 volts and about 1000 volts to the target 142 to excite the gas into a plasma state, maintaining the substrate at a temperature of about 200°C, and spacing the target between about 100 mm and about 300 mm from the substrate surface for a 200 mm substrate.

The substrate temperature may be maintained at about 200°C by heating the substrate in the absence of a backside gas at a heating level that would normally heat the substrate to temperatures of 400°C or greater. This reduced temperature control is achieved by inefficient heat transfer between the pedestal surface and the backside of the substrate at vacuum pressures. Cobalt may be deposited on the silicon material at a rate between about 300 A/min and about 2000 A/min using this process.

The annealing process can then be performed in the deposition chamber by ending the plasma and applying a backside gas to the substrate support to enhance heating of the substrate to a temperature between about 400°C and

600°C at the same heating levels used for the deposition process. The annealing process is performed at a temperature between about 400°C and about 600°C for between about 5 seconds and about 300 seconds. Preferably, the substrate is annealed in the deposition chamber at 500°C for between about 60 seconds and 120 seconds.

Low Temperature Deposition and Two-Step In-Situ Annealing Process in Two Chambers In another embodiment, the metal layer may be physical vapor deposited on a silicon substrate in chamber 36, annealed for a first temperature for a first period of time, transferred to a second chamber, for example chamber 41, in the system 35, and annealed at a second temperature for a second period of time to form the metal silicide layer without breaking vacuum.

The physical vapor deposition of the metal is performed as described above at a temperature of about 200°C or less, preferably between about 0°C and about 100°C. The first step of the two step in situ annealing process described above may be performed under an inert gas environment in the deposition chamber by first introducing an inert gas into the chamber at a flow rate between about 0 sccm and about 15 sccm, maintaining a chamber pressure between about 0 milliTorr and about 2 milliTorr, heating the substrate to a temperature between about 400°C and about 600°C for between about 5 seconds and about 300 seconds. Preferably, the substrate is annealed in the deposition chamber at 500°C for between about 60 seconds and 120 seconds.

The substrate is then removed from the deposition chamber and transferred to a vacuum anneal chamber disposed on the same transfer chamber, such as transfer chamber 48 described above in Figure 2. The high vacuum anneal chamber may include a PVD chamber having a blank target and substrate support pedestal 152 described above or a commercial high vacuum anneal pedestal, such as the High Temperature High Uniformity, HTHU substrate support commercially

available from Applied Materials Inc., of Santa Clara California.

The second annealing step may then be performed by maintaining a chamber pressure between about 0 milliTorr and about 2 milliTorr and heating the substrate to a temperature between about 600°C and about 900°C for a period of time between about 5 seconds and about 300 seconds to form the metal silicide layer. Preferably, the substrate is annealed in the anneal chamber at 800°C for between about 60 seconds and 120 seconds.

Low Temperature Deposition and Two-Step Anneal Process in Two Chambers In an alternative embodiment of the two chamber deposition and anneal process, the metal layer is deposited according to the process described herein at about 200°C or less, preferably between about 0°C and about 100°C, in the deposition chamber. The substrate is then annealed in the deposition chamber according to the anneal process described above. The substrate may then be transferred to a RTA chamber disposed on transfer chamber 50 in Figure 2 for a second anneal process.

Annealing in an RTA anneal chamber may be performed by introducing a process gas including nitrogen (N2), argon (Ar), helium (He), and combinations thereof, with less than about 4% hydrogen (H2), at a process gas flow rate greater than 20 liters/min to control the oxygen content to less than 100 ppm, maintaining a chamber pressure of about ambient, and heating the substrate to a temperature between about 600°C and about 900°C for between about 5 seconds and about 300 seconds to form the metal silicide layer. Preferably, the substrate is annealed in the RTA anneal chamber at 800°C for about 30 seconds.

Low Temperature Deposition and Two-Step Annealing Process in Three Chambers.

In another embodiment, the metal layer may be deposited on a silicon substrate in

chamber 36, transferred to a first anneal chamber, such as a vacuum anneal chamber disposed on the same transfer chamber 48 on the system 35, annealed for a first temperature for a first period of time, transferred to a second anneal chamber, for example chamber 41, in the system 35, and annealed at a second temperature for a second period of time to form the metal silicide layer without breaking vacuum.

The metal deposition is performed in the deposition chamber according to the process described above at a substrate temperature of about 200°C or less, preferably between about 0°C and about 100°C. The first step of this embodiment of the annealing process may be performed in situ in a first high vacuum anneal chamber disposed on a processing system by introducing an inert gas into the anneal chamber at a flow rate between about 0 sccm and about 15 sccm, maintaining a chamber pressure between about 0 milliTorr and about 2 milliTorr, heating the substrate to a temperature between about 400°C and about 600°C for between about 5 seconds and about 300 seconds.

Preferably, the substrate is annealed in the deposition chamber at 500°C for between about 60 seconds and 120 seconds. The first annealing step is believed to form an oxygen resistant film such as CoSi.

The substrate may be annealed in situ by transfer to a second high vacuum annealing chamber in the processing system. The second annealing step may then be performed by maintaining a chamber pressure of about 2 milliTorr or less and heating the substrate to a temperature between about 600°C and about 900°C for a period of time between about 5 seconds and about 300 seconds to form the metal silicide layer. Preferably, the substrate is annealed in the anneal chamber at 800°C for between about 60 seconds and 120 seconds.

Alternatively, the substrate may be transferred to a second annealing chamber located outside the transfer chamber or processing system, such as an atmosphere pressure RTA chamber. Annealing in an RTA anneal chamber may

be performed by introducing a process gas including nitrogen (N2), argon (Ar), helium (He), and combinations thereof, with less than about 4% hydrogen (H2), at a process gas flow rate greater than 20 liters/min to control the oxygen content to less than 100 ppm, maintaining a chamber pressure of about ambient, and heating the substrate to a temperature between about 400°C and about 900°C for between about 5 seconds and about 300 seconds to form the metal silicide layer.

Preferably, the substrate is annealed in the RTA anneal chamber at 800°C for about 30 seconds.

High Temperature Deposition and Annealing process.

The metal may be deposited at a high deposition temperature. An example of a deposition process includes introducing an inert gas, such as argon, into the chamber at a flow rate between about 5 sccm and about 30 sccm, maintaining a chamber pressure between about 0.2 milliTorr and about 1.0 milliTorr, applying a negative bias of between about 0 volts and about 1000 volts to the target 142 to excite the gas into a plasma state, maintaining the substrate at about an annealing temperature, i. e., between about 400°C and about 600°C by applying a backside gas, and spacing the target between about 100 mm and about 300 mm from the substrate surface for a 200 mm substrate. The temperature may be maintained at about 200°C by heating the substrate in the absence of a backside gas. Cobalt may be deposited on the silicon material at a rate between about 300 A/min and about 2000 A/min using this process.

The annealing process can then be performed in the deposition chamber by ending the plasma and heating of the substrate to a temperature between about 400°C and 600°C at the same heating levels used for the deposition process. The annealing process is performed at a temperature between about 400°C and about 600°C for between about 5 seconds and about 300 seconds. Preferably, the substrate is annealed in the deposition chamber at 500°C for between about 60 seconds and 120 seconds.

The second annealing step may then be formed in an annealing chamber without breaking vacuum or in an annealing chamber located on a separate transfer chamber or processing system. The second annealing step includes heating the substrate to a temperature between about 600°C and about 900°C for a period of time between about 5 seconds and about 300 seconds to form the metal silicide layer. Preferably, the substrate is annealed at 800°C for between about 60 seconds and 120 seconds.

The metal silicide material, including silicide of cobalt, titanium, tantalum, tungsten, molybdenum, platinum, nickel, iron, niobium, palladium, and combinations thereof, may be used in the formation of a MOS device shown in Figure 8. In the illustrated MOS structure, N+ source and drain regions 402 and 404 are formed in a P type silicon substrate 400 adjacent field oxide portions 406.

A gate oxide layer 408 and a polysilicon gate electrode 410 are formed over silicon substrate 400 in between source and drain regions 402 and 404 with oxide spacers 412 formed on the sidewalls of polysilicon gate electrode 410.

A cobalt layer is deposited over the MOS structure, and in particular over the exposed silicon surfaces of source and drain regions 402 and 404 and the exposed top surface of polysilicon gate electrode 410 by the process described herein. The cobalt material is deposited to a thickness of at about 1000 A or less to provide a sufficient amount of cobalt for the subsequent reaction with the underlying silicon at 402 and 404. Cobalt may be deposited to a thickness between about 50 A and about 500 A on the silicon material. The cobalt layer is then annealed in situ as described herein to form cobalt silicide.

The unreacted cobalt is removed from the substrate surface and the cobalt silicide remains as cobalt silicide (CoSi2) portions 414,416, and 418 of uniform thickness respectively formed over polysilicon gate electrode 410 and over source and drain regions 402 and 404 in silicon substrate 400. Dielectric materials may be deposited over the formed structure and etched to provide contact definitions 420 in the device.

While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.