BACKGROUND

Performance of a digital subscriber line (DSL) in terms of capacity depends on a number of factors such as attenuation and a noise environment. Performance of a DSL transmission system is impacted by crosstalk interference from one twisted line pair to another twisted line pair with the same binder and, to a lesser extent, twisted line pairs in neighboring binders.

Consequently, crosstalk interference may affect data rates across a number of twisted pair lines.

For instance two communication lines such as two very-high-bitrate digital subscriber line (VDSL2) lines which are collocated next to each other induce a signal in each other. Due to the induced crosstalk and noise from other sources in the surroundings of the communication line, the data transported on these lines may be affected or corrupted by the crosstalk and noise. By reducing the crosstalk induced on a communication line or compensating the crosstalk induced on a communication line, the amount of corrupted data may be reduced and the rate at which information can be reliably communicated is increased.

Existing solutions for reducing crosstalk and noise include utilizing a pre-coding control mechanism, which has an optimal performance for crosstalk channel matrices that are diagonally dominant.

Pre-coding (also referred to as pre-compensation) techniques are based on transmitting an additional signal added to the data signal which is used to compensate for the crosstalk on a victim line from external sources. Thus, instead of reducing the effect of crosstalk or avoiding crosstalk effects by configuring the communication line in an appropriate way, pre-coding can be used to compensate for the effects of crosstalk on a communication channel. Pre-coding techniques are based on crosstalk channel information that includes both amplitude and phase information. Such information can be obtained from measurements such as slicer error or signal-to-noise ratio (SNR). A particular example of such measurements for pre-coding is the use of pilot sequences and error feedback. The use of pilot sequences in G.vector is described in "Self-FEXT cancellation (vectoring) for use with VDSL2 transceivers," Series G: Transmission Systems and Media, Digital Systems and Networks, ITU G.993.5, April 2010, the entire contents of which is incorporated by reference.

A crosstalk channel matrix may refer to a matrix that indicates levels of noise and crosstalk interference induced by each active communication line on other active communication lines (in the case of the two communication lines discussed above, the corresponding crosstalk matrix is a 2 by 2 matrix).

A diagonally dominant matrix is a matrix in which a magnitude of a diagonal entry in each row of the matrix is greater than or equal to a sum of the magnitudes of all other entries in the same row of that matrix.

SUMMARY

Example embodiments are directed to methods and systems for reducing crosstalk in DSL systems with high levels of crosstalk.

According to one example embodiment, a method includes obtaining a crosstalk channel and a channel matrix and determining a power controlling matrix, the power controlling matrix for regulating powers corresponding to a plurality of active communication lines. The method further includes determining a vectoring matrix based on applying the power controlling matrix to the crosstalk channel and generating vectored signals using the vectoring matrix for communication of data between a plurality of remote transceivers and at least one device over the plurality of active communication lines.

In an example embodiment, the channel matrix is a non-diagonally dominant matrix. In an example embodiment, the vectoring matrix is a diagonally dominant matrix. In an example embodiment, the method includes determining the power controlling matrix such that a measure of strength of a product of the power controlling matrix and the crosstalk channel is less than a threshold, wherein the vectoring matrix is a pre-coding matrix and the crosstalk channel is a downstream crosstalk channel.

In an example embodiment, the power controlling matrix is a diagonal matrix, entries of the diagonal matrix corresponding to a portion of the active communication lines are less than 1, and entries of the diagonal matrix corresponding to a remaining portion of the plurality of active communication lines are equal to 1. In an example embodiment, the method includes constraining the powers corresponding to the portion of the active communication lines.

In an example embodiment, the method includes determining the power controlling matrix by iteratively updating diagonal entries of the power controlling matrix.

In an example embodiment, the iterative updating of the diagonal entries of the power controlling matrix includes determining an initial compensation matrix subject to a threshold. For each iteration of the iterative updating, the iterative updating of the diagonal entries includes determining an error matrix based on a corresponding compensation matrix, determining, for each row of the corresponding compensation matrix, a row power, determining the diagonal entries of the power controlling matrix based on each determined row power, and updating the corresponding compensation matrix based on the determined power controlling matrix, the updated compensation matrix being used as a compensation matrix for a next iteration in the iterative updating.

In an example embodiment, the method includes determining the power controlling matrix such that a measure of strength of a product of the power controlling matrix and the crosstalk channel is less than a threshold, wherein the vectoring matrix is a post-coding matrix and the crosstalk channel is an upstream crosstalk channel.

In an example embodiment, the power controlling matrix is a diagonal matrix, entries of the diagonal matrix corresponding to a portion of the plurality of active communication lines are less than 1, and entries of the diagonal matrix corresponding to a remaining portion of the plurality of active communication lines are equal to 1. In an example embodiment, the method includes constraining the powers corresponding to the portion of the active communication lines.

In an example embodiment, a device includes a processor configured to obtain a crosstalk channel and a channel matrix and determine a power controlling matrix, the power controlling matrix for regulating powers corresponding to a plurality of active communication lines. The processor is further configured to determine a vectoring matrix based on applying the power controlling matrix to the crosstalk channel and generating vectored signals using the vectoring matrix for communication of data between a plurality of remote transceivers and the device over the plurality of active communication lines. In an example embodiment, the channel matrix is a non-diagonally dominant matrix. In an example embodiment, the vectoring matrix is a diagonally dominant matrix. In an example embodiment, the processor is configured to determine the power controlling matrix such that a measure of strength of a product of the power controlling matrix and the crosstalk channel is less than a threshold, wherein the vectoring matrix is a pre-coding matrix and the crosstalk channel is a downstream crosstalk channel.

In an example embodiment, the power controlling matrix is a diagonal matrix, entries of the diagonal matrix corresponding to a portion of the active communication lines are less than 1, and entries of the diagonal matrix corresponding to a remaining portion of the plurality of active communication lines are equal to 1.

In an example embodiment, the processor is configured to constrain the powers corresponding to the portion of the active communication lines.

In an example embodiment, processor is configured to determine the power controlling matrix by iteratively updating diagonal entries of the power controlling matrix.

In an example embodiment, the processor is configured to iteratively update the diagonal entries of the power controlling matrix by determining an initial compensation matrix subject to a threshold. For each iteration of the iterative updating, the processor is configured to determine an error matrix based on a corresponding compensation matrix, determine, for each row of the corresponding compensation matrix, a row power, determine the diagonal entries of the power controlling matrix based on each determined row power, and update the corresponding compensation matrix based on the determined power controlling matrix, the updated compensation matrix being used as a compensation matrix for a next iteration in the iterative updating.

In an example embodiment, the processor is configured to determine the power controlling matrix such that a measure of a product of the power controlling matrix and the crosstalk channel is less than a threshold, wherein the vectoring matrix is a post-coding matrix and the crosstalk channel is an upstream crosstalk channel.

In an example embodiment, the power controlling matrix is a diagonal matrix, entries of the diagonal matrix corresponding to a portion of the plurality of active communication lines are less than 1, and entries of the diagonal matrix corresponding to a remaining portion of the plurality of active communication lines are equal to 1. In an example embodiment, the processor is configured to constrain the powers corresponding to the portion of the active communication lines.

BRIEF DESCRIPTION OF THE DRAWINGS

Example embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings. FIGS. 1-5 represent non- limiting, example embodiments as described herein.

FIG. 1 illustrates a communication system, according to an example embodiment;

FIG. 2 illustrates a controller including a pre-coder, according to an example embodiment;

FIG. 3 describes a process for determining a power controlling matrix, according to one example embodiment;

FIG. 4 describes a process for a direct determination of a power controlling matrix, according to one example embodiment; and

FIG. 5 describes a process for determining the power controlling matrix using an iterative updating algorithm, according to one example embodiment. DETAILED DESCRIPTION

Various example embodiments will now be described more fully with reference to the accompanying drawings in which some example embodiments are illustrated.

Accordingly, while example embodiments are capable of various modifications and alternative forms, embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that there is no intent to limit example embodiments to the particular forms disclosed, but on the contrary, example embodiments are to cover all modifications, equivalents, and alternatives falling within the scope of the claims. Like numbers refer to like elements throughout the description of the figures.

It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of example embodiments. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements present. Other words used to describe the relationship between elements should be interpreted in a like fashion (e.g. , "between" versus "directly between," "adjacent" versus "directly adjacent," etc.).

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments. As used herein, the singular forms "a," "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes" and/or "including," when used herein, specify the presence of stated features, integers, steps, operations, elements and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and/or groups thereof. It should also be noted that in some alternative implementations, the functions/acts noted may occur out of the order noted in the figures. For example, two figures shown in succession may in fact be executed substantially concurrently or may sometimes be executed in the reverse order, depending upon the functionality/acts involved.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which example embodiments belong. It will be further understood that terms, e.g., those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein. Portions of example embodiments and corresponding detailed description are presented in terms of software, or algorithms and symbolic representations of operation on data bits within a computer memory. These descriptions and representations are the ones by which those of ordinary skill in the art effectively convey the substance of their work to others of ordinary skill in the art. An algorithm, as the term is used here, and as it is used generally, is conceived to be a self-consistent sequence of steps leading to a desired result. The steps are those requiring physical manipulations of physical quantities. Usually, though not necessarily, these quantities take the form of optical, electrical, or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like.

In the following description, illustrative embodiments will be described with reference to acts and symbolic representations of operations (e.g., in the form of flowcharts) that may be implemented as program modules or functional processes including routines, programs, objects, components, data structures, etc., that perform particular tasks or implement particular abstract data types and may be implemented using existing hardware at existing network elements or control nodes. Such existing hardware may include one or more Central Processing Units (CPUs), digital signal processors (DSPs), application-specific-integrated-circuits, field programmable gate arrays (FPGAs) computers or the like.

Unless specifically stated otherwise, or as is apparent from the discussion, terms such as "processing" or "computing" or "calculating" or "determining" or "displaying" or the like, refer to the action and processes of a computer system, or similar electronic computing device, that manipulates and transforms data represented as physical, electronic quantities within the computer system's registers and memories into other data similarly represented as physical quantities within the computer system memories or registers or other such information storage, transmission or display devices.

Note also that the software implemented aspects of example embodiments are typically encoded on some form of tangible (or recording) storage medium. The tangible storage medium may be magnetic (e.g., a floppy disk or a hard drive) or optical (e.g., a compact disk read only memory, or "CD ROM"), and may be read only or random access. Example embodiments are not limited by these aspects of any given implementation.

FIG. 1 illustrates a communication system, according to an example embodiment. As shown in FIG. 1, a system 500 includes a distribution point or access node 100 and Customer Premises Equipment (CPEs) 200-1 to 200-m, where m may be an integer greater than 1.

The access node 100 may be under control of an operator. The access node 100 includes an optical network unit (ONU) 115 configured to communicate with a network processor (NP) 120. As is known, the ONU 115 provides a high-bandwidth data connection over a fiber optic channel to an optical line terminal (OLT) located in a central office. The ONU 115 passes received downstream data frames or packets to the NP 120, which then determines the destination for the frames or packets and accordingly forwards them to an appropriate interface (e.g., DSL, ADSL, VDSL, VDSL2, etc. interface). Similarly, in the upstream direction, the NP 120 forwards frames or packets from the interfaces to the ONU 115.

The NP 120 provides signals to processing devices 125-1 to 125-m. The processing devices 125 are configured for point-to-point communication.

The access node 100 further includes a controller 130. The controller 130 is configured to receive signal data collectively referred to as a signal vector from the processing devices 125. The signal data may include signal values intended to be received by corresponding processing devices 260-1 to 260-m in the CPEs 200. In the downstream direction, the controller 130 is also configured to pre-code the signal vector, and send the resulting data back to the processing devices 125 for transmission to the CPEs 200. The processing devices 125 then send the pre-coded signal data over respective lines 300 via respective analog front ends (AFEs) 135-1 to 135-m. In the upstream direction, the processing devices 125 receive crosstalk-contaminated signals from the AFEs 135. The controller 130 receives the crosstalk-contaminated signals (collectively referred to as received signal vector) from the processing devices 125, post-codes the received signal vector, and provides the processing devices 125 with the post-compensated signal data. The processing devices 125 then continue to process the signal data to demodulate the intended upstream information. Generally, the data exchanged between processing devices would be frequency- domain samples, but alternatively the data could be represented as time-domain samples, for example.

As discussed above, the controller 130 communicates with the processing devices 125. Alternatively, the controller 130 may be between the processing devices 125 and the AFEs 135-1 to 135-m. Thus, the location of the controller 130 is not limited to the location shown in FIG. 1.

Furthermore, it will be understood that the access node 100 may include a memory 140, or multiple memories. The NP 120, the controller 130, and/or the processing devices 125 execute programs and/or program modules stored on the memory 140 to perform their respective functions and the functions of the access node 100. The memories may be external to and/or internal to the NP 120, the controller 130, and/or the processing devices 125. For the purposes of simplicity of illustration only, only the memory 140 associated with the controller 130 is shown.

As discussed above, each of the processing devices 125 may communicate with a respective one of the CPEs 200 over the communication lines 300 through an associated AFE 135. The lines 300 (also referred to as links) may be telephone lines (e.g., twisted copper pairs), and the CPEs 200-1 to 200-m may be modems or other interface devices operating according to a communication standard for transmitting data over telephone lines. The CPEs 200-1 to 200-m may be located in various customer premises. Each of the CPEs 200-1 to 200-m includes an AFE 255-1 to 255- m and respective processing devices 260-1 to 260-m. Each of the AFEs 255 may be the same or substantially the same as the AFEs 135.

FIG. 2 illustrates the controller 130 including a pre-coder, according to an example embodiment. While FIG. 2 is described as pre-coder, it should be understood that the same structure applies to a post-coder. The controller 130 has a communication interface 270 with each of the processing devices 125-1 to 125-m. The incoming communication interface 270 receives data and control signals from the processing devices 125-1 to 125-m. The incoming communication interface 270 forwards symbol data x from the respective processing devices 125-1 to 125-m that are to be pre-coded to the subset selector 275. The processing devices 125-1 to 125-m may maintain individual queues containing packets of information to be sent on each of the m lines. At any point in time, some queues may have packets waiting to be sent, while other queues are empty.

An active line may or may not have data to send. An active line without data to send is called an idle line. In a vectored system, all active idle lines send compensation signals generated by the pre-coder 285, regardless of whether they have data to send. The incoming communication interface 270 designates the active lines for transmission.

The subset selector 275 receives a signal x. Based on the signal x, the subset selector 275 determines a plurality of signal values x _s (symbols). The plurality of signal values x _s is a vector obtained by taking the symbols from x corresponding to the active lines.

While FIG. 2 illustrates the subset selector 275, it should be understood that example embodiments are not limited thereto and include systems without a subset selector.

For example, in some systems, if there is no user data to send, the system fills in dummy data. In such systems all lines are always active and there is no subset selector.

The subset selector 275 forwards symbol data xs to a pre-coder 285.

The incoming communication interface 270 also forwards receiver feedback, such as crosstalk characteristics to the subset selector 275 and to a vectoring control entity (VCE) 280.

The crosstalk characteristics could be error feedback samples or DFT output samples collected by the receiver (the samples are then processed by correlation etc. to come up with estimates of crosstalk coefficients). Alternatively, the crosstalk characteristics could be estimates of crosstalk coefficients computed elsewhere and then forwarded to the VCE 280. Additionally, the crosstalk characteristics could be other forms of feedback, e.g., SNR measurements that are affected by crosstalk and can be used to learn something about the crosstalk.

The pre-coder 285 applies coefficients received from the VCE 280 to the symbol data received from the subset selector 275 to produce compensated data symbols y _s (pre- coded data), which are forwarded to an outgoing communication interface 290. The outgoing communication interface 290 sends the compensated data symbols to the processing devices 125-1 to 125-m. Additionally, the incoming communication interface 270 periodically receives receiver feedback data, which it forwards to the VCE 280.

In FIG. 2, the incoming communication interface 270, the subset selector 275, the pre- coder 285 and the outgoing communication interface 290 may be considered data path elements while the vectoring control entity 280 may be considered control path elements that instruct the data path elements what to do.

Each of the incoming communication interface 270, the subset selector 275, the pre- coder 285, the outgoing communication interface 290 and the vectoring control entity 280 may be implemented in hardware, a processor configured to execute software, firmware, or any combination thereof, for example. When at least one of the incoming communication interface 270, the subset selector 275, the pre-coder 285, the outgoing communication interface 290 and the vectoring control entity 280 is hardware, such existing hardware may include one or more Central Processing Units (CPUs), digital signal processors (DSPs), application-specific-integrated-circuits (ASICs), field programmable gate arrays (FPGAs) computers or the like configured as special purpose machines to perform the functions of the at least one of the incoming communication interface 270, the subset selector 275, the pre-coder 285, the outgoing communication interface 290 and the vectoring control entity 280. CPUs, DSPs, ASICs and FPGAs may generally be referred to as processors and/or microprocessors. In the event where at least one of the incoming communication interface 270, the subset selector 275, the pre-coder 285, the outgoing communication interface 290, and the vectoring control entity 280 is a processor executing software, the processor is configured as a special purpose machine to execute the software, stored in a storage medium (e.g., memory 140), to perform the functions of the at least one of the incoming communication interface 270, the subset selector 275, the pre-coder 285, the outgoing communication interface 290 and the vectoring control entity 280. In such an embodiment, the processor may include one or more Central Processing Units (CPUs), digital signal processors (DSPs), application-specific-integrated-circuits (ASICs), field programmable gate arrays (FPGAs) computers.

The performance of the above-mentioned pre-coding control mechanism, discussed in the Background Section, may deteriorate for channels that experience high levels of crosstalk and/or in systems that use frequencies above a certain frequency (e.g., above 17MHz), because in such systems the crosstalk channel matrix may no longer be a diagonally dominant channel matrix. For example, communication lines in a VDSL2 system may experience high crosstalk in situations where physical properties of the communication lines may change (e.g., due to temperature changes in the copper cable) and/or frequent joining and leaving events of individual communication lines. Furthermore, utilization of a straightforward diagonalizing pre-coder (e.g., the pre- coding control mechanism discussed in the Background Section and equation (4b) below) may also result in violation of power spectral density (PSD) constraints at high levels of crosstalk.

Existing solutions include scaling down or clipping pre-coding coefficients in order to enforce PSD constraints. However, scaling down a row of the pre-coding matrix or clipping relatively large values of the pre-coding matrix will adversely affect the performance of all communication lines.

Gain scaling is another existing solution. According to gain scaling, a power controlling matrix A is applied to an inverse of (/ + G) to yield a pre-coding matrix C (i.e., C = (I + G) A, with / being an identity matrix and G being a crosstalk channel matrix. Doing so would theoretically enable full cancelation of crosstalk interferences. However, when the crosstalk channel matrix G is non-diagonally dominant, then so will be the resulting pre-coding matrix C, which would result in a slow convergence of the system when refining the pre-coding matrix or tracking changes in the channel through an iterative procedure. In addition, because the end-to- end channel gain experienced by a user of one of the communication lines is influenced by the power controlling matrix, some changes (e.g., large changes) in the power controlling matrix should be coordinated with the receiver to avoid errors. In G.fast systems, such a mechanism, referred to as Transmitter Initiated Gain Adaptation, is provided. But in systems without the Transmitter Initiated Gain Adaptation mechanism, such as a VDSL or VDSL2 system, gain scaling would have to be static or alternatively adapt slowly, which indicates that enforcing the PSD constraints in a dynamic system would be difficult.

Accordingly, the inventors have discovered that a modified pre-coding control mechanism to address systems with high levels of crosstalk and/or systems that may operate at relatively high frequencies (e.g., above 17 MHz). Next, a series of notations are introduced, which will be utilized in describing example embodiments of the present application.

H is a channel matrix, the determination of which may depend on a crosstalk channel matrix G and a direct channel gain matrix D. Coefficients of the crosstalk channel matrix G represent the level of crosstalk experienced by each communication line (e.g., lines 300, as shown in FIG. 1). / is an identity matrix, with 1 as its diagonal entries while all other entries of the identity matrix / are zeros. The subscripts U and D are indicative of the upstream and downstream channels/operations, respectively. Accordingly, the upstream and downstream channel matrices may be respectively represented by equations (1) and (2) shown below,

Hu={I+Gu)Du (1)

H _D =D _D (I+G _D ) (2) As should be understood, the upstream and downstream channels are multiple-input- multiple-output (MIMO channels).

In one example embodiment and in order to cancel crosstalk and noise, the controller 130 may determine a vectoring matrix C. For the downstream operation, the vectoring matrix C may be referred to as a pre-coding matrix Co- For the upstream operation, the vectoring matrix C may be referred to as a post-coding matrix Cu- The controller 130 may determine the pre-coding matrix Co and the post-coding matrix Cu based on estimates of crosstalk channels and activation/deactivation events. Furthermore, the controller 130 may determine the pre-coding matrix Co and the post- coding matrix Cu periodically and/or dynamically.

Ideally, the controller 130 determines the post-coding matrix Cu according to equation (3 a) shown below. Ideally, the controller 130 determines the pre-coding matrix according to equation (4a) shown below. A compensation matrix Ω for the upstream and downstream are respectively defined in equations (3 a) and (4a) below.

Cu— I—Ώυ (3a)

Co - Ι—Ωβ (4a) where Co is a pre-coder and Cu is a post-coder. Equations (3a) and (4a) represent general forms of the post-coding and pre-coding matrices respectively.

A particular choice of the post-coding matrix and the pre-coding matrix are respectively shown in equations (3b) and (4b) below.

Cu = (I+Gu) ^A (3b)

C _D = {l+G _D y ^l (4b)

If the post-coding matrix Cu or the pre-coding matrix Co , as shown in equations (3b) and (4b) above, is the inverse of respective one of the normalized channel matrices (I+Gu) and (I+GD), then the resulting post-coding matrix Cu or the pre-coding matrix Co, when applied to the respective one of the normalized channel matrices (I+Gyj and (I+GD), yields an identity matrix /, which indicates that all crosstalk and noise is eliminated. This is shown by the mathematical relationships (5) and (6) below, for the upstream and downstream channels, respectively.

Ru = Cu (I+Gu) (5) R _D = (I+G _D )C _D (6)

In VDSL systems, the pre-coding and post-coding matrices Co and Cu may be determined by the controller 130, either directly or using a feedback control of the following form:

Ω[« + 1] = Ω[«] - A[n]E[n] (7) where n represents a number of iterations in the feedback control loop, E[n] is an estimate of a current error matrix, and A[n] is a diagonal noise reducing matrix with weights between 0 and 1. E is an error matrix (which may also be referred to as a residual crosstalk matrix), which in one example embodiment may be represented as:

E = R-I (8) replacing R in equation (8) with equation (5) or (6), yields a residual crosstalk matrix for upstream and downstream channels, respectively, as shown by equations (9) and (10) below.

Eu— Gu+Qu+QuGu (9) ED = GD+-¾+GD-¾ (10)

From now on and for ease of description, example embodiments will be described with respect to the downstream channel/operation and the subscript notations for downstream and upstream channels will be omitted. However, the example embodiments may be easily modified and applied to the upstream channel as well, by a person having ordinary skills in the art.

In equation (10) above, when G is small (i.e., when all eigenvalues of G are smaller than 1 in magnitude and G is diagonally dominant), the sequence of pre-coding matrices defined by equation (7) may converge to the desired pre-coding matrix C (e.g., C= (I+G) ), as described above. Furthermore, one or more of the communication lines 300 may have PSD constraints associated therewith. According, when G is small, the PSD constraints of the one or more of the communication lines may be enforced. However, when G is too large (e.g., when G is non-diagonally dominant, which is indicative of a DSL system with high crosstalk), the convergence of the sequence of pre-coding matrices to a pre-coding matrix C= (I+G) , using equation (7), is not guaranteed and in addition the PSD constraints may not be properly enforced.

To guarantee a convergence of the pre-coding matrix and enforcement of PSD constraints, in one example embodiment, a power controlling matrix may be determined by the controller 130 and utilized by the controller 130. In particular, instead of designing C as the pre-coding matrix C may be obtained by the controller 130 as follows:

C = (Ι+Ω.) = (I+AG) (11) where A is the power controlling matrix. In one example embodiment, A is a diagonal matrix with diagonal entries equal to or greater than 0 and equal to or less than 1. Entries of A may be referred to as power controlling parameters, while entries of a leakage matrix Ι-Λ are leakage parameters.

In one example embodiment, the power controlling parameters may be determined by the controller 130 to ensure that the product AG is small such that the eigenvalues of the product AG are less than 1 in magnitude. Accordingly, the determined power controlling matrix A achieves both the convergence of the pre-coding matrix as well as the enforcement of the PSD constraints.

Hereinafter, examples embodiments for determining the power controlling matrix A will be described. FIG. 3 describes a process for determining the power controlling matrix, according to one example embodiment. As a reminder, the process of FIG. 3 is described with reference to the downstream channel. However, the described process of FIG. 3 may be modified and may be applied to the upstream channel as well.

At S300, the controller 130 determines the downstream crosstalk matrix G and the downstream channel matrix H. The downstream crosstalk channel matrix G may be obtained, as described above. Downstream channel matrix H may be obtained using equation (2), as described above.

At S305, the controller 130 determines a power controlling matrix A. The power controlling matrix A may be determined in one of several ways. In one example embodiment, the power controlling matrix may be determined directly from the downstream crosstalk channel matrix G. The direct determination of the power controlling matrix will be described with reference to FIG. 4 below. In another example embodiment, parameters of the power controlling matrix A may be determined using an iterative updating algorithm for the pre-coding matrix based on a modified version of equation (7), as will be described below. The determination of the parameters of the power controlling matrix A based on an iterative updating algorithm will be described with reference to FIG. 5 below.

Once the power controlling matrix is determined at S305, then at S310, the controller 130 determines a vectoring matrix, which in the downstream operation is the same as a pre-coding matrix. In one example embodiment, the controller 130 determines the pre-coding matrix by applying the determined power controlling matrix A to the downstream crosstalk channel G, according to equation (11).

Thereafter, at S315, the controller 130 applies the resulting pre-coding matrix to the downstream channel matrix H. The resulting matrix R is then used for communicating data on the plurality of active communication lines between the distribution center 110 and the plurality of CPEs 150i to 150 _n shown in FIG. 1.

A direct determination of the power controlling matrix at S305 will now be described. FIG. 4 describes a process for a direct determination of the power controlling matrix A, according to one example embodiment.

At S401, the controller 130 obtains a threshold β. In one example embodiment, β may be a design parameter that is determined based on empirical studies. The threshold β may be chosen by an operator of the system. The smaller the threshold β is, the faster the system will converge to a final solution (e.g. after joining or leaving operations). Larger values of threshold β may result in a pre-coder with better performance once the system converges to the final solution. Accordingly, in one example embodiment, the threshold β may be obtained by the controller 130 based on a tradeoff between the speed of convergence and the quality of the performance of the pre-coder.

At S403, the controller 130 initializes a variable k to 1. The variable k represents an index of a row of the power controlling matrix A and is between 1 and the maximum number of communication lines 300 (which is m as shown in FIG. 1).

At S406, the controller 130 examines the k* row of the downstream crosstalk channel matrix G obtained at S300, described above with reference to FIG. 3. In one example embodiment, the controller 130 determines whether the k* row of the downstream crosstalk channel matrix G is naturally small (e.g., the sum over j of IGj _q l is less than β)-

If at S406, the controller 130 determines that the k* row of the downstream crosstalk channel matrix G is naturally small, then at S411, the controller 130 assigns λ^=1 to the k* diagonal power controlling parameter of the power controlling matrix A.

If at S406, the controller 130 determines that the k* row of the downstream crosstalk channel matrix G is not naturally small, then at S416, the controller 130 assigns a value of less than 1 to A value smaller than 1 for results in suppression of crosstalk by a factor of (Ι-λ^ for the k* victim line.

In one example embodiment, for the k* row of the downstream crosstalk channel matrix G that is not naturally small, the controller 130 determines

, where β is the above defined threshold obtained at S401 and

inverse of the absolute row sum for the k row of downstream crosstalk channel matrix G.

In summary, the controller 130 may determine the power controlling parameters of A according to the following expression:

th

Thereafter, at S421 and after examining the k row of the downstream crosstalk channel matrix G, the controller 130 determines whether all rows of the crosstalk channel matrix G have been examined/analyzed. If at S421 the controller 130 determines that all rows of the crosstalk channel matrix G have not be examined/analyzed, then the process proceeds to S423 where the variable k is incremented by 1 and then the process reverts back to S406 and the controller 130 repeats S406 to S421 until all rows of the downstream crosstalk channel matrix G are examined/analyzed.

If at S421, the controller 130 determines that all rows of the downstream crosstalk channel matrix G have been examined/analyzed, then the process reverts back to S305 at S426 with the power controlling matrix A determined.

In the example embodiment of FIG. 4, the controller 130 determines the power controlling matrix A to have the following properties. First, the power controlling matrix A is determined such that a measure of strength (e.g., a norm) of a product of the power controlling matrix A and the downstream crosstalk channel matrix G, is less than the threshold β. This measure of strength can be a measure that is an upper bound on the spectral radius p(AG), in which case the chosen matrix is such that p(AG) is smaller than β. Determining the power controlling matrix A such that p(AG) would be smaller than β, ensures that the converged compensation matrix Ω is small and thus the pre-coding matrix C converges quickly. In other words, the pre-coding matrix C converges to the expression on the right hand side of equation (11) (when iteratively applying equations (20) or (21), provided below). Quickness has to do with the number of iterations needed before the pre-coding matrix C is sufficiently (within a threshold) close to satisfying equation (11). The "distance" between the pre-coding matrix C and an ideal pre-coding matrix basically follows a geometric progression, being proportional to β ^η after n iterations. As a result, choosing a smaller β makes the convergence faster. However, the smaller β uses a smaller power-controlling matrix Λ, which makes equation (11) farther away from the ideal equation (4b).

If the power controlling matrix A is not an identity matrix, the objective of complete cancellation of crosstalk may not be achieved because the pre-coding matrix Co may no longer take on the ideal form expressed in equation (4). For a non-identity A, there is a residual crosstalk matrix E, which may be expressed as:

E = (I + G)C - / = (/ + AG)C + (/ - A)GC - / = (/ - A)G(I + AG) ¹ (13) assuming the pre-coding matrix has converged to C = (I+AG) ^A .

The leading term (I - A) on the left side of the last expression in equation (13) indicates that the residual interference may be controlled on a row-by-row basis, i.e. per victim line, where each victim line may be any one of the plurality of communication lines (e.g., lines 300 in FIG. 1) that experience crosstalk induced by the remaining ones of the communication lines. In particular, for any victim line k with _k =l, the corresponding row of the error matrix E converges to zero. However, for any victim line k with λ^Ι, the corresponding row of the error matrix E may not converge to zero, meaning that the line will be partially protected and the crosstalk will be partially suppressed (e.g., by a factor of (1- λ^. For a given downstream crosstalk channel matrix G, such as the one obtained at S300, the norm of AG may be made small by ensuring that each row is small. While the method of FIG. 4 is described with reference to the downstream channel/operation, the described method may be modified and applied to the upstream channel/operation as well.

The process of determining a power controlling matrix and subsequently a post- coding matrix on the upstream channel is similar as that described above for the downstream channel with reference to FIG. 4.

For example, post-coding matrix Cu may be obtained by the controller 130 as follows:

Ου = (Ι+Ω.) = (Ι+ΟΛ) ^Λ (14) where in equation (14), when compared to equation (11) for the downstream channel, the power controlling matrix A appears on the right of the upstream crosstalk channel matrix Gu instead of the left.

Furthermore, the equivalent of equation (12) for the upstream channel is as follows:

where in equation (15), when compared to equation (12), the indices k and j are switched in order to ensure that the absolute column sum of the product (GuA) of the upstream crosstalk channel matrix Gu and the power controlling matrix A is lower than the threshold β.

Accordingly, the equivalent of equation (13) for the error matrix for the upstream channel is: E = C(I+G)-I = (I+GA)- ² [ (I+GA)+G(I-A)] - 1 = ( GA) ^l G(l-A) (16) where matrices C and G represent the post-coding matrix Cu and the upstream crosstalk channel matrix Gu, respectively.

In equation (16), because the term (Ι-Λ) is on the right side instead of the left side as is the case in equation (13), the power controlling parameters directly control the influence of different disturbers (e.g., communication lines that induce crosstalk interference on a victim line). For example, if = 1, then crosstalk from the k* communication line on all other lines is fully cancelled, while if < 1 , crosstalk from the k* communication line may affect all lines.

Accordingly, fast convergence of tracking updates, and/or controlling the size of the power controlling parameters in the upstream channel is also achieved.

As an alternative to a direct determination of the power controlling matrix A described above, an iterative updating algorithm may be implemented to constantly update the power controlling parameters of the power controlling matrix A.

FIG. 5 describes a process for determining the power controlling matrix using an iterative updating algorithm, according to one example embodiment. As a reminder, the process of FIG. 5 is described with reference to the downstream channel.

At S502, the controller 130, initializes a variable n to 0 and a compensation matrix Ω[η] for n=0, where n indicates the iteration step of the iterative updating algorithm in determining the power controlling matrix and updating the pre-coding matrix C utilized by the pre-coder 285. In other words, FIG. 5 illustrates an example embodiment where the controller 130 modifies the power controlling parameters as part of updating the pre-coding matrix C utilized by the pre-coder 285.

In one example embodiment, the controller 130 determines Ω[0] such that power constraints of all of the communication lines 300 are satisfied. The controller 130 ensures that the power constraints are enforced by determining Ω[0] such that ? (_2[0]) < β ² , where k is variable between 0 and the maximum number of rows of Ω[0] (e.g., the maximum number of rows of Ω[0] may correspond to the maximum number of communication lines 300, which in FIG. 1 is equal to m).

In one example embodiment, ? is defined as a row sum operator given by: r _k (B) = ∑j \B _kj \ ² (17)

where the variable B may be replaced with specific iterations of Ω (e.g., -2[0]). Furthermore, j is a variable that increments from 1 to the maximum number of columns of Ω[0] (e.g., the maximum number of columns of Ω[0] may correspond to the maximum number of communication lines, which in FIG. 1 is equal to m, given that G is a square matrix).

At S507 and during each iteration of the iterative updating of the power controlling matrix A, the controller 130 determines an estimate of a residual crosstalk matrix E[n] (e.g., E[n] for n=0), which may be represented as E[n] . In one example embodiment, the controller 130 determines the estimate of the residual crosstalk matrix E[n] based on sending probe signals, collecting error feedback and processing the error feedback, using any known method.

At S512, the controller 130, determines for each row k of the Ω matrix, an adjusted row power. In one example embodiment, the adjusted row power for the k* row may be expressed as:

9 _k = r _k (Ω[η] - EM) =∑| (Ω[η] - E[n]) _k] \ |2

(18)

with k=l,..., m (where m is the maximum number of communication lines).

At S517, the controller 130 determines the k* parameter of the power controlling matrix A. In one example embodiment, the controller 130 determines the k* parameter of the power controlling matrix according to the following expression: M = min(l , ^ ^"/2 ) (19)

At S522, the controller 130 updates the compensation matrix Ω for the next iteration using the power controlling parameters determined at S517. In one example embodiment, the controller 130 updates the compensation matrix according to the following expression:

Ω[η+1] = (Ι-Α[η](Ι-Α[η]))Ω[η] - A[n]A[n] E[n] (20)

Equation (20) may be rewritten Ω[η+1] = (Ι-Α[η])Ω[η] + Α[η]Λ[η](Ω[η]- Ε[η] ) (21) where equation (21) illustrates that during each iteration of the iterative updating, Ω[η+1] is a convex combination of a compensation matrix of the previous iteration (e.g., and a second matrix, both of which satisfy the PSD constraints, which implies that Ω[η+1] satisfies the PSD constraints. At S522, the controller also determines the pre-coding matrix Co using equation (4a) after the compensation matrix Ω[η+1] is determined.

At S527, the controller 130 determines whether the estimate of the residual matrix E[n] determined at S507 has converged. In one example embodiment, the controller 130 determines that the estimate of the residual matrix E[n] has converged if for a number of iterations the value of E[n] does not vary or only experiences small variations.

If the controller 130 determines at S527 that the estimate of the residual matrix E[n] has not converged, then at S529 the controller 130 increments n by 1. Thereafter, the process reverts back to S507 and the controller 130 repeats S507 to S527 until the controller 130 determines that E[n] has converged. Thereafter, at S532, the controller 130 ends the iteration.

In an alternative example embodiment of the iterative updating, described above with reference to FIG. 5, the controller 130 may not determine updated power controlling parameters at S335 during each iteration of the iterative updating algorithm. Instead, the controller 130 retains the power controlling parameters previously determined until the compensation power leaves a specified range. For example, if the power control matrix A is fixed to some value, A[l], and equation (21) is consistently applied, then the pre-coding matrix C[n] will converge toward (I+A[1]G) , which may have a row power that is too high or too low. As the pre-coding matrix C[n] converges toward (7+/l[l]G) ^"1 that may have a row power that is too high, then as n increases, the pre-coding matrix C[n] will have even higher row power. At that point, the controller 130, instead of using the pre-coding matrix C[n], updates the power controlling matrix to a new value as reflected in equation (24) below. In one example embodiment, the specified range may be determined based on the threshold β and a parameter ε, as reflected in equations (23) and (24) below.

Accordingly, S512 of FIG. 5 may be modified such that the controller 130 determines the k* row power during each iteration of the iterative updating algorithm, based on the following expression:

9 _k = r _k (A[n - 1](Ω[η] - E[n])) =∑| A[n - 1](Ω[η] - E[n]) _kj I ² (22)

i

Furthermore, S517 of FIG. 5 may be modified as follows:

If (l-28) ^{2 2} _k [n-l] ² < 0 _k < ² _k [n-l] ² , then A _k [n] = A[n - l] (23) Else, λ, [η] = Ώήη(1 , (1 - ε)βθ^ ^/12 [η - 1] ) (24) where ε is a parameter specifying the width of a range of target values for a communication line that has a constrained power associated therewith. In other words, instead of determining the row sum of each controlled row to be exactly equal to β ² , the controller 130 determines the row sum of each row to be between (1-2ε) ² β ² and β ² ·

In one example embodiment, the exact/optimal power controlling parameters may not be used because relatively small changes in λι^ may not translate to significant changes in vectoring gain on communication line k. For example, a power controlling parameter for line k, limits the vectoring gain on line k to approximately -20*logio(l- λ^. Accordingly, using λ^Ο.Ο translates into no vectoring gain for the k* communication line while λ^Ο.2, translates into only a 2 dB vectoring gain on the k* communication line, meaning that the performance on the k* communication line is not very sensitive to _k for _k near 0.

While the above observation remains true for values of λι^ close to 0, as λι^ approaches 1, small changes of λι^ may translate into large changes in vectoring gains.

Accordingly, in one example embodiment, just a fixed number of representative values of X _k (e.g., X _k e {0, 0.25, 0.5, 0.75, l}) may be used. Therefore, instead of equations (23) and (24), S517 of FIG. 5, may be modified such that the k power controlling parameter is determined as the largest value of from the representative values such that A ² _k d _k ≤ β ² , where 9 _k and β are the same as defined above.

While the example embodiments above have been described with respect to the operation of the downstream channel as mentioned in several instances, the downstream process may be easily modified and applies to the upstream channel operation. PSD constraints may be enforced in some example embodiments for purposes such as avoiding noise amplification (e.g., noise at an input of a post-coder on the receiver side is amplified at the post-coder outputting depending on the size of the power controlling parameters), avoiding quantization errors or issues arising from the dynamic range of the post-coder, and to simplify the computational requirement at leaving and joining events.

The process of applying the iterative updating algorithm in the upstream channel is similar as that described above for the downstream channel with reference to FIG. 5. For example, instead of the row sum operation (17), a column sum operator is used, which is given by: c _k ( ) = ∑j \B _Jk \ ² (25) where in equation (25) the notation "c" for column in used instead of "r" for row in equation (17). Furthermore, the indices j and k are switched in equation (25) compared to equation (17).

Second, equation (18) is modified to be based on the column sum operator of equation (25) as opposed to row sum operator of equation (17). Therefore, the modified version of equation (18) for the upstream channel is given by equation (26) below.

Third, equations (20) and (21) of the downstream channel may be respectively replaced by equations (27) and (28), shown below, for the upstream channel. +1] = Ω[η] (I- (I-A[n]) A[n]) - E[n] A[n] A[n] (27)

+1] = Ω[η] (I-A[n]) + (Ω[η] - E[n] ) A[n] A[n] (28)

Lastly, equation (22) for the downstream channel may be modified for the upstream channel, as shown below.

9 _k = c _k ((Q[n] - E[n])A[n -l]) =∑| (Ω[η] - E[n]) _jk A[n - 1] I |2

(29)

In the example embodiments described above, the power controlling matrix is determined to limit the pre-coder output power (i.e., enforce the PSD constraint of each of the communication lines) or the post-coder. However, in an alternative example embodiment, the power controlling matrix is determined not only to limit the pre-coder output power but also to limit what may be referred to as a cancellation depth. Moreover, in one example embodiment and on the upstream channel, the power controlling matrix is determined to limit the post-coder output power. In an alternative example embodiment and on the upstream channel, the power controlling matrix is determined not only to limit the post-coder output power but also to limit the cancellation depth in the upstream channel.

Cancellation depth (CD) refers to a degree to which a system may decrease crosstalk interference. For example, a cancellation depth of 30 dB means that an original crosstalk of -10 dB may be further reduced to -40 dB through vectoring (i.e., -10 dB - 30 dB = -40 dB). A cancellation depth is limited by the precision of the underlying hardware that applies the pre-coding coefficients as well as the accuracy with which the pre-coding coefficients are estimated. While a cancellation depth with as high of a value as possible is ideal, in certain circumstances it may be desirable to limit the cancellation depth for system stability purposes.

For example, a system may experience some sort of an external fluctuating noise and that such external fluctuating noise may fluctuate between -40 dB and -30 dB below the useful signal. VDSL systems may not handle fluctuating noise well enough, which may in turn result in an unstable system. Accordingly, if the cancellation depth is intentionally limited to 20 dB, then crosstalk interference is reduced to only -30 dB as opposed to -40 dB described above. In this instance, the external noise which fluctuates between -30 dB and -40 dB may not adversely affect the performance of the VDSL system.

The cancellation depth of a vectored system may be expressed as the difference between the interference level observed without vectoring and the interference observed with vectoring active, expressed in dB.

In one example embodiment, for a system with an error matrix E, the interference level experienced by the k* communication line is given by: where ¼ _¾ represents the interference level experienced by the k communication line. In equation (30), it is assumed that all communication lines have equal transmit powers.

For an non- vectored system (i.e., a system where the applied pre-coding matrix is an identity matrix C= Γ), the error matrix E is the same as the downstream crosstalk channel matrix G. In other words, the interference level of the non- vectored system is given by:

w _k { non - vectored } = 10 log (3D

However, for a vectored system, where a pre-coding matrix C to which a power controlling matrix A is applied (i.e., C = (I +AG) ) is used, the error matrix E of the vectored system may be given by:

E{vectored} = (I-A)G(I+AG) ^A ≡ (I-A)G (32)

Therefore, the interference of the vectored system is given by: w _k { vectored} = 101og (33)

Accordingly, based on the definition of the cancellation depth given above, the cancellation depth is: w _k { non - vectored } - w _k { vectored }≡ -20 log _w (l - A _k ) (34)

The above cancellation depth has been described with regard to the downstream channel. However, on the upstream channel, the same cancellation depth may be applied across all victim lines as opposed to a per- victim line depth cancellation. In other words, on the upstream channel, l _k may be replaced with λ for all victim lines and thus equation (34) may be modified for the upstream channel as shown in equation (35) below. w _t {non - vectored } - w _k { vectored }≡ -20 log ₁₀ (l - λ ) (35)

According to equation (35) if Λ=λΙ, all communication lines experience the same cancellation depth on the upstream channel.

In the example embodiments described above, the same power controlling parameter is applied by the controller 130 to all elements in a row of the pre-coding matrix Co or to all elements in a column of the post-coding matrix CJ.

In an alternative example embodiment, each coefficient in the pre-coding matrix or the post-coding matrix may be updated by the controller 130 with a different power controlling parameter.

Accordingly, instead of a single diagonal power controlling matrix A of power controlling parameters, m different power controlling matrices A ^m , A ^m) are determined by the controller 130. The diagonal elements of the m different power controlling matrices define m ² different power controlling parameters.

The corresponding pre-coding matrix Co is defined, column by column, by: C _D ^(k) = (I+A ^k) G _D ) ^(k) for each k (36) where u ^(k) is a column vector whose k* component is 1 , with all other elements being zero, such that for any matrix B, the product B u ^(k) represents the k* column of B. Similarly, in the upstream direction, the post-coding matrix Cu is defined, row by row, by: u« ^T C _f/ = u ^(k)T (/+G _f/ yl ^(k) ) ^"1 for each k (37) where u ^(k)T is a row vector whose k* component is 1 , with all other elements being zero, such that for any matrix B, the product u ^(k)T B represents the k* row of B.

Therefore, in the downstream direction, the k* column of the error matrix E is then given by equation (38) below. E u ^(k) = (I-A ^ik) ) G (I+A ^ik) G _D yV ^k) (38)

In the upstream direction, the k* row of the error matrix E is given by equation (39) below. u ^(k) E = u ^{(k) T} (I+G _v A ^k y G (I-A ^k) ) (39)

In the downstream direction, the power controlling parameter A ^k) ^ is applied by the controller 130 to the compensation coefficient of the compensation matrix Ω. In the upstream direction, the power controlling parameter A ^k) ^ is applied by the controller 130 to the compensation coefficient ¾ of the compensation matrix Ω. Accordingly, each coefficient of the compensation matrix Ω may be separately controlled by the controller 130.

One example application of applying different controlling parameters to coefficients of the pre-coding matrix or the post-coding matrix, is to use a more aggressive power controlling scheme for faster convergence of users that have recently initiated a session, as well as to use a less aggressive power controlling scheme for better performance for users that have been active longer than other users. Another example application of applying different controlling parameters to coefficients of the pre- coding matrix or the post-coding matrix, may be to force the diagonal elements of compensation matrix Ω to zero, for example in vectoring systems in which the diagonal elements of pre-coding matrix or the post-coding matrix are hardwired to unity. This may be accomplished by setting /l ^(k) _kk = 0 for each k. Although this results in non-zero diagonal error terms E _kk , the error terms may be compensated in practice by automatic adaptations of equalizer coefficients in the receiver.

Example embodiments being thus described, it will be obvious that the same may be varied in many ways. Such variations are not to be regarded as a departure from the spirit and scope of example embodiments, and all such modifications as would be obvious to one skilled in the art are intended to be included within the scope of the claims.