MICROMECHANICAL DEVICES HAVING STRESS DECOUPLING STRUCTURE AND METHODS OF MANUFACTURING THEREOF

Technical Field

Aspects of the present invention relate generally to micro-electromechanical systems (MEMS) and their fabrication, and in particular to micromachined structures for die attachment of micromechanical devices.

Background

MEMS devices such as angular rate sensors, accelerometers, or pressure sensors, are used for a variety of electronic measuring systems, inertial measurement units, inertial navigation systems and so on. These devices typically contain moving or vibrating components and are generally constructed in metal, quartz or silicon. Silicon based MEMS devices are preferred because they can be miniaturised and manufactured relatively cheaply in large production runs by batch manufacture.

To reduce the uncontrolled effects caused the environment, MEMS devices must be provided with elements that considerably reduce the environmental loads. Exposure to shock, vibrations, variable and/or non-uniform temperature and humidity are the typical environmental loads that affect the performance of the system. The performance of many existing devices is degraded by the presence of non-uniform characteristics and built-in stress that can cause unintended sensitivity to external mechanical and thermal loads or unpredictable drift of characteristics.

Many attempts have been made to overcome problems with induced stress in MEMS devices. Some existing solutions address this problem directly at device level by use of stress-release structures and pedestals (US 7325451 B2, US7454971 B2, US6684699B1 ) and/or new fabrication methods (US

20130146994A1 ), however system designers need to ensure that the mechanical and thermal loads are kept as low, as constant and as uniform as possible.

At system level, the stress-decoupling between of the sensitive MEMS may be achieved by employing at least one external stress-decoupling substrate, properly configured. The external stress-decoupling substrate can be anything suitable for the considered application, from structured silicon beams to metal brackets, fixtures and lids (EP2075221A2, EP 2006248B1 , US8803262B2).

Further stress-decoupling is achieved by making use of small-sized pedestals or posts implemented either on the device itself (US8240203B2), or on the substrate (US8803262B2). Whilst useful for stress decoupling, devices using single pedestals are often subject to rotation errors.

EP2 420 470A1 discloses a microphone comprising pillar regions. In addition to stress release, these regions provide die attach area control and a stable reference alignment plane. This is particularly of high relevance in products using accelerometers, inclinometers and angular rate sensors that need to be accurately aligned to the pre-defined reference axes and planes and hold this alignment for their lifetime.

Existing devices such as Sensonor™ SAR500 devices achieve decoupling between the package and the angular rate sensor die by means of a double-side, fully symmetrical suspension of 75 pm thick gold wires, which in this particular product served electrical, mechanical and thermal purposes (S. Schroder, A. Nafari, K. Persson, E. Westby, A. Fischer, G. Stemme, F. Niklaus, S. Haasl, "Stress-Minimized Packaging of Inertial Sensors Using Wire Bonding," Transducers & Eurosensors XXVII, pp. 1962-1965, 2013).

There is an ongoing need for providing improved high-precision, high-stability MEMS devices.

Summary

According to a first, independent, aspect of the invention, there is provided a micromechanical device comprising: a semiconductor wafer comprising a top semiconductor layer and a bottom semiconductor layer separated by a first insulating layer; wherein a stress-decoupling structure is formed on the backside of the bottom semiconductor layer, the stress decoupling structure comprising members elongate in shape, each having a longer dimension extending in a direction substantially perpendicular to said layers, wherein the stress-decoupling structure comprises a plurality of stud members and wherein a metallic layer is applied to the stud members.

Advantageously, the metallic layer functions as a thermal conductivity layer between the device and the substrate on which the device will be subsequently mounted. This combination allows for a high precision, high stability device with good mechanical decoupling, as well as good electrical conductivity and good thermal conductivity, in contrast to known devices.

The stud members not only define a stable reference plane (as opposed to a single post in the centre of the die), but including include metallization on the tips of the studs achieves good thermal and electrical conductivity. For example, this may be metallisation with electroless Ni/Au over aluminium. This metallisation process is compatible with CMOS. As each solder joint is linked to a small area, the density and size of voids can be reduced.

Preferably, the stress-decoupling structure comprises a pedestal member. In other words, the members elongate in shape are stud members, and they additionally comprise a pedestal member which is wider than any stud member; i.e. the pedestal has diameter greater than a maximum diameter of the plurality of stud members.

The combination of pedestal and stud members is advantageous and may be provided by structuring the backside of the wafer to form the stress-decoupling structure for die attachment of high-precision, high-stability MEMS devices.

It will be understood that the pedestal and stud members are each elongate in shape, each having a longer dimension extending in a direction substantially perpendicular to said layers. The pedestal member is a relatively wider structure that is rather mechanically rigid. The pedestal member is needed primarily for providing a good electrical contact to the handle wafer (substrate). One, central, pedestal member is preferred. The stud members may be taller than the pedestal member, and are flexible structures that function to absorb stress. If no pedestal is used, the studs additionally perform the role of electrical connectors, in addition to providing mechanical support. Using no pedestal member (i.e. just stud members) is a good solution for controlling stress-distribution in the top semiconductor layer. Preferably, the semiconductor wafer is a cavity SOI (C-SOI) wafer. In this embodiment, the bottom semiconductor layer comprises at least one cavity adjacent the top semiconductor layer.

In a dependent aspect, the pedestal member is circular in cross section. Preferably, the diameter of the pedestal member is greater than 80 pm. In a dependent aspect, at least one of the stud members is circular in cross section. Preferably, the diameter of the at least one of the stud members is approximately 5 pm. Alternatively, the pedestal member and/or the stud members may be square in cross section with similar dimensions.

In a dependent aspect the pedestal member is arranged centrally within the stress decoupling structure, being surrounded by the plurality of stud members.

In a dependent aspect, the plurality of stud members are arranged to in a uniform distribution within the stress decoupling structure. As such, the stud members are distributed uniformly over the entire backside surface for the die, between the central pedestal member and the die edges.

In an alternative dependent aspect, the plurality of stud members are arranged in rows. In a further dependent aspect, the rows are at equal distances from the pedestal member. In a further dependent aspect, the stud members are arranged in a rectangular or square formation. In other words, the rows form the sides of a rectangle or square, with the pedestal member located at its centre. As such, the stud members are distributed only along the die edges.

In further dependent aspects, the stud members in one row are spaced at regular intervals from each other.

In a dependent aspect, the members of the stress-decoupling structure (i.e. pedestal and stud members) are distributed in a customised manner such that the mechanical stress in the active mechanical structures is minimised. It will be appreciated that the distribution will dependent on each device, for example methods such as FEM may be used to optimise configurations.

In a dependent aspect, the semiconductor layer further comprises a second insulation layer located on the backside of the bottom semiconductor layer and the metallic layer beneath the second insulating layer, wherein a direct electrical contact is formed with the metallic layer by selectively removing the second insulating layer forming a contact hole in the second insulating layer. In this aspect, the stress-decoupling structure comprises the pedestal member and the second insulation layer is preferably an oxide layer.

Advantageously, the metallic layer serves as a highly thermal conductivity layer between the device and the substrate on which the device will be subsequently mounted. Further, it defines the mounting reference plane on which the die attachment process is subsequently performed. The mounting reference plane, except for the inherent manufacturing tolerances, must be parallel to the device reference plane, defined by the front surface of the top semiconductor layer. Furthermore, the metallic layer may serve as die attachment material itself.

In a further dependent aspect, the metallic layer is patterned to form a peripheral portion surrounding the direct electrical contact the peripheral portion for electrical connection between the semiconductor layer and a substrate on which the device is mounted in use. The peripheral portion is a pad portion having a pedestal rim. As such, the peripheral portion forms a central ‘pad’ within the stress decoupling structure. Preferably, a recess is formed within the patterned metallic layer beneath said contact hole in the second insulating layer.

Preferably, the dimension, shape, number and location of the studs are chosen as such as the external mechanical and thermal loads are absorbed by the elastic deformation of the stud members. Advantageously, this leaves the active mechanical structures manufactured within the top semiconductor layer of the wafer stress-free. Preferably, the location of the stud members is chosen as such as to keep the device layers generally parallel to the mounting reference surface during subsequent assembly steps.

In a dependent aspect, the device is configured to be an inertial sensor, such as acceleration sensor, angular rate sensor, inclination sensor, and angular acceleration sensor.

According to a second, independent, aspect of the invention, there is provided a method of manufacturing a micromechanical device, the method comprising: providing a semiconductor wafer comprising a top semiconductor layer and a bottom semiconductor layer separated by a first insulating layer; and forming a stress-decoupling structure on the backside of the bottom semiconductor layer, the stress decoupling structure comprising members elongate in shape, each having a longer dimension extending in a direction substantially perpendicular to said layers, wherein the stress-decoupling structure comprises a plurality of stud members and wherein a metallic layer is applied to the plurality of stud members.

The method advantageously employees the step of structuring the backside of wafers to allow stress reduction and redistribution after mounting high-precision, high-stability MEMS devices. The method achieves stress-decoupling between the formed MEMS device and the environment.

In a dependent aspect, the stress-decoupling structure is formed by etching recesses in the bottom semiconductor layer.

In a dependent aspect, the semiconductor wafer further comprises a second insulation layer located on the backside of the bottom semiconductor layer, the method further comprising providing the metallic layer beneath the second insulating layer, wherein forming a stress decoupling structure comprises selectively removing the second insulating layer to form a contact hole for direct electrical contact with the metallic layer. In this aspect, the stress-decoupling structure comprises the pedestal member and the second insulation layer is preferably an oxide layer.

In a further dependent aspect, the method further comprises the step of patterning the second insulating layer. In a further dependent aspect, the method further comprises the step of etching the bottom semiconductor layer.

Devices and methods according to aspect above enable fabrication of micromachined structures for die attachment of high-precision, high-stability MEMS devices which further enables stress reduction and redistribution within mounted MEMS devices, such that the impact of environmental factors upon the sensitive mechanical elements is minimised. Furthermore, the structures also provide for high thermal conductivity when combined with additional elements implemented on the mounting substrate, thus insuring excellent temperature uniformity within the MEMS devices.

The micromachined structures and the die attachment method described hereinafter also provide a stable reference plane for the accelerometers, inclinometers and angular rate sensors.

In the present invention, studs covered with thin layers of silicon oxide and metal, manufactured by DRIE on the backside of the MEMS die, play the role of stressdecoupling structures and improves the long-term electrical stability of the device, while also providing for a stable reference alignment plane.

Brief Description of Drawings

Aspects of the present invention will now be described, by way of example only, with reference to the accompanying Figures (not to scale), in which: Figure 1 (A) shows elements of a starting raw wafer, which is a cavity SOI (C-SOI) wafer comprising predefined cavities.

Figure 1 (B) shows elements of a starting raw wafer, which is a regular bonded SOI (BSOI) wafer.

Figure 2 shows a preferred embodiment of a high-stability MEMS device comprising a stress-decoupling structure manufactured using methods according to embodiments of the invention.

Figure 3 shows a preferred layout of a stress-decoupling structure.

Figure 4 shows an alternate layout of a stress-decoupling structure.

Figure 5 shows the deformation of the stress-decoupling structures under an external mechanical load.

Figure 6 shows a device mounted by means of a generic adhesive on a substrate comprising a large metal pad for electrical connections.

Figure 7 illustrates the risk of losing the parallelism between the device and the mounting surface in the absence of the studs.

Figure 8 (a-e) illustrates a preferred embodiment of a manufacturing process for the stress-decoupling structures.

Figure 9 illustrates a generic device comprising 4 double-clamped beams as active MEMS structures, used to demonstrate the effectiveness of the described method. Figure 10 illustrates the maximum von Mises stress in the cantilevers of the device shown in Figure 9, for the case of no studs, used as reference.

Figure 11 illustrates the maximum von Mises stress in the cantilevers of the device shown in Figure 9, for the case with low density, uniformly distributed studs.

Figure 12 illustrates the maximum von Mises stress in the cantilevers of the device shown in Figure 9, for the case with medium density, uniformly distributed studs.

Figure 13 illustrates the maximum von Mises stress in the cantilevers of the device shown in Figure 9, for the case with high density, uniformly distributed studs.

Figure 14 illustrates the maximum von Mises stress in the cantilevers of the device shown in Figure 9, for the case with a customised distribution of studs to achieve redistribution of stress and strain in the active structures.

Figure 15 illustrates the deformation contours for the example illustrated in Figure 14. Detailed Description

Figures 1 (A) and 1 (B) respectively show examples of starting SOI wafers (1a, 1 b) and their elements. Wafer 1 a is a cavity SOI (C-SOI) wafer. Wafer 1 b is a regular bonded SOI (BSOI) wafer. The starting SOI, also known as the MEMS wafer, is formed from a device layer (2) and a handle wafer (4), separated by a buried thermal oxide layer (3). A thermal oxide layer (5) is present on the backside of the handle wafer, serving as a stress-compensation layer to avoid bending and warping of the wafer. Preferred embodiments utilise the cavity SOI (C-SOI) wafer (1a) which comprises predefined cavities (6).

Figure 2 illustrates a cross-sectional view of a generic MEMS device comprising elements referred to as studs (8) manufactured according to a preferred embodiment of the invention. The MEMS device can be an angular rate sensor, an accelerometer, an inclinometer, a pressure sensor or any combination of those. The device comprises a MEMS active structure (14) manufactured within the device layer (2) of an SOI wafer (1 a).

As shown in Figure 2, a stress-decoupling structure comprises a pedestal (11 ), preferably cylindrical (circular cross section), surrounded by a plurality of studs (8), each preferably cylindrical (circular cross section). In preferred configurations the pedestal (11 ) is at least 80 pm wide while the studs (8) can be as small as 5 pm in diameter/size.

It will be appreciated that the shapes and cross sections of the pedestal and studs may vary. Not all stud members (8) need to have the same shape, and their distribution may vary. The studs (8) manufactured by DRIE etching of trenches (9) within the handle wafer (4), for example.

In a processing step, in order to contact electrically the handle wafer (4), the backside oxide (5) is selectively removed within the pedestal (11 ) to form a contact hole (12). The areas defining the future studs (8) are defined in the same processing step.

In the next step, a metal layer (7), preferably aluminium, is deposited and patterned to cover the subsequent studs (8), preferably the tips of the studs. Additionally, the metal layer (7) forms the central pad (13), surrounding the contact hole (12) in this example.

The patterned metal layer (7) advantageously serves several purposes: i. It defines a central pad (13) within the pedestal (11 ), providing electrical contact to the handle wafer (4) via the contact hole (12); ii. It serves as a highly thermal conductivity layer between the device and the substrate on which the device will be subsequently mounted; iii. It defines the mounting reference plane (15) on which the die attachment process is subsequently performed. The mounting reference plane (15), except for the inherent manufacturing tolerances, must be parallel to the device reference plane (16), defined by the front surface of the device layer (2), in which the MEMS active structure is fabricated; iv. It may serve as die attachment material itself, in specific circumstances.

As shown in Figure 2, open areas (10) located outside the region covered with studs (8), due to DRIE loading effects, penetrate deeper inside the handle wafer (4) than the trenches (9) located between the studs (8).

Figure 3 illustrates a preferred layout of the stress-decoupling structure, in cross section, comprising a circular, central, pedestal (11 ), surrounded by a plurality of circular studs (8), manufactured by DRIE etching of trenches (9) within the handle wafer (4). The plurality of studs in this example are arranged as a “forest” of studs (8) at regular intervals, filling the space around the central pedestal (11 ). It will be appreciated that the distances between the studs (8) may vary across the area they cover, so that their number and distribution may vary. Figure 4 illustrates an example of an alternate layout of the stress-decoupling structure, in cross section, comprising the circular central pedestal (11 ), surrounded at a predetermined distance, by four sides of circular studs (8) arranged at regular intervals. In this example, the studs (8) form a square shape with the pedestal (11 ) at its centre and they are referred to as forming a “fence” of studs (8). The studs are manufactured by DRIE etching of trenches (9) within the handle wafer (4).

It will be appreciated that the number and the distribution of the studs (8) depends on the size and shape of the device. The number and distribution may be chosen such that, under the entire range of mechanical and thermal loads, the studs (8) are able to absorb the mechanical deformation without exceeding the yielding strength of the materials, while still maintaining the device layer (2) parallel to the reference mounting surface (15).

Figure 5 illustrates how the generic stress-decoupling structure deforms under a mechanical load (18) exerted through the substrate (17) on which the device is ultimately mounted. In the example shown in Figure 5, the external load is of tensile nature and could be the result of either a mechanical stress in the substrate (17) or a temperature difference between the substrate (17) and the handle wafer (4). The deformation of the studs (8) is shown with dashed lines. The stress developed in the studs (8) due to the deformation caused by the external factors must not exceed the yielding strength of the materials. This requirement is a main design requirement for the proper dimensioning of the studs (8).

Figure 6 shows an example of a device mounted by means of a generic adhesive (20) on a substrate (17) comprising a large metal pad (19) for electrical connections. Figure 6 illustrates the stabilising effect of the studs (8) against undesired tilt. The studs (8) ensure that the device reference surface (16) remains parallel to the mounting reference surface (15) within the limits set by the raw material specifications. The studs (8) are electrically isolated from the substrate by the backside oxide layer (5). Figure 7 illustrates the risk of undesired tilt caused by the assembly process in the absence of the stabilising studs (8). The pedestal (11 ) by itself cannot guarantee that the device reference surface (16) remains parallel to the mounting reference surface (15).

Figure 8(a-e) illustrates the preferred fabrication sequence of the stress-decoupling structures comprising studs (8). The process starts with the raw SOI wafer (1 ), shown in Figure 8a). In this example, the wafer (1 ) is a C-SOI wafer.

A contact hole (12) is opened in the backside oxide (5), in the central area of the die, as illustrated in Figure 8b). Then, a metal layer (7) is deposited and patterned on the backside to form the central pad (13) and to cover the tips of the subsequent studs (8), as shown in Figure 8c). The metal can be any highly electrical and thermal conductive metals, such as aluminium, tungsten, silver or gold, depending on the actual application. The same metal layer (7) defines the reference mounting surface (15), which must be and remain parallel to the device reference surface (16), except for the initial tolerances in the specifications of the raw SOI wafer (1 ).

Subsequently, the backside oxide (5) is patterned again to define the subsequent studs, as illustrated in Figure 8d). The process continues by DRIE etching of the handle wafer (4) to a depth chosen by design, as shown in Figure 8e). At this stage, due to the loading effects of the DRIE process, the trenches (9) between the studs (8) have a lesser depth than the outer areas (10).

It will be appreciated that in configurations where only studs (8) are used without a pedestal, they need to function as electrical connectors and cannot comprise the backside oxide (5) representing the second insulation layer; only the metal layer (7) will be deposited directly onto the handle wafer (4) representing the bottom semiconductor layer (e.g. silicon). The studs (8) are usually are too narrow to allow for a contact hole and metallisation, as in the case of the pedestal. Figure 9 illustrates a generic device comprising 4 double-clamped beams as active MEMS structures (14), manufactured within the device layer (2) of a C-SOI wafer (1 ), used to demonstrate the effectiveness of the above described method by means of finite element method (FEM).

Figure 10 illustrates the maximum von Mises stress in the cantilevers of the device shown in Figure 9, for the case with no studs, used as reference. The extracted value in this example is 2.22- 107 N/m2.

Figure 11 illustrates the maximum von Mises stress in the cantilevers of the device shown in Figure 9, for the case with low density, uniformly distributed studs. The extracted value in this example is 1.36- 107 N/m2. The residual stress level in the cantilevers is lower compared to the reference value.

Figure 12 illustrates the maximum von Mises stress in the cantilevers of the device shown in Figure 9, for the case with medium density, uniformly distributed studs. The extracted value in this example is 1.18- 107 N/m2. The residual stress level in the cantilevers is lower than the reference value and the case shown in Figure 11 .

Figure 13 illustrates the maximum von Mises stress in the cantilevers of the device shown in Figure 9, for the case with high density, uniformly distributed studs, according to preferred embodiments of the invention. The extracted value in this example is 0.73- 107 N/m2. Advantageously, The residual stress level in the cantilevers is lower than the reference value and the case shown in Figures 11 and 12.

Figure 14 illustrates the maximum von Mises stress in the cantilevers of the device shown in Figure 9, for the case with a customised distribution of studs to achieve redistribution of stress and strain in the active structures. The extracted value in this example is 0.65- 107 N/m2. This demonstrates that the embodiments of the present invention, through an optimised distribution of the studs, can reduce the residual stress to very low values in areas of interest (i.e. areas containing the active mechanical parts of the device).

Figure 15 illustrates the deformation contours for the example illustrated in Figure 14, thus demonstrating the ability to manipulate the distribution of the residual stress and strain by customising the distribution of the studs.