BACKGROUND OF THE INVENTION Field of the Invention

[0001] The present invention relates generally to multimedia transmission systems and more particularly to systems and methods for transmitting high definition digital video and standard definition analog video over a single cable.

Description of Related Art

[0002] With the advent of digital broadcast television and streaming video technologies various video cameras, monitors and video recorders have become available with enhanced resolution and advanced features. Closed circuit television ("CCTV") systems now offer high definition video outputs and compressed digital video signals for use in applications such as premises surveillance, access control and remote monitoring of facilities. However, legacy systems remain in place and standard definition analog video signals are in widespread use and will continue to be used during the transition to all-digital, high-definition systems. In particular, coaxial cable ("Coax") has been deployed to carry signals from CCTV cameras to monitoring stations. Some deployed CCTV cameras transmit compressed video signals over local area networks, or wide area networks, and these cameras may use the Internet Protocol ("IP") as a communications means for transmitting the compressed video signal. [0003] Fig. 1 illustrates conventional systems using Coax to carry standard definition analog video. A basic analog camera 10 typically generates a composite video baseband signal ("CVBS") that can be transmitted up to 300 meters using Coax 11. The CVBS signal is commonly provided to a video recording system which often comprises a digital video recorder ("DVR") 12 that records the CVBS in digital format. A conventional monitor 14 may be connected to the DVR 12 to simultaneously display the standard definition analog video, which generally has a resolution of 720x480 pixels.

[0004] Digital camera 16 may supplant analog camera 10 in some applications. The digital camera 16 may support a serial digital interface ("SDI") that can be used to transmit uncompressed standard definition digital video over Coax 17 to DVR 12 at approximately 270 Mbps.

[0005] Fig. 2 illustrates conventional approaches to transmitting high definition video (1920x1080 pixels) in currently deployed systems. First, a digital camera 20 may support a high-definition serial digital interface (HD-SDI) that can be used to transmit uncompressed high-definition digital video over Coax 21 to DVR 22 at the rate of 1.5Gbps. The cable distance supported under such high transmission rate is up to 100 meters. Second, an IP- based, high-definition ("HD") camera 24 may generate a compressed digital HD video signal over 100 Mbps Ethernet using standard category 5 ("CAT5") twisted pair cable 25 for distances up to 100 meters. The signal is received by a DVR 22 and recorded for non-real time playback. Existing Coax 26 can be used to transmit video from camera 24 to a DVR 22 using CAT5-to-Coax bridge modems 27 and 29 or other conversion devices. The use of networking to enable the camera to transmit digital video allows these systems to add some upstream communications, typically control and audio signals 28.

BRIEF SUMMARY OF THE INVENTION

[0006] Certain embodiments of the invention provide cameras and systems and methods for operating cameras. A processor may receive an image signal from an image sensor and produce a plurality of video signals representative of the image signal. An encoder is used for combining the baseband video signal and the digital video signal as an output signal for transmission over a cable. The video signals may include a baseband video signal and a digital video signal and that are substantially isochronous. The camera may be operated as a closed circuit high definition television camera. [0007] According to certain aspects of the invention, the baseband video signal can comprise a standard definition analog video signal and the digital video signal may be modulated before combination with the baseband video signal. The digital video signal can comprise a compressed high definition digital video signal. The frame rate of the digital video signal can be less than the frame rate of the image signal, particularly where the modulated digital signal is provided to a video recorder.

[0008] In certain embodiments, a decoder is configured to demodulate an upstream signal received from the transmission cable used to carry downstream video or from a wireless communication network. The demodulated upstream signal can comprise control signals, including signals to control the position and orientation of the camera, to control the production of the baseband video signal and the digital video signal by the processor and to select a portion of the image signal for encoding as the baseband video signal. The control signals may also include a signal to select a portion of the image signal for encoding as the digital video signal and an audio signal used to drive an audio output of the camera such as a loudspeaker.

[0009] Certain embodiments of the invention provide methods for transmitting video images. The methods may include frequency division multiplexing a video signal received from a high definition imaging device to obtain a modulated digital signal, producing an output signal by combining the modulated digital signal with a baseband analog signal representative of the video signal and transmitting the output signal simultaneously to a monitor and digital video storage device. In some of these embodiments, the monitor displays the baseband analog representation of the video signal and/or the digital video storage records a sequence of high definition frames extracted from the modulated digital signal using a digital video recorder. The digital video signal may be compressed. [0010] In certain embodiments, transmitting the output signal includes providing the output signal to a coaxial cable and/or to a wireless transmitter. An input signal received from the coaxial cable or a wireless network may be demodulated to obtain a control signal. The baseband analog signal may be generated by encoding a portion of the video signal in a composite video signal, and the portion of the video signal to be encoded in the composite video signal may be controlled using the control signal. The control signal may control the position of the camera. Demodulating the input signal may additionally yield an audio signal from the input signal.

[0011] Certain embodiments of the invention provide systems and methods for operating cameras. A processor may receive an image signal from an image sensor and produce a plurality of video signals, control logic may be configured to respond to a control signal received by the camera and a modulator can be configured to modulate the digital video signal to obtain a modulated signal. The plurality of video signals can include a baseband video signal and a digital video signal. Each of the plurality of video signals represents at least a portion of a field of view of the camera and the control signal may control the content of the baseband and digital video signals. The modulated signal and the baseband video signal are typically transmitted simultaneously by the camera.

[0012] The baseband and digital video signals may be substantially isochronous. An encoder can combine the baseband video signal and the modulated signal as an output signal for transmission over a cable. The control signal can be received wirelessly from a wireless network, for example. The modulated signal may be at least partially transmitted wirelessly. The digital video signal may be a high definition digital video signal and may be a compressed digital video signal. The control signal moves the portion of the field of view represented by one of the video signals.

BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Fig. 1 illustrates a prior art system using Coax to carry standard definition analog video.

[0014] Fig. 2 illustrates prior art approaches to transmitting high definition digital video. [0015] Fig. 3 depicts a system for transmission of analog and digital video according to certain aspects of the invention.

[0016] Fig. 4 depicts a networked system for transmission of analog and digital video according to certain aspects of the invention.

[0017] Fig. 5 shows bandwidth allocation for transmission of analog and digital video over a coaxial cable according to certain aspects of the invention. [0018] Fig. 6 illustrates an example of CCTV camera equipment constructed according to certain aspects of the invention.

[0019] Fig. 7 illustrates an example of a modem used in DVR equipment constructed according to certain aspects of the invention.

[0020] Fig. 8 illustrates an example of a modem used in network switch equipment constructed according to certain aspects of the invention.

[0021] Fig. 9 is an example of a frame structure used in ATSC digital television.

[0022] Fig. 10 is an example of a conventional frame synchronization packet.

[0023] Fig. 11 is an example of a data segment in a conventional data frame.

[0024] Fig. 12 provides a simplified view of a frame arrangement.

[0025] Fig. 13 is a block schematic of a modulator according to certain aspects of the invention.

[0026] Fig. 14 is a block representation of a frame structure employed in certain embodiments of the invention.

[0027] Fig. 15 illustrates operation of a convolutional byte interleaver in certain embodiments of the invention.

[0028] Fig. 16 is a block schematic of a selectable code rate punctured trellis coded modulation employed in certain embodiments of the invention.

[0029] Fig. 17 illustrates examples of QAM mappings.

[0030] Fig. 18 shows a frame sync/mode packet.

[0031] Fig. 19 is a simplified frame structure employed in certain embodiments of the invention.

[0032] Fig. 20 is a block schematic of a demodulator according to certain aspects of the invention.

[0033] Fig. 21 is a block schematic of a camera side modem according to certain aspects of the invention.

[0034] Fig. 22 is a block schematic of a monitor side modem according to certain aspects of the invention.

[0035] Fig. 23 illustrates a camera side baseband to passband QAM modulator according to certain aspects of the invention.

[0036] Figs. 24A and 24B illustrate monitor side passband to baseband QAM demodulators according to certain aspects of the invention.

[0037] Fig. 25 illustrates a monitor side digital equalizer and carrier phase/frequency loop according to certain aspects of the invention.

[0038] Fig. 26 shows attenuation is depicted as a function of frequency in coax cables.

[0039] Fig. 27A depicts power spectral density (PSD) of equalizer input.

[0040] Fig. 27B depicts magnitude response of converged equalizer taps. [0041] Figs. 28A, 28B, 29A and 29B show loss versus tilt in a passband digital video signal at different frequencies.

[0042] Fig. 30 shows a monitor side modem having a digital equalizer within the QAM demodulator according to certain aspects of the invention.

[0043] Fig. 31 depicts an analog active filter suitable for equalizing baseband CVBS according to certain aspects of the invention.

[0044] Fig. 32 shows examples of filter responses in certain embodiments of the invention.

[0045] Figs. 33A and 33B are QPSK constellations illustrating rotation in the complex plane.

[0046] Fig. 34 is a block schematic illustrating phase correction processes according to certain aspects of the invention.

[0047] Fig. 35 depicts an integral-proportional ("IP") filter according to certain aspects of the invention.

[0048] Fig. 36 illustrates a transmitted symbol.

[0049] Figs. 37A, 37B, 37C and 37D illustrate possible recovered symbols based on the transmitted symbol of Fig. 36.

[0050] Fig. 38 shows an example of phase shift in a received symbol.

[0051] Fig. 39 shows an example of a transmitted constellation based on typical real and imaginary parts of frame-sync symbols.

[0052] Fig. 40 is a block schematic representation of a phase offset corrector employed in certain embodiments of the invention.

[0053] Fig. 41 illustrates a process for determining reliability related to frame synchronization.

[0054] Fig. 42 depicts certain aspects of an equalizer and carrier phase/frequency loop employed in certain embodiments of the invention.

[0055] Fig. 43 shows a slicer and phase error detector module employed in certain embodiments of the invention.

[0056] Fig. 44 illustrates a complex exponential LUT module employed in certain embodiments of the invention.

[0057] Figs. 45A and 45B chart the real part of equalized outputs in a QPSK signal (Fig.

45A) and a 16-QAM signal (Fig. 45B).

[0058] Figs. 46A, 46B and 46C are histograms of the power of an equalized output when the constellation is QPSK (Fig. 46A), 16-QAM (Fig. 46B) and 64-QAM (Fig. 46C), generated using one embodiment where the equalizer converged at R=58.

[0059] Fig. 47 illustrates examples of constellations at the equalizer output and carrier phase/frequency recovery loop module input. [0060] Fig. 48 shows examples of QAM mappings with thresholds depicted.

[0061] Fig. 49 shows the upper right hand quadrant of all three constellations overlaid on the same plot.

[0062] Fig. 50 illustrates the operation of one approach to determining a constellation.

[0063] Figs. 51 A and 51 B depict a system for simultaneous transmission of standard definition and high definition video according to certain aspects of the invention and having a tap or interruption of signal.

[0064] Figs. 52A and 52B illustrate processes for generating a frame sync pulse from a noisy signal according to certain aspects of the invention.

[0065] Fig. 53 is a block schematic of a camera side modem having a coax connected indicator according to certain aspects of the invention.

[0066] Fig. 54 illustrates certain aspects of an automatic gain control loop.

DETAILED DESCRIPTION OF THE INVENTION

[0067] Embodiments of the present invention will now be described in detail with reference to the drawings, which are provided as illustrative examples so as to enable those skilled in the art to practice the invention. Notably, the figures and examples below are not meant to limit the scope of the present invention to a single embodiment, but other embodiments are possible by way of interchange of some or all of the described or illustrated elements. Wherever convenient, the same reference numbers will be used throughout the drawings to refer to same or like parts. Where certain elements of these embodiments can be partially or fully implemented using known components, only those portions of such known components that are necessary for an understanding of the present invention will be described, and detailed descriptions of other portions of such known components will be omitted so as not to obscure the invention. In the present specification, an embodiment showing a singular component should not be considered limiting; rather, the invention is intended to encompass other embodiments including a plurality of the same component, and vice-versa, unless explicitly stated otherwise herein. Moreover, applicants do not intend for any term in the specification or claims to be ascribed an uncommon or special meaning unless explicitly set forth as such. Further, the present invention encompasses present and future known equivalents to the components referred to herein by way of illustration.

[0068] Certain embodiments of the invention provide systems and methods that enable a camera to simultaneously transmit high-definition digital video and standard definition analog video over Coax. A high-definition camera is adapted to produce a compressed digital video signal and an analog baseband signal. The digital signal is modulated and transmitted in a band of frequencies separated from the upper frequencies of the baseband video signal. The analog signal may be encoded according to any desired standard, including PAL, SECAM and NTSC standards and their variants. [0069] For the purposes of this description, an example of a system that employs a security link over coax ("SLOC") will be described. Moreover, the SLOC will be generally described as having upstream and downstream signals relative to a camera: the camera is located upstream. In the description, an example of a SLOC system provides a downstream high definition ("HD") video signal in a first passband, an upstream audio and control signal in a second passband and a downstream composite video baseband signal ("CVBS"). It will be appreciated that other passband signals and allocations of bandwidth may be used. For example, the system may employ two digital video signals of standard or high-definition resolution. I

[0070] Fig. 3 depicts an embodiment of the present invention illustrating certain principles of operation of the invention. The example depicts deployment of HD camera 30 in a system where it is desirable to view live video produced by camera 30 while concurrently recording a high definition copy of the video on DVR 32. An example of such a system is a security or surveillance system. The function of HD camera 30 may be remotely controlled as will be described in more detail below. HD camera 30 can be adapted to produce the high definition signal 332 and an analog CVBS signal 330 simultaneously. In certain embodiments, the high definition signal 332 and an analog CVBS signal 330 are isochronous but may be substantially isochronous if, for example, delays in processing the different signals are unequal. In one example, CVBS signal 330 may be delayed because of digital-to-analog conversion overhead. In another example, the high definition signal 332 may be compressed and subject to variable delay based on compression ratios, etc. In certain embodiments, CVBS 330 and high definition signal 332 may be synchronized or maintained in a constant time relationship with a common audio signal generated by camera 30.

[0071] Camera 30 may be adapted by adding external components or by integrating hardware and software into camera 30. In the example, a security link over coax modem ("SLOC-T") 31 is provided within the camera 30. SLOC-T 31 can be constructed as a modem integrated as an addition to camera 30 or implemented using components already integrated into camera 30. SLOC-T 30 enables a multimedia feed to be transmitted downstream over a communications channel: as illustrated, SLOC-T 31 is a device that enables multiple signals carrying different resolution signals representative of video produced by camera 30 to be sent over a coaxial cable 33. For the sake of clarity of description, a SLOC deployed in transmitting device such as camera 30 will be referred to herein as "SLOC-T" and a SLOC provided in a receiving device such as a DVR, network switch, etc., will be referred to as a "SLOC-R." Descriptions of SLOC-T and a SLOC-R devices are provided in more detail below. '

[0072] SLOC-T 31 may cooperate with other components of camera 30 and/or may add enhanced functionality that enables camera 30 to operate in various modes. In one example, camera 30 may produce an uncompressed HD digital video output and SLOC-T 31 may provide an ability to compress the HD digital video signal. Thus, SLOC-T 31 may provide capabilities beyond modulation and demodulation as necessary to enhance functionality of host camera 30. Accordingly, several SLOC-T devices can operate in a variety of modes, some of which are provided by way of example. In one mode, SLOC-T 31 receives a compressed HD video signal and a standard definition analog version of the signal from camera 30 and transmits both signals over coax 33. In another mode, SLOC-T 31 receives an uncompressed HD video signal and a standard definition analog version of the signal from camera 30 and transmits a compressed HD digital version of the signal together with the standard definition analog signal over coax 33. SLOC-T 31 may transmit an HD digital signal and a standard definition analog signal derived from an HD signal received from camera 30.

[0073] In certain embodiments, SLOC-T 31 uses frequency division multiplexing to produce an output signal for transmission on Coax 33. In the example illustrated in Fig. 5, downstream digital signal is provided in a single band of frequencies 52 centered on a carrier 53 of frequency fe _d - Band of frequencies 52 commences beyond the highest frequency f ₀ of the baseband analog signal 50. This distinct band of frequencies 52 can be referred to as a channel. Channel 52 may be selected based on the capabilities of the SLOC-T 31 , available bandwidth, signal bandwidths and for other reasons. In some embodiments, channel 52 may be selected for compatibility with receiving equipment. In one example, the signal may be provided directly to a standard definition television and channel 52 may be selected to ensure adequate separation from baseband signal. The band of frequencies in channel 52 may also be selected based on standards for digital video transmission when standards defined encoding of the signal is used. It is contemplated that a single digital signal may be transmitted using two or more different channels to carry portions of the digital signal.

[0074] Any suitable modulation scheme may be used to produce a transmittable version of the digital signal. For example, different types of wired and wireless connections could be used with modulation schemes such as phase shift keying ("PSK"), frequency shift keying ("FSK"), quadrature amplitude modulation, ("QAM"), orthogonal frequency division multiplexing ("OFDM"), etc. The modulation scheme is typically selected based on factors that include characteristics of the medium used for transmission, frame rate of the desired video signal and other factors that impact available bandwidth in the channel 52. [0075] A SLOC-R modem 35 may be provided in a video capture device such as DVR 32. SLOC-R modem 35 may receive and process digital video and CVBS signals. Typically, CVBS signal is extracted and passed directly to a display system 33 for live viewing of the video images captured by camera 30. Display system 33 may be a standard definition monitor, although the display system may also receive a digitized version of the received analog signal. In one example, SLOC-R modem 35 may produce a digitized version of the analog signal for use with digital monitors or suitably equipped computers. Extraction of the baseband signal can typically be effected using a low pass filter that can be implemented using analog components or through digital signal processing techniques. The digital HD signal may be separately extracted and provided to the recording section of DVR 32. In certain embodiments, the digital HD video signal may be compressed in the DVR prior to recording. In many embodiments, the digital HD video signal is received as a compressed digital signal.

[0076] In certain embodiments, SLOC-T 31 and SLOC-R 35 are configured to support bidirectional transmission of signals. In the example of a security installation, and as will be described in detail below with reference to Fig. 6, camera 30 may include a microphone 614, loudspeaker 612, sensor 616, control interface 618 for controlling electromechanical actuators, and other features (see Fig. 6). In this example, SLOC-T 31 and SLOC-R 35 are typically configured to communicate control, audio and other data 36 to camera 30. [0077] Referring again to Fig. 5, in one embodiment, upstream data can be communicated to camera in one or more channels 54 located at the upper end of available bandwidth. Selection of channels for communication of digital multimedia signals 52, control and audio signals 54 and other data can be selected based on available bandwidth, signal- to-noise ratios detected in the channels 52 and 54, signaling standards and/or application specific requirements. In some embodiments, channel configuration, bandwidth and signal- to-noise ratios are determined upon connection of SLOC-T 31 and SLOC-R 35 using a training sequence. Typically, training sequences are used to ascertain the signaling capabilities of predetermined or negotiated channels, to select a channel 52 for transmission of digital video and for determining available bandwidth in the selected channel 52. The characteristics of the selected channel 52 may be used to set the compression levels for the digital video signal.

[0078] In certain embodiments, upstream signal 54 includes signals that can control the content of the downstream 52 and baseband 50 signals. For example, camera optics 600 may provide a fish-eye view of location monitored by camera 60 and camera processor may be controlled to select a portion of the image for transmission as baseband signal 50. Typically, downstream digital signal 52 can provide the complete image for recording on a DVR or for additional processing. Baseband signal 50 may receive the baseband signal 50 for live monitoring of the area under surveillance. The baseband signal 50 may comprise an adjusted image that corrects for visual effects created by the fish-eye lens. A viewer of the baseband signal 50 may cause the view to move within the field of the fish-eye lens by selecting a new portion of the captured image for viewing. For example, the viewer may request a "pan-right" to move the field of view to the right. Data transmitted in upstream signal 54 then cause the camera processor to extract and process the desired portion of the field of view. In certain embodiments, the requests to move the field of view incorporated in the baseband signal 50 may cause physical movement of the camera 60. Thus, control data in upstream signal 54 may affect the content of both baseband 50 and downstream digital 52 signals. [0079] In certain embodiments, downstream audio can be transmitted as part of the HD digital video signal and/or as part of the CVBS signal. Some downstream signaling may be carried in a separate dedicated channel (not shown). In certain embodiments, upstream communications to camera 30 may be handled using out-of-band communications methods including, for example, using wired or wireless networks. It is contemplated that certain embodiments may, as an alternative or as an additional option, transmit downstream digital signal 52 wirelessly. Thus, baseband signal 50 can be transmitted through Coax while some combination of upstream 54 and downstream 52 are transmitted wirelessly. Typically, upstream data 54 includes control signals for downstream 52 and baseband 50 signals regardless of method of transmission.

[0080] In certain embodiments, cable 33 may be provided directly to display system 33 for display of analog standard definition video. A standard definition monitor or display 33 typically includes filtering circuits that enable selection between baseband signals and standard modulated TV channels. Consequently monitor 33 may discard high frequency digitally-encoded carrier signals. DVR 32 may also be able to receive the digital video signal without additional processing if the digital video signal is transmitted in a standards-defined channel and using standards defined digital encoding. SLOC-R 35 decodes signals generated by SLOC-T 31 and provides decoded HD digital video and other signals for DVR 32. SLOC-R 35 may also encode control, audio and other data for transmission to camera 30.

[0081] Referring now to Fig. 4, an embodiment of the present invention is presented that illustrates certain principles of operation of the invention. Fig. 4 depicts an example based on a system where it is desirable to view live video produced by camera 40 while concurrently providing a high definition copy of the video on a network through network switch 44. In one example, the HD video feed is captured and streamed using an internal or external IP Video Server. HD camera 40 is typically adapted to produce the high definition signal and an analog baseband video signal simultaneously. Camera 40 may be adapted by adding external components or by integrating hardware and software into camera 40, such as SLOC-T 400. SLOC-T 400 may operate in the same manner as SLOC-T 31 featured in Fig. 3. However, SLOC-T 400 may be configured to encode a digital video signal in a manner that facilitates forwarding of the digital video signal over a network. For example, SLOC-T 400 may be programmed or otherwise configured to provide digital video signal according to a streaming format supported by the IP video server. [0082] The multiplexed video signals transmitted by digital camera 40 can be received by a network switch 44, optionally equipped with SLOC-R 440. The baseband standard definition analog signal can be extracted and provided to display 43. In certain embodiments,

SLOC-R 440 may extract and forward the digital high-definition video signal to a video server or other network device using a suitable network having sufficient bandwidth to carry the digital HD video signals. The digital HD video signal may comprise a compressed HD video signal. In certain embodiments, the digital high-definition signal extracted by SLOC-R 440 is compressed or further compressed for forwarding to a video server or other network device. SLOC-R 440 may include hardware and software for recoding and/or remodulating the digital high-definition signal for transmission on a network; for example, SLOC-R 440 may produce an H-264 signal encoded for transmission over Ethernet. [0083] Turning now to Fig. 6, certain embodiments of the invention provide enhanced capabilities applicable to security systems. In the depicted example, camera 60 comprises a modem SLOC-T 606 and a processor configured and adapted to provide digitally encoded multimedia signals in accordance with certain aspects of the invention. Sequences of images can be captured using a combination of optics 600 and an image sensor 602 including combinations of lens systems and CCD sensors known to those with skill in the art. Processor 604 typically receives a scan signal 603 from image sensor 602 which provides sequences of images captured according to a desired or predefined frame rate. [0084] In some embodiments, image sensor 602 may include hardware and logic to convert a scanned analog signal representative of images captured by one or more sensors and can produce a digital video signal. For example, image sensor 602 may include RGB (red, green, blue) sensors and image senor 602 may process the RGB sensor outputs internally to produce a digitally encoded color video signal as its output 603. In other embodiments, processor 604 may preprocess signal 603 from image sensor 602 to obtain a raw digital video signal. The raw digital video, whether obtained internally or received from image sensor 602 may be processed further by processor 604 to obtain an initial HD digital video signal. An analog standard definition signal may be obtained by processing the raw digital video signal, output 603 of sensor 602 or the initial HD digital video signal. Processor 604 may then format the initial HD digital video signal to obtain one or more HD digital video signals conforming to broadcast and other standards. For example, processor 604 may produce a signal that conforms to broadcast video standards such as ATSC and DVB standards. Processor 604 may additionally compress the digital video signal. [0085] Camera processor 604 may comprise a combination of commercially available components and custom hardware and software. In one example, processor may include one or more of microprocessors, digital signal processors, microcontrollers, sequencers and other programmable devices in combination with memory and support logic to perform a sequence of steps, instructions and/or programs. Storage 610 may be used to store computer readable instructions that, when executed, perform some or all of the functions described in this application. Camera processor 604 may include some built-in or "hard- coded" processes that can be used for construction of certain embodiments of the invention. Storage 610 may also be used for program scratch memory and/or to maintain configuration information. In certain embodiments, storage 610 may be used to store recordings of video captured by camera 60. Therefore, storage 610 may be implemented using volatile and non-volatile memory, optical and magnetic disks, removable electrically erasable memory, USB memory drives and other semiconductor, electromagnetic and optical storage devices. [0086] Signal 605 includes video signals provided by processor 604 to SLOC-T 606 and upstream control, audio and other upstream information received from line 62, forwarded by SLOC-T 606 to processor 604. Upstream audio information may be decoded, processed and/or formatted by processor 604 before the audio is relayed to a loudspeaker, transducer or other audio output system 612. Processor may amplify the audio signal or may employ a separate amplifier in audio output component 612. Upstream control may include optics control 601 and control signals for external devices, typically provided through control interface 618. External devices may include motors or actuators used to translate, rotate or otherwise orient the camera 60. Optics control signal 601 and external control signals 618 may be generated in response to predefined commands by a remote control system. For example, a remote user may manipulate a joystick that generates a sequence of coded instructions interpreted by camera processor 604 to mean "rotate camera 90 degrees clockwise in horizontal plane," and processor 604 may respond by sending a series of pulses to a stepping motor axially mounted relative to camera 60 such that the series of pulses causes the desired rotation of camera 60 about its vertical axis. Similar commands may adjust focus, zoom and iris of optics 600.

[0087] In another example, instructions and data may be provided in the upstream control information that can be used to control function of processor 604 and/or sensor 602. The instructions and data may be used to select an area within the field of view of the camera 60 for encoding in one or more of the downstream video signals. In certain embodiments, processor and sensor cooperate to provide one or more virtual cameras that can be manipulated remotely to designate portions of the field of view to be encoded, whereby the portions are selected by virtual pan, zoom and tilt functions that operate within the actual field of view determined by the optics of camera 60. In certain embodiments, processor 604 can additionally cause physical movement of the camera, thereby extending the range of pan, tilt and zoom functions.

[0088] It is contemplated that, in at least some embodiments, the CVBS and digital signals may each carry a portion of the image captured by image sensor 602. Image portions may overlap or may be from different areas within the field of view provided by lens 600. Moreover, in certain embodiments, additional cameras 60 and/or additional image sensors 602 may be used to expand the available field of view. For example, it may be desirable to configure plural cameras to obtain a panoramic (360°) view of an area. One or more processors 604 may provide analog and digital signals representing the view, or a portion of the view. In one example, the complete panoramic view may be provided in a digital signal that can be recorded on a DVR, while the CVBS signal may provide a selectable view within the panorama. The selectable view may be controlled using zoom, pan and other controls. In another example, CVBS and digital signals may provide a common or different portion of the panoramic view and the portions may be independently controllable by a remote viewer.

[0089] Fig. 7 depicts an example of the use of a SLOC-R 700, similar to SLOC-R 35 described in Fig. 3, in a security digital video recording system 70. System 70 comprises SLOC-R 700, a DVR processor 702 connected to peripherals 710, 712 and 714, an analog video decoder 704, a digital video decoder 708 and HD digital display processor 706. As described above, SLOC-R 700 receives and decodes signal from Coax 72, which typically comprises an analog standard definition video signal and an HD digital video signal. SLOC- R 700 also transmits upstream audio and control signals through Coax 72. SLOC-R typically splits the analog CVBS signal from the HD digital video signal in input signal 72, providing the digital video signal 703 to processor 702 and the CVBS signal 701 to a standard definition monitor 74 as a live feed from the camera 60 shown in Fig. 6. SLOC-R 700 may optionally provide the analog baseband video signal 701 to analog video decoder 704, which processes the signal to produce a digital standard definition video signal 705. Display processor 706 multiplexes and/or selects between digital standard definition signal 705 and a signal 707 derived from playback of stored HD digital video. Display processor may provide the selected signal in a format displayable by HD television or monitor 76. [0090] DVR processor 702 receives digital HD video signal 703 and optionally stores at least a portion of the signal as a recording of the video captured by camera 60. The recording may be stored in a local hard disk drive 714, on networked storage (not shown) or in other optical, electromagnetic or semiconductor storage connected through network interface 710 and/or USB/Firewire or other local bus 712. The recorded video may be further compressed to save storage space. DVR processor may retrieve recorded video and provide a playback signal 707 using digital video decoder 708.

[0091] Fig. 8 depicts an example of the use of a SLOC-R 800, similar to SLOC-R 440 depicted in Fig. 4, in a networked security device 80. Device 80 comprises SLOC-R 800 and a network switch processor 802, typically connected by a network to IP video server 86. As described above, SLOC-R 800 receives and decodes signal from Coax 82, which typically comprises an analog standard definition video signal and a HD digital video signal. SLOC-R 800 optionally transmits upstream audio and control signals through Coax 82. SLOC-R typically splits the analog CVBS signal from the HD digital video signal in input signal 82, providing the digital video signal 803 to processor 802 and the CVBS signal 801 to a standard definition monitor 84 as a live feed from camera 60 shown in Fig. 6. In certain embodiments, SLOC-R 80 may include components 804, 806 or the like, to digitize the CVBS signal 801 for use with a digital display such as high definition display 85, also as a live feed from camera 60 shown in Fig. 6. It will be appreciated, however, that a suitably equipped display device or computing device may receive CVBS signal 801 and perform digitization of the signal. Network switch processor 802 receives digital HD video signal 803 and optionally transmits the signal to a network video server 86 which can then maintain a recording of the video captured by camera 60. The digital HD video signal 803 may be further compressed before transmission to video server 86.

[0092] Referring once again to Figs. 5 and 6, certain embodiments of the invention permit the content of baseband analog signal 50 and downstream signal 52 to be selected as desired. In one example, both baseband signal 50 and downstream signal 52 contain the same image, the former in analog form and the latter encoded digitally. The digital image can be optionally and selectively transmitted compressed and uncompressed, in standard- definition and high-definition and at full frame rate or reduced frame rate. In another example, baseband signal 50 provides a portion of the full image captured by image sensor 602 while the downstream signal 52 carries the full image. In another example, baseband signal 50 provides the full image provided by the image sensor while the downstream contains a portion of the full image. Consequently, a highly configurable system is contemplated that allows users of digital cameras to select from a wide range of options for displaying, recording and transmitting video images.

Analog Equalization for Baseband Signals

[0093] Certain embodiments of the invention comprise systems and methods for ameliorating the effects of high frequency roll off in cables that cause more high frequency attenuation as the cable length increases. This tilt introduced by the cable degrades the baseband analog video and passband digital video signals, where the degradation worsens as the length of the cable increases. However, certain embodiments of the invention provide an equalizer, typically in the digital receiver, that removes the tilt on digital passband signals, enabling reliable decoding of the transmitted symbols.

[0094] Certain embodiments of the invention improve the performance of systems and apparatus, including those systems described above, in which baseband video signals may be combined with digital representations of the baseband video signal and with control signals, thereby enabling transmission over a single cable such as a coaxial cable ("coax"). Figs. 3 and 4 show examples of embodiments that provide a SLOC system and Fig. 5 shows one possible modulation scheme for the SLOC system. Taking the example of Fig. 3, HD camera 30 provides an output comprising compressed digital HD video 332, and an auxiliary camera output 330 comprising analog standard definition ("SD") CVBS. The compressed HD video signal 332 is modulated to passband 52 utilizing a SLOC camera side modem 31 , which comprises a QAM modulator that provides a modulated signal that can be combined with the baseband analog CVBS signal 330. The combined signal is transmitted downstream over coax cable 33, typically for distances that can extend to 300m or longer. At the monitor side, a SLOC monitor side modem 35 separates a signal representing baseband CVBS signal 330 from a signal representing of the passband downstream video signal 332. The signal representative of CVBS feeds an SD display 34 for delay free live viewing. The high passband downstream signal is demodulated with a QAM demodulator whose output feeds a host processor and DVR 32 which supports live (though perhaps slightly delayed) HD viewing on monitor 34 and non-real time HD playback for later viewing. [0095] In the example, upstream communication is provided as required by, for example, the IP protocol. Upstream communication may additionally be used to send audio and camera control signals 334 from the monitor side to the camera 30. Typically the bit rate, and thus the required bandwidth, for the upstream signal is typically much lower than that required for the downstream passband signal. Monitor side SLOC modem 35 includes a QAM modulator that modulates the IP signal to upstream passband 54. As depicted in Fig. 5, upstream passband 54 and downstream passband 52 are located at different spectral locations. At the camera side, SLOC modem 31 includes a QAM demodulator for receiving the upstream signal. This approach offers several advantages over prior systems and methods, including:

(1) Increased operational range - increased distance.

(2) Systems that can be deployed using existing infrastructure and reusing coax cable.

(3) Availability of low-delay, real-time (live) video.

(4) Live CVBS video and HD video can be viewed in separate locations.

[0096] Fig. 21 is a simplified schematic showing additional detail of the SLOC camera- side modem 49 of Fig. 4. The IP connection to the HD camera 2100 is interfaced to QAM modulator 212 and QAM demodulator 214 through media independent interface ("Mil") module 210. In one example, Mil 210 conforms to the IEEE 802.3 standard. QAM modulator 212 operates using well known principles to convert the baseband IP data stream 2100 into passband QAM symbols 2120. These symbols are summed at 216 with baseband CVBS signal 2160 and then fed to the diplexer 218. Diplexer 218 can be a 2-way analog device that passes the combined baseband and low passband downstream signal 2162 to the coax and receives the high passband upstream signal 2140 from the coax and feeds it to QAM demodulator 214. QAM demodulator 214 typically operates using well known principles to demodulate the high passband upstream signal 2140 received from the monitor side and output baseband data to Mil interface 210. [0097] Fig. 22 is a simplified schematic showing additional detail of the SLOC monitor side modem 45 of Fig. 4. Diplexer 220 receives the downstream combined baseband CVBS and low passband IP signal 2200 from a coax cable and splits the signal into component elements 2201-2203 by low-pass (LP) and high-pass (HP) filtering. CVBS signal 2201 may be directly transmitted to a standard definition monitor or other display device. Low passband signal 2202 can be fed to QAM demodulator 222 that feeds Mil interface module 226. Diplexer can also accept a high passband signal 2203 from QAM modulator 224 and may pass this upstream signal to the coax cable. QAM modulator 222 typically takes its input from the Mil interface 226 which can be connected to a host/DVR that supports the IP protocol.

[0098] Coax cables typically exhibit a significant high frequency roll off characteristic that causes more high frequency attenuation as the cable length increases. This "tilt" can be significant within the band of a passband signal and it can cause considerable inter-symbol interference ("ISI"). Digital equalization may be required to enable QAM demodulator 222 to correctly recover the transmitted data.

Baseband to Passband Modulation

[0099] Fig. 23 shows camera side baseband to passband QAM modulator 212 (Fig. 21 ) in more detail. Data from Mil 210 is received by FEC encoder/mapper 2300 which adds error protection data to the data stream received from Mil 210 using, for example, concatenated Reed-Solomon coding, byte interleaving and/or trellis coding. Mapper/encoder 2300 demultiplexes the data into streams 2300 and 2302, with a given size group of bits for each stream representing a QAM symbol amplitude level respectively in the real and imaginary directions. An isolated transmitted QAM pulse is given by: sΛO = d _Km q(t)cos{2πfj)-d _{I m} q{t)ύn(2πf _c t) = Re{d _m q(t)e ^jW ή, where d _{R m} and d _{l m} are determined by two independent message streams and represent the real and imaginary parts respectively of a complex QAM symbol, with m = \...M indexing a 2-dimensional QAM constellation of cardinality where Mis the modulating carrier frequency, and q(t) is a root raised cosine pulse function.

[00100] A continuous series of transmitted QAM pulses s(t) passes through a noisy multipath channel at a rate of F _s = \IT _S . Thus, the received signal at the input to the QAM receiver is given by r{t) = s(t) * c(t) + v(t) , where * denotes convolution, c(t) is the channel impulse response, and v(t) is additive white Gaussian noise. Thus: where d[n] is the complex transmitted symbol, / ₀ and θ _a are the frequency and phase offsets respectively of the receiver passband to baseband demodulator local oscillator with respect to the transmitter, such that f _w =f _c -f ₀ ■

Passband to Baseband Demodulator

[00101] Fig. 24A shows monitor side passband to baseband QAM demodulator 222 (Fig.

22) in more detail. A signal r(t) may be received from a coax cable, for example, is sampled (see 240) at a rate higher than the symbol rate, resulting in the sampled signal ^r { ^nT _sαmP )- After sampling:

Then, after downcon version, resampling at the symbol rate \IT _S and matched filtering obtains: x(kT _s ) -m]+ v'[k] , m~—∞ where v'[k] is sampled complex filtered noise, assuming that any ISI is due only to the channel impulse response c because of the pulse shaping and matched filtering q , combined with perfect symbol rate sample timing.

Equalizer and Carrier Phase/Frequency Loop

[00102] The digital equalizer and carrier phase/frequency loop of Fig. 24A is discussed in more detail with reference to Fig. 25. A signal x[k] enters an adaptive digital equalizer 250, which can include a linear digital filter used to compensate for the tilt caused by the channel impulse response c . Tap weight adjustment can be achieved using one or more known methods, including the LMS algorithm. The equalizer compares its output y[k] with a phase rotated version of 2-dimensional ("2-D") slicer decision d[k] to create an error signal which is used to calculate an updated set of filter tap weights. The LMS algorithm may operate as follows: let: x[k] represent an N long equalizer input vector, and y[k] represent the equalizer output vector g ^H [A:]x[A:], where g ^H [k] is the N long equalizer tap weight vector and the H superscript indicates conjugate transposition (Hermitian). e[k] = d[k]-y[k] where μ is a small step size parameter and the ^* superscript indicates complex conjugation. In order to remove the effect of the passband cable tilt, after convergence the LMS equalizer taps may approximate the inverse of the channel impulse response c .

[00103] A 2-D slicer 252 independently slices the real and imaginary parts of z[k] and outputs d[k], which is an estimate of the originally transmitted d\k\. Phase error detector module 258 receives z[k] and d[k] and forms phase error signal e _θ [ k]=

Low pass ("LP") filter 256 can be an integral-proportional filter that allows the loop to correct both phase and frequency offsets. The output of low pass filter 256 feeds a complex discrete voltage controlled oscillator ("VCO") 254 that outputs a complex phase/frequency correction factor e ^~jβ *- ^k ' which corrects for both θ ₀ and f _o . VCO 254 also provides an output

(e ^+jθ ^ ) that "un-corrects" the slice output d[k] so that it can be used to derive an error signal for the equalizer tap update. This is typically required because the equalizer operates on x[k]. Referring also to Fig. 24A, the equalizer output z[k] is fed to a symbol demapper which converts the detected real and imaginary levels into groups of bits. The FEC decoder then executes Viterbi decoding, byte deinterleaving, and/or Reed-Solomon decoding to correct received bit errors and passes the resultant data to the Mil interface.

Effect of Cable Length

[00104] The received video signals can experience attenuation as a function of frequency attributable to certain characteristics of the cable. For the purposes of this discussion, the example of a coax cable is described. The severity of the attenuation, which is often referred to as tilt, typically depends on the cable type and length. Figs. 26A and 26B show attenuation as a function of frequency for various lengths of cable types RG6 and RG59. It can be shown that the tilt is equivalent to multipath distortion, where the additional paths and main path have an extremely small delay spread. As the tilt increases, the number of non- trivial multipath components, and their respective gains, also increases. Multipath distortion causes ISI in the received signal and thus can severely degrade transmission reliability. In a digital signal, an equalizer can be used in the receiver to remove such impairment. Figs. 27A and 27B show power spectral density ("PSD") of the equalizer input and magnitude response of the converged equalizer taps, respectively. Specifically, Fig. 27A shows PSD of equalizer input after transmission through 2000ft of RG-6 cable, with a carrier frequency of 15.98MHz (both passband and relative baseband frequencies shown) and Fig 27B shows the magnitude response of the converged digital equalizer taps.

[00105] Certain embodiments of the invention comprise a digital equalizer that can undo the tilt introduced by the cable, removing the ISI in the passband signal and enable reliable decoding of the transmitted data. As cable length increases, the digital passband signal at the monitor side can be reliably received using the digital equalizer and well-known forward error protection methods for digital data, such as concatenated Reed-Solomon coding and trellis coding. However, cable tilt also adversely affects the high frequencies of the baseband analog CVBS signal reducing the sharpness of the picture and the intensity of the colors as viewed on the monitor side. Therefore, certain embodiments provide an adaptable filter, such as an analog equalizer, that can be applied to the CVBS signal at the monitor side to compensate for cable tilt at baseband. Certain embodiments take advantage of the passband digital equalizer to estimate the amount of tilt at baseband and then select the appropriate one of a set of baseband analog filters to be applied to the received CVBS signal.

Efficient Estimation of Passband Tilt

[00106] In estimating the tilt in the signal band, a frequency band can be selected where the tilt in the PSD of the input signal will be approximately linear when quantified in dB. Therefore, the frequencies of -2.67MHz to 2.67MHz in the baseband digital equalizer input, which would thus correspond to 13.31 MHz and 18.65MHz in the passband input signal, provide a suitable range. As shown in Fig. 26A, the tilt from 13.31 MHz to 18.65MHz is approximately 3.7dB for 2000 feet of RG-6. To estimate the tilt in dB from the converged digital equalizer filter taps, the following computation can be performed:

* _{dB (Eq. 1)} where G[k] is the DFT of the time-domain converged equalizer filter taps and k _{ and Ic ₁ correspond to specific frequency bins of the DFT. Since the digital equalization of Fig. 25 may be performed with a time-domain convolution, an FFT (or possibly N complex multiplies and additions for both points) is typically required for the purpose of estimating the tilt for a given k _x and k ₂ . That is,

, _(Eq . ₂₎ where g{n) = g _R (n) + /£,(«), « = 0,1...N - I are the N time-domain equalizer taps (the dependency on the time index is omitted). Note that the 1/N scalar is unnecessary in this computation. A similar computation would be performed for G(Jc ₂ ) . However, the computation can be significantly reduced by selecting the frequency bins carefully. By letting k _λ = N/4 , corresponding to a frequency of 2.67MHz, the complex exponential in equation (2) simplifies dramatically:

1 for n = 0,4,...N- 4. e-ι2m(N/4)/M _ - i forn = U5,...N- 3. ^{(Eq" 3)}

-1 for /7 = 2,6,...N- 2. / for n = 3,7,...N- I. The real and imaginary parts of the filter frequency response can be computed using summations:

N /4-1 N/4-1 JV/4-1 ΛT/4-1 <? _/ [*,] = ∑g _/ M- ∑> _Λ [4ιi + l]- ∑ _g/ [4« + 2]+ ∑g _Λ [4/i + 3]. (Eq. 5)

B=O «=0 n=0 B=O

Finally, the power at this frequency bin is:

By allowing k _x = N/4 , the power computation is significantly simplified. Similarly, if k _λ = 3N/4 , corresponding to a frequency of -2.67 MHz, the complex exponential will again be significantly simplified.

1 forn = 0,4,-N-4.

(Eq. 7)

-ι2m(lN/4)/N _ i /orn = l,5,...N-3.

-1 forn = 2,6,...N-2.

-i forn = 3,7, ...N -1.

The real and imaginary parts are computed as:

N 14-1 N 4-1 N/4-1 N /4-1

G _R [k ₂ }= ∑g _κ M- Vg _; [4B + l]- ∑g _R [4n + 2]+ ∑S/[4» + 3],

B=O B=O B=O n=0 (Eq. 8) ΛT/4-1 N /4-1 N /4-1 N /4-1 G ₇ [W] = ∑g ₇ M+ ∑g _Λ [4/i + l]- ∑ _g/ [4« + 2]- ∑gj4« + 3], _{(Eq. 9)} π=0 π=0 n=0 n=0 and the power | Cr[Ar ₁ ] | is computed as above. In Fig. 2b, the upward tilt in the magnitude response (in dB) of the converged filter taps is approximately linear even with the modest SΝR for a 64-QAM signal and the tap noise. Furthermore, when computed in this manner,

A _dB ~ 4.0 dB, which is very close to the actual tilt over this band of 3.7dB.

Using Passband Tilt Estimates for Baseband CVBS Tilt Correction

[00107] After estimating the passband tilt for the digital video signal, an appropriate baseband analog filter may be selected from one of M different filters. It can be shown that the estimated passband tilt of the digital video signal band will indicate the severity of the tilt in the baseband CVBS signal, which can then be roughly corrected with an analog filter. In Fig. 28A, the tilt in the digital video signal band from 13.31 MHz to 18.65 MHz is shown for RG-6, RG-11 , RG-59, and RG-174 and likely lengths for those cables. Fig. 28A shows the loss at 3.58 MHz versus the tilt in the passband digital video signal for RG-6, RG-11 , RG-59, and RG-174 cable types. Fig. 28B shows the loss at 6 MHz. It can be observed that the loss at 3.58 MHz and 6 MHz is roughly the same for all four cable types for a given tilt. Fig. 29A shows the loss at 3.58 MHz is shown versus the tilt in the passband digital video signal for RG-6, RG-11 , RG-59, and RG-174 cable types. Fig. 29B shows the loss at 6 MHz. It will be observed that the loss at 3.58 MHz and 6 MHz is roughly the same for all four cable types for a given tilt.

[00108] Since the estimated passband tilt is the only available information concerning the frequency response of the cable, the ideal scenario is one where the frequency response of the cable at baseband (CVBS signal band) is related to the tilt of the passband digital signal in a known manner, regardless of cable type or length. Figs. 28B, 29A and 29B confirm this situation in the frequency response at DC, 3.58 MHz, and 6 MHz. For example, at a tilt of 1.5 dB in the passband digital video signal, the loss at DC, loss at the color carrier (3.58 MHz), and the loss at 6 MHz is approximately 0.68 dB, 4.1 dB, and 5.3 dB, respectively for all four cables. Thus, regardless of whether the 1.5 dB of passband tilt was caused from 275 ft. of RG-174, 750 ft. of RG-59, 825 ft. of RG-6, or 1825 ft. of RG-11 , the same analog filter would undo the baseband tilt of the CVBS signal.

[00109] One example of an algorithm used for selecting an appropriate analog filter from a set of M filters is shown below:

Inputs:

Λ« = αnjGtøli ² , for Λ = 0, 1, . , . , M.

Hm = [ϋU»iWi) _> fe m = 0, l, ... ,M - i. Select analog filter L, end if

[00110] Note that a ₀ = 1 ; other values of a _n are < 1 and are chosen so that bit-shifted additions are sufficient to compute R _n . Therefore, the monitor side QAM demodulator of Fig. 24A is typically modified such that the digital equalizer of the passband QAM demodulator provides a signal that selects one of M analog CVBS filter responses. Fig. 24B shows the modified portion of monitor side QAM demodulator with analog filter select output from digital equalizer operating according to above described algorithm. Fig. 30 shows the entire monitor side modem with a digital equalizer within the QAM demodulator 304 providing a filter select signal 305 to CVBS analog equalizer 302. [00111] An example of an analog active filter suitable for equalizing the baseband CVBS signal is shown in Fig. 31. In this example, M =3 , so that there are 4 possible filtering selections. The desired filter response is selected by closing one of M+\ switches in switch module 310 which in turn grounds the respective RC pair connected to it. Possible filter responses are shown in Fig. 32.

[00112] One skilled in the art will appreciate that the invention can be applied to digital communications systems employing other passband modulation and forward error correction methods. Those skilled in the art will also recognize that more than two points in the FFT of passband digital equalizer tap weight vector g[n] may be used to select an analog filter for the CVBS signal and that other types of digital equalizer designs for the passband signal can be used, including frequency domain equalizers, where the values of G^k] and G ₂ [k] will have already been calculated as part of the equalization process. Also, well known equalizer tap weight calculation methods other than LMS may be employed, such as RLS. [00113] In certain embodiments, a CVBS analog filter with selectable responses may take a form other than that described above. Also, the equalizer for the CVBS signal may take the form of a digital filter, in which case the CVBS is sampled and digitized prior to equalization. In this case the tap weights of the digital filter are selected from a predetermined set of M tap weight vectors according to the same algorithm that was described to select one of M analog filter responses.

Framing in Digital Communications Systems

[00114] Digital data streams typically have some sort of frame structure such that the data is organized into uniformly sized groups of bits or bytes. Any system that uses block based forward error correction (FEC) will have frames organized around the error correction code word size. Also, if the system uses interleaving to combat impulse noise, the frame structure will be arranged with the interleaver parameters in mind. If the system uses data randomization to achieve a flat spectrum, the pseudo-random sequence utilized may be synchronized to the frame structure, restarting at the beginning of each frame. [00115] For an RF digital communications system, a receiver must typically first achieve carrier and symbol clock synchronization and equalization. It can then recover the transmitted data. But, to make sense of this incoming data stream, the receiver must also synchronize to the frame structure. In other words, the receiver must know where the error correction code words start and end. It also must be able to synchronize receiver modules such as the deinterleaver to match the interleaver operation of the transmitter so that the resultant deinterleaved bits or bytes are correctly ordered, and the de-randomizer to match the starting point of the pseudo-random sequence used in the transmitter to flatten the spectrum.

[00116] Conventional systems often provide for receiver frame synchronization by appending a known pattern of symbols of a fixed length at the beginning or end of the frame. This same pattern repeats every frame, and it often consists of a 2-level (i.e. binary) pseudorandom sequence with favorable auto-correlation properties. This means that while the auto-correlation of the sequence with itself at zero offset yields a large value, if the offset is non-zero the correlation value (side-lobe) is very small. Also the correlation for this frame sync sequence with random symbols will yield a small value. Therefore, if the receiver executes a correlation of the incoming symbols with a stored version of the frame sync pattern, it should expect to yield a large value only at the exact start of each frame. The receiver can then easily determine the starting point of each frame.

Examples of Frame Structure

[00117] With reference to Fig. 9, the ATSC digital television (DTV) terrestrial transmission standard adopted in 1996 provides a system in which data is transmitted in frames. Each frame 90 comprises 313 segments, and each segment contains 832 symbols for a total of 260,416 symbols per frame. The first four symbols in each segment are segment sync symbols 92 comprising the sequence [+5, -5, -5, +5]. The first segment in each frame is a frame sync segment 94 with 312 data segments 96, 98. Referring now to Fig. 10, frame sync segment 94 has a segment sync 100, a 511 symbol pseudo-random noise (PN511) sequence 101 , a 63 symbol pseudo-random noise (PN63) sequence 102, a second PN63 sequence 203 and a third PN63 sequence 104. This is followed by 24 mode symbols 105 indicating that the mode is 8 VSB. Pre-code symbols 107 and reserved symbols 106 complete frame sync segment 94. The segment sync 100 and PN511 101 symbols are a priori known to the receiver and may be used to acquire frame synchronization via correlation methods. All of the aforementioned symbols come from the set {+5, -5}. The last 12 symbols of this segment are from the set {-7 -5 -3 -1 +1 +3 +5 +7}, and are duplicates of the last 12 symbols of the preceding data field. These are called the precode symbols (not discussed here).

[00118] Referring also to Fig. 11 , for each of the subsequent 312 segments of the field, referred to as data segments, the 828 symbols 32 following the four segment sync symbols 30 are created from a single 207 byte (1656 bit) Reed-Solomon (RS) code-word by taking 2 bits at a time, trellis encoding them into 3 bits, then mapping each unit of 3 bits to an 8 level symbol from the set {-7 -5 -3 -1 +1 +3 +5 +7}.

[00119] Another example of framing in a digital communications system is seen in the ISDB-T system. Unlike the single-carrier ATSC system, ISDB-T is a multi-carrier system utilizing coded orthogonal frequency division multiplexing ("COFDM"). For example, mode 1 for ISDB-T uses 1 ,404 carriers. A frame consists of 204 COFDM symbols and each COFDM symbol can be thought of as a combination of 1 ,404 independent QAM symbols, one for each of the carriers. Thus, the frame is composed of a combination of 204 x 1404 = 286,416 QAM symbols. Of these, 254,592 are data, and 31 ,824 comprise both pilot information (which can be used for frame synchronization) and mode information which are scattered throughout the frame in a known pattern. [00120] A simplified view of this frame arrangement is shown in Fig. 12. It can be seen that the pilot and mode information is scattered about the frame in a known pattern. This system has modes that utilize three different QAM constellations - QPSK, 16 QAM, and 64 QAM. It also supports five different trellis coding rates (1/2, 2/3, 3/4, 5/6, 7/8) based on a single punctured mother code. This well-known technique makes it very economical to construct a single Viterbi decoder in the receiver that can easily be adjusted to decode all five of the specified codes.

[00121] Prior to trellis coding at the transmitter, the data is formed into 204 byte (1 ,632 bits) long RS blocks. While the number of COFDM symbols per frame is always constant, the number of RS blocks per frame varies with the selected mode, but most importantly, that number is always an integer. This allows for easy RS block synchronization in the receiver once frame sync has been established and the trellis code rate is known. In order for this to be true, the number of data bits per frame prior to trellis coding must be evenly divisible by 1 ,632 for all modes.

[00122] Table 1 shows the number of data bits per frame for all the modes (combination of QAM constellation and trellis code rate). In every case the number of data bits per frame is evenly divisible by 1632 (data bits means bits before trellis coding).

Table 1: Data Bits per Frame for ISDB-T

[00123] Certain embodiments of the present invention provide a framing structure for modulation systems used in digital communications systems. In particular, signaling systems and methods are provided that can be employed in security systems, including those described above. A convolutional byte interleaver interleaves a frame of data, wherein the interleaver is synchronized to a frame structure and a randomizer may be configured to produce a randomized data frame from the interleaved data frame. In one example, a punctured trellis code modulator is operated at a selectable code rate that produces a trellis coded data frame from the randomized data frame. A QAM mapper maps groups of bits in the trellis coded data frame to modulation symbols, thereby providing a mapped frame and a synchronizer adds a synchronization packet to the mapped frame. The punctured trellis code modulator can be bypassed as desired to obtain an optimized net bit rate under various white noise conditions, thereby permitting performance optimization of the system. [00124] In certain embodiments, the novel frame structure is provided in a single carrier communication system. An auto-correlation of a known pattern of symbols of a fixed length at the beginning or end of a frame at zero offset yields a large value, if the offset is non-zero the correlation value (side-lobe) is very small. However, the correlation for this frame sync sequence with random symbols will yield a small value. Therefore, a receiver may execute a correlation of incoming symbols with a stored version of the frame sync pattern in order to obtain a large value at the exact start of each frame enabling the receiver to determine the starting point of each frame. The communication system can operate in any of a plurality of modes, and may use various combinations of symbol constellations, trellis codes, and interleave patterns. The receiver must recognize and comprehend the mode in order to successfully recover the transmitted data. For this purpose, additional mode symbols can be added to the frame sync pattern. These mode symbols can be reliably received using correlation methods since they are sent repeatedly every frame. They can be made even more robust by encoding them using a block code.

[00125] One frame structure according to certain aspects of the invention utilizes punctured trellis coding and QAM constellation combinations similar to those used in ISDB-T. The number of symbols per frame can be a variable integer depending on the mode and the number of RS packets per frame is a constant integer regardless of mode. This arrangement simplifies the design of receiver processing blocks such as the de-randomizer and the de-interleaver because the number of RS packets per frame is always fixed. In conventional systems such as ISDB-T, the number of symbols per frame is constant and the number of RS packets per frame is a variable integer depending on the mode. The frame will be described with reference to an example depicted in Fig. 13 of a transmitter architecture that is constructed according to certain aspects of the invention. [00126] An RS encoder 1300 accepts byte data 1301 and an externally generated frame sync signal that indicates the start of each group of 315 Reed-Solomon packets 1322. As shown in Fig. 14, each packet 140 comprises 207 bytes, of which 20 are parity bytes 142. These 315 Reed-Solomon packets form forward error correction ("FEC") data frame 1322 which contains 65,205 bytes.

[00127] A convolutional byte interleaver 1302 follows. Fig. 15 illustrates a mode of operation of interleaver 1302 that combats impulse noise affecting the transmitted signal. The parameter B in paths 156, 158 is set to 207, and parameter M in paths 152, 154, 156 and 158 is set to 1. Frame sync signal 1303 forces input and output commutators 150 and 151 to the top position 1500, thus synchronizing the interleaving to the frame structure. Input and output commutators 150 and 151 move down one position 1502 as a byte enters the interleaver and a different byte exits the interleaver. When commutators 150 and 151 reach the bottom 1508, they shift back to the top 1500. Each of the B parallel paths 1506, 1508 contains a shift register 156 and 158 having the lengths shown in the Fig. 15 (path 1506 has length (B-2)M and path 1508 has length (B-I)M).

[00128] A randomizer 1306 produces a randomized FEC data frame 1328 by operating on the 65,205 x 8 = 521 ,640 bits of the FEC data frame 1324 by executing an exclusive or operation on those bits with a PN (pseudo-random noise) sequence of length 219 - 1 which is shortened by resetting the PN sequence generator at every frame sync time. [00129] An example of a selectable code rate punctured trellis coded modulation ("PTCM") module 1308 is shown in more detail in Fig. 16. PTCM 1308 uses a method known to those of skill in the art. The method that starts with a 64 state Vz rate coder and executes puncturing to achieve any one of 5 different code rates. In certain embodiments, the PTCM 1308 can also be completely bypassed (code rate = 1 ). This allows for a selectable trade off between net bit rate and white noise performance for the system. Similar trellis coding techniques are used in ISDB-T and DVB-T systems. PTCM produces two bits 1332 at the output for every bit provided to the input 1328. However, some of the output bits 1332 are discarded according to the selected code rate and corresponding puncture pattern. QAM mapper 1313 takes the bits in groups of 2, 4 or 6 from the coder output 1332 and maps them into QPSK, 16 QAM, or 64 QAM symbols respectively. Examples of such mappings are provided in Fig. 17.

[00130] Module 1312 adds a frame-sync/mode symbol packet (all symbols are QPSK) to the start of each FEC data frame 1334. With reference to Fig. 18, the first part 180 of this packet comprises 127 symbols and comprises an identical binary PN sequence for both the real and imaginary parts of the symbols. Other PN sequence lengths are possible, and the real and imaginary parts can have the opposite sign. The second part 182 of this packet comprises data that indicate the transmission mode - the selected QAM constellation and the selected trellis code rate. This mode data can be encoded using a block error correction code for added reliability at the receiver. Methods that can be employed include BCH coding and other block codes. In one example, 6 possible trellis code rates including bypass are possible. Additionally, three constellations are possible resulting in 18 modes. Accordingly, 5 bits are needed to represent each of the possible mode selections. The 5 bits could be encoded into a 16 bit code word using an extended BCH code. Since each QPSK symbol contains 2 bits, 8 mode symbols would be required.

[00131] Fig. 19 illustrates a frame structure 1336 (see Fig. 13) provided to passband modulation ("PB Mod") 1314. Payload 190 comprises 315 RS packets (521 ,640 bits). The number of QAM symbols to which the 315 RS packets are mapped can vary with the mode selection. The PB Mod module 1314 then modulates the baseband QAM symbols to passband using any suitable method known to those with skill in the art. [00132] Frame structures according to certain aspects of the invention advantageously overcome certain shortcomings and failings of conventional frames. In particular, the frame structure offers for all modes:

- a constant integral number of RS packets per frame regardless of mode, and

- the number of QAM symbols per frame is a variable integer for all modes

- an integral number of puncture pattern cycles per frame for all modes Note that providing an integer number of QAM symbols per frame is not a trivial accomplishment because the FEC data frame must exactly comprise I x 207 data bytes where I is a selected integer in order to have a fixed integral number of RS packets per frame. Accordingly, the number of data bits per frame prior to trellis coding must not only be an integer, but the number must be evenly divisible by 207 x 8 = 1656 for all modes. Furthermore, the number of trellis coder output bits per QAM symbol is 2, 4 and 6 bits respectively for QPSK, 16 QAM and 64 QAM (See Table 2. which shows a code rate = 1 for trellis code bypass). Additionally, trellis coding adds bits. The number of data bits per symbol prior to trellis coding is shown in Table 2, where each entry is calculated as: right - most column entry code rate

Table 2 - Data Bits per Symbol (input bits to trellis coder per mapped QAM symbol)

The fact that the number of data bits per symbol can be fractional requires that the RS packet size and the number of RS packets per frame be precisely selected. With RS packet size of 207 and 315 packets per frame an integral numbers of symbols per frame is attained. As shown in table 3, each entry can be calculated as: number of data bits per frame 521640

Table 3 - Symbols per Frame [00133] This frame provides the additional advantage that there are an integral number of puncture pattern cycles per frame (pp/frame) for all modes. In order to correctly decode the punctured trellis coded data, the decoder in the receiver must know how the puncture pattern aligns with the data. The bit-wise puncture patterns applied at the output of the mother code trellis coder are indicated in the second column of the table in Fig. 16. The number of Vs in each puncture pattern is the puncture pattern length. In the proposed system the puncture pattern always lines up with the start of the FEC data frame. This allows the use of frame sync in the receiver to properly align the de-puncturer in the receiver Viterbi decoder with the bit stream. The desired alignment is indicated in Table 4 which shows an integral number of pp/frame for all modes. The puncture pattern per symbol ("pp/symbol") entries can be calculated as: pp length # of trellis coder output bits per symbol

The pp/frame entries can be calculated as: symbols per frame from table 3 pp/symbol

Table 4 - Puncture Patterns per Frame

It will be appreciated that other combinations of RS packet sizes and numbers of packets per frame can be used to obtain the same desired result. The numbers provided herein are described for purposes of illustration only.

[00134] As shown in Fig. 20, certain embodiments of the invention provide a receiver architected to handle a frame structured according to certain aspects of the invention. Module 2000 receives and converts transmitted data in a passband signal to baseband QAM symbols. The operations performed by module 2000 can include symbol clock synchronization, equalization (to remove inter-symbol interference) and carrier recovery, typically using sub-modules. Accordingly, module 2000 may comprise an equalizer that outputs recovered baseband QAM symbols 2001. Baseband QAM signals 2001 are provided to two-level slicer 2018 for slicing in both the real and imaginary directions, thereby forming the sequences α _ft [A:]e [- l,+l] and α _; [A:]e [- l,+l] 2019 which are provided to frame-sync module 2020. Frame sync module 2020 performs a continuous cross-correlation operation on the incoming sliced QAM symbols 2019, separately for both the real and imaginary parts, with a stored copy of the binary frame-sync PN sequence. Each member of the stored copy has a value of -1 or +1. This operation is given by: where s is the stored copy in the 127 long frame-sync PN sequence. The maximum magnitude of either b _R or b, indicates the start of the FEC data frame.

[00135] Once the frame sync start position is located, the position of the code words containing the mode bits (constellation and trellis code rate) is known. The code words can be reliably decoded by, for example, a BCH decoder or by correlating the received code word with all the possible code words and choosing the code word yielding the highest resulting value. Since this information is sent repeatedly, additional reliability can be obtained by requiring that the same result occur multiple times before it is accepted. [00136] This derived frame-sync signal 2021 is used to indicate which symbols are to be removed in "remove frame-sync/mode symbols" module 2004 before symbols are fed to soft de-mapper 2006. In one example, 127 frame-sync symbols and 8 mode symbols are removed from the stream ensuring that only symbols corresponding to the RS packets are passed to soft de-mapper 2006. Soft de-mapper 2006 calculates soft bit metrics using algorithms that are known in the art including, for example, algorithms described by Akay and Tosato. For correct operation, soft de-mapper 2006 must know which puncture pattern (which trellis code rate) was used in the transmitter and also the alignment of that pattern with the received bits. This information 2021 is provided by frame-sync module 2020 which decodes the mode information and also provides a repeating frame sync signal to which the puncture pattern is aligned, regardless of the current mode. These soft bit metrics are fed to Viterbi decoder 2008 that operates in a manner known in the art to arrive at estimates of the bits that were input to the PTCM encoder in the transmitter.

[00137] De-randomizer 2013, byte de-interleaver 2014, and RS decoder 2016, which are all synchronized by the frame-sync signal 2021 , respectively de-randomize, de-interleave, and decode the byte data to obtain the data that originally entered the RS encoder in the transmitter.

Carrier Phase Offset Correction [00138] Certain embodiments of the invention employ carrier phase offset correction systems and methods. In certain embodiments, a receiver comprises a phase offset corrector that receives an equalized signal representative of a quadrature amplitude modulated signal and that derives a phase-corrected signal from the equalized signal, a two- level slicer that slices the equalized signal to obtain real and imaginary sequences, a frame synchronizer that performs a correlation of the real and imaginary sequences with corresponding parts of a stored frame-sync pseudo-random sequence and a phase correction signal provided by the frame synchronizer to the phase offset corrector. The phase correction signal is based on the maximum real and imaginary values of the correlation. The frame synchronizer performs continuous cross-correlation on incoming sliced quadrature amplitude modulated symbols. The continuous cross-correlation is performed separately for the real and imaginary sequences with a stored copy of a binary frame-sync pseudo-random noise sequence.

Baseband to Passband Modulation

[00139] Certain wireless digital communication systems, including broadcast, wireless

LAN, and wide area mobile systems, employ QAM in some form. QAM is also used in both the North American and European digital cable television standards using quadrature-carrier multiplexing that enables two double-side-band suppressed-carrier modulated waves to occupy the same channel bandwidth, with each wave modulated by an independent message. As discussed above, Fig. 23 depicts a simple QAM modulator that may serve as PB mod 1314 in the example of Fig. 13. An isolated transmitted QAM pulse is given by: s _m (0 = d _{R m} q{t) cos(27fj) - d _{! m} q(t) sin(Zτtfj) = Re{d _m q(f)e ^j2 * ' }, where d _{R m} and d _{l m} are determined by two independent message streams and represent the real and imaginary parts respectively of a complex QAM symbol (see, e.g., Fig. 17), with m= 1..,M indexing a 2-dimensional QAM constellation of cardinality where Λ/is the modulating carrier frequency, and q(t) is a root raised cosine pulse function. [00140] A continuous series of transmitted QAM pulses s(t) , at a rate of F _s =IZT ₉ , passes through a noisy multipath channel. Thus, the received signal at the input to the QAM receiver is given by r(t) = s(t) * c(t) + v(t) , where * denotes convolution, c(t) is the channel impulse response, and v(t) is additive white Gaussian noise. Thus,

, where d[n] is the complex transmitted symbol, / ₀ and θ _o are the frequency and phase offsets respectively of the receiver passband to baseband demodulator local oscillator with respect to the transmitter, such that f _L0 =f -f ₀ . Passband to Baseband Demodulator

[00141] Fig 35 shows one example of the PB to BB ₁ sym clock sync, equalizer/carrier recovery module 2000 of Fig. 20 in more detail. The received signal r(t) is sampled 350 at a rate higher than the symbol rate, resulting in the sampled signal r(nT _sαmp ). After sampling:

Then, after demodulation, resampling at the symbol rate 1IT _S and matched filtering obtains:

x(kT _s ) = x[k] = _e ^j2π >° ^kτ<+θ ° ∑ d[m)c[k -m] + v'[k] ,

where v'[k] is sampled complex filtered noise. This assumes, that due to the pulse shaping and matched filtering q , combined with perfect symbol rate sample timing, any ISI is due only to the channel impulse response c . After demodulation, assuming perfect equalization, the near baseband complex sequence z[k] at the equalizer output is given by: z[k] = d[k]e ^j2 *° ^kTs+θ ° +v'[k]

Thus, the recovered near baseband sequence represents the transmitted constellation, with a phase offset θ _o , rotating at a frequency f _o . In order to reliably recover the transmitted d _R and d, , using for example, a two-dimensional slicer, the equalizer, combined with a phase and frequency offset recovery loop, must remove the frequency offset f _o that causes the constellation to rotate, and the receiver must remove the remaining static phase offset of θ _o which would otherwise leave the constellation in a static rotated position. [00142] In order to understand the phase/frequency recovery the QAM constellation at baseband must be understood. In the simple example of Fig. 33A, 4 QAM modulation, which is also known as QPSK, the constellation consists of four symbols. In the depicted example, the real and imaginary parts of d[k] can each take on 2 different values (such as ± 3 ). The effect of phase offset, θ ₀ , on the recovered d[k], is shown in Fig. 33B which shows a rotation in the complex plane. The effect of f _o is understood by noting that that the rotation proceeds in time in a circle, either counterclockwise or clockwise depending on the sign of f _o .

Equalizer and Carrier Phase/Frequency Loop

[00143] In Fig. 34, a signal x[k] 340 is received by a digital equalizer and carrier phase/frequency loop 248 (see, e.g., Fig. 24A). Equalizer 341 component typically comprises a linear digital filter and, using a proprietary or well-known method such as the least mean square ("LMS") algorithm, the equalizer 341 compares its output y[k] with a phase rotated version of the slicer decision d[k] 343 to create an error signal which is used to calculate a updated set of filter tap weights. This filter removes the ISI caused by the channel impulse response c . [00144] The 2-D slicer 342 independently slices the real and imaginary parts of z[k] and outputs d[k], which is an estimate of the originally transmitted d[k\. Both z[k] and d[k] enter the phase error detector module 346 and form a phase error signal given by e _θ [k] = An integral-proportional ("IP") filter 345 can comprise the filter of Fig.

35 or any equivalent known to those skilled in the art. IP filter 345 permits the loop to correct both phase and frequency offsets. An output of IP filter 345 feeds a complex voltage controlled oscillator (VCO) 344 that outputs a complex phase/frequency correction factor e ^~Jθ[k] which corrects for both θ _o and f _o . VCO 344 also outputs e ^+jθ[k] to "un-correct" the slice output d[k] so that it can be used to derive an error signal for the equalizer tap update. Such approach is indicated because the equalizer operates on x[k] which contains both θ ₀ and f _o .

[00145] In certain embodiments, efficiencies can be gained by implementing VCO 344 in discrete form as a delay of one integrator feeding a complex exponential look-up-table ("LUT"). However, the final correction for θ _o can have an ambiguity of π/2 , which means that the recovered phase may be correct (offset = 0), or can have an offset of π/2 , an offset π , or an offset of 3;r/4 . These results are illustrated in Figs. 36 and 37: an actual transmitted symbol is shown in Fig. 36 and the possible recovered symbols with respective offsets are shown in Figs. 37A through 37D. Typically, the receiver cannot know which of the four possible symbols was actually transmitted because the 2-D slicer 342 executes a nearest neighbor operation. Fig. 38 demonstrates an instance in which a transmitted symbol a is received as a at the equalizer input with θ _o as depicted. Accordingly, the phase recovery loop can rotate the signal to compensate for θ _o so that a lines up with a .

However, the decision of the 2-D slicer 162 will be that the correct symbol is b because it is closer to a . This can cause the phase recovery loop to converge in a manner that rotates the constellation such that a lines up with b . In this case the final phase is offset - π/2 from where it should be.

[00146] Certain embodiments of the invention provide methods for minimizing and/or eliminating such problems in trellis coded systems, including the family of punctured trellis codes used in certain of the presently described embodiments. As stated above, the output of the equalizer is sliced in both the real and imaginary directions by a 2-D level slicer 342 forming the sequences α _Λ [£]e [- l,+l] and α _; [A:]e [- l,+l] , which are fed to a frame-sync module 2020 (see Fig. 20). The frame sync module 2020 performs a continuous cross- correlation operation on the incoming sliced QAM symbols, separately for both the real and imaginary parts, with a stored copy of the binary frame-sync PN sequence. Each member of the stored copy has a value of -1 or +1. This operation may be characterized thus:

126 126 b _R [k] = ∑s[n]aA"-k] and *,[*] = ∑*M«,[«-*] ^, π=0 n=0 where s is the stored copy of the 127-long frame-sync PN sequence. The maximum magnitude of either b _R or b, indicates the start of the FEC data frame.

[00147] For the frame sync symbols, the real and imaginary parts have the same sign and their constellation is shown in Fig. 39. Thus, it can be appreciated that, the signs of the maximum magnitude b _R or b, are both positive for zero rotation. A - π/2 rotation yields a negative maximum magnitude b _R and a positive maximum magnitude b, . For a rotation of π both b _R and b, are negative and, for a rotation of π/2 , the maximum magnitude b _R is positive and the maximum magnitude b, is negative. This is summarized in Table 5, above. Thus, the respective signs of the maximum magnitude^ and b, in combination indicate to which quadrant of the complex plane the final phase offset has converged. This allows for an additional phase correction to be applied to the signal as shown in Fig. 20. The signs of the maximum b _R and b, are sent from the correlation based frame-sync module to the phase offset corrector. The operation of one phase offset corrector module is shown in Fig. 40, for which an LUT operation 404 is shown in example. Given that z[k] = z _R [k] + Jz ₁ [k] , this operation can be executed simply as:

1. for the case of φ = +θ : z'[k] = -z _R [k]- Jz ₁ Ik]

2. for the case of φ = + π/2 : -z, [k] + jz _R [k)

3. for the case of φ = - π/2 : +z,[k}- jz _R [k] Fig. 40 is a block schematic representation of a phase offset corrector-that derives a phase- corrected signal by indexing a lookup table with the signs of the maximum real and imaginary values of a correlation according to certain aspects of the invention.

Multi-Mode QAM Constellation Detection

[00148] Certain embodiments provide systems and methods for determining an unknown

QAM constellation from a set of possible received QAM constellations. One method utilizes a histogram of the power of the signal after inter-symbol-interference ("ISI") has been minimized with a modified constant modulus algorithm ("CMA") equalizer, but before carrier frequency and phase has been fully recovered. The unknown constellation is then determined from the histogram. The equalization process is then restarted with the standard CMA to minimize the ISI ₁ based on the now known constellation. The equalizer output can be correctly scaled, after which stages of reduced constellation carrier recovery ("RCCR") and decision directed carrier recovery can be performed, resulting in recovery of the carrier frequency and phase by the combined equalizer carrier frequency/phase loop. In another method for determining an unknown QAM constellation, the equalizer initially operates using the modified CMA to minimize the ISI. Although the equalizer output may not be correctly scaled at this point in the process, the equalizer carrier frequency/phase loop may use RCCR to recover the carrier frequency and phase without knowing the constellation. The recovered phase may be noisy. The receiver may read information embedded in the signal frame that indicates which QAM constellation is being transmitted. The equalizer operation is then restarted with a standard CMA based on the known constellation, followed by RCCR and decision directed carrier recovery.

[00149] Certain embodiments of the invention employ punctured trellis coding and QAM constellation combinations similar to those used in ISDB-T and described above. As used herein, a constellation is understood to mean a mapping in a complex plane of the possible symbols in a modulation scheme. The number of symbols per frame is a variable integer depending on the mode and the number of RS packets per frame is a constant integer regardless of mode. This arrangement is described in more detail above and simplifies the design of a receiver.

[00150] Referring again to Fig. 20, frame sync module 2020 performs a continuous cross- correlation operation on the incoming sliced QAM symbols 1219, separately for both the real and imaginary parts, with a stored copy of the binary frame-sync PN sequence. Each member of the stored copy has a value of -1 or +1. This operation given by Equation 10 (above) is repeated here: 126 126

^M= ∑4 ^« k[ ^« -£] an ^d M*] = ∑4*h b-*]. (Eq- ¹ °) where s is the stored copy in the 127 long frame-sync PN sequence. The maximum magnitude of either b _R or b, indicates the start of the FEC data frame. [00151] As will be explained in more detail below, there is a π/2 ambiguity in the recovered carrier phase. This results in an arbitrary additional recovered phase offset of zero, ± π/2 , ox π . For the frame sync symbols, the real and imaginary parts are the same sign, so for them the transmitted constellation is as shown in Fig. 39. Thus, it will be appreciated that, for zero phase offset, the signs of the maximum magnitude b _R and b, are both positive. As summarized in the table 404 of Fig. 40, a -π/2 offset will yield a negative maximum magnitude 6 _Λ and a positive maximum magnitude b, ; for an offset of π, both b _R and b, will be negative, and for an offset of π/2 , the maximum magnitude b _R will be positive and the maximum magnitude b _r will be negative. Thus, the respective signs of the maximum magnitude b _R and b _t in combination can indicate the quadrant of the complex plane to which the final phase offset has converged. This permits an additional phase correction to be applied to the signal in phase offset corrector module 2002. The signs of the maximum b _R and b, may be sent from the correlation based frame-sync module 2020 to the phase offset corrector 2002.

[00152] With reference also to Fig. 40, the operation of certain aspects of phase offset corrector 2002 in the example of Fig. 20 can be better understood. LUT 400 generates an output based on the signs of the maximum magnitude b _R and b, (see element 404 of Fig. 40). Given that z[k] = z _R [k] + Jz ₁ [k] , operation 402 can be executed as follows:

1 ) For the case of φ = +π : z'[k] - -z _R [k] - jz, [k]

2) For the case of φ = -\ — : z'[k] = -Z ₁ [k] + jz _R [k]

3) For the case of φ = : z [k] = +z, [k] - jz _R [k]

[00153] Once the frame sync start position is located and the mπ 12 phase offset corrected, the position of the code words containing the mode bits (constellation and trellis code rate) is known. The code words can then be reliably decoded by, for example, a BCH decoder or by correlating the received code word with all the possible code words and choosing the code word yielding the highest resulting value. Since this information is sent repeatedly, additional reliability can be obtained by requiring that the same result occur multiple times before it is accepted.

[00154] Fig. 41 shows an example of such a process that can be performed by frame- sync module 2020. Responsive to frame-sync signal 2021 , at step 4100, received constellation code words are cross-correlated with all valid code words. Cross-correlation yields a value that can be used to select a most likely match. In one example, the valid code word that produces the largest correlation value is selected at step 4102. This chosen code word can then be used to identify a current constellation. At step 4104, the identity of the current constellation is compared with the recorded or otherwise stored identity of a previously identified constellation. If, at step 4104, the current constellation and previously identified constellation are the same constellation, then a confidence counter can be incremented. If the previously identified constellation is determined at step 4104 to be different not the current constellation, then the current constellation is recorded as the previously identified constellation at step 4107 and the confidence counter is decremented at step 4107 and another sync frame is awaited at step 4109. Following the step 4106 increment of confidence counter the confidence counter is examined at step 4108 and, if determined to have exceeded a predetermined or configured threshold value at step 4108, then the determination of signal constellation may be made at step 4110. Iterations of this process may be performed until the confidence counter exceeds the predetermined or configured threshold value.

Equalizer and Carrier Phase/Frequency Loop

[00155] With reference to Fig. 42, certain aspects of the equalizer and carrier phase/frequency loop 248 of Fig. 24A will be described. A signal x[k] enters the digital equalizer and carrier phase/frequency loop 248, which can include an equalizer 420 that includes a linear digital filter. An error calculator module 422 calculates an error signal e[k], which can be used to calculate an updated set of filter tap weights using any suitable method known to those with skill in the art. In one example, an LMS algorithm may be used. The filter removes the ISI caused by the channel impulse response, c . An output of equalizer 420 y[k] is then phase rotated at 421 in order to reduce any remaining carrier phase and frequency offset. The phase rotated output z[k] is then processed by slicer and phase error detector module 427 which calculates a phase error value e _θ [k] that feeds an integral- proportional (IP) filter 426. IP filter 426 output feeds an integrator and complex exponential look up table ("LUT") 424 which calculates complex exponential values used in the loop to correct the carrier phase and frequency offset. Slicer and phase error detector module 427 also outputs a nearest neighbor 2-dimensional sliced symbol decision whose phase is "un- corrected" by multiplication with e ^+jθ ^ at 425 and then used in error calculator module 422. Error calculator module 422 utilizes that input as well as x[k] to calculate an error signal e[k]. As depicted, the internal operations of the error calculator module 422 and slicer and phase error detector module 427 depend on a current stage of operation (1 , 2 or 3) that is determined by stage controller 423. i

[00156] In certain embodiments, a least mean squares ("LMS") algorithm is used for calculating equalizer filter tap weights and operates as follows: I let x[k] represent an L long equalizer input vector, y[k] represents the equalizer output vector, where y[k] = g ^H [k ]x[k], where g ^H [k] is the L long linear equalizer tap weight vector and the H superscript indicates conjugate transposition (Hermitian). Then, calculate updated e[k] in the error calculator module 422 using, for example, the methods described below: g[k + l] = g[k]-2μx[ky[k], (Eq. 11) where μ is a small step size parameter and the ^* superscript indicates complex conjugation.

[00157] In the example, the stage controller 423 takes the equalizer and carrier phase/frequency loop 428 through three stages of operation, whereby switching from stage 1 to stage 2 to stage 3 is executed based on simple count thresholds of input data samples x[k]. Note that more complicated stage switching based on estimates of error at the equalizer output are also possible. The three stages are summarized in Table 6.

Table 6: Equalizer and Carrier Phase/Frequency Loop Stages

[00158] A slicer and phase error detector module 427 is shown in more detail in Fig. 43. Switch 430 is set according to one of three stages 434 of operation. During stage 1 , switch 430 is in the topmost position so that e _θ [k] = 0. This effectively turns off the carrier loop so that there is no carrier phase correction during this stage. During stage 2, switch 430 is in the middle position and the loop operates using a reduced constellation carrier recovery

(RCCR) algorithm. If the power of the symbol z[k] given by exceeds a threshold ξ , then it is presumed that z[k] is one of the corner symbols of the constellation and RCCR is enabled by setting depicted second switch 432 to upper position, yielding e _β M = [&])]}. Otherwise, if ≤ ξ , second switch 432 is in the lower depicted position disabling the carrier loop. Thus only a subset of the symbols can contribute to carrier recovery during stage 2. The threshold ξ can be reduced to include more symbols in the regions near the constellation corners, but the resultant phase correction term e _θ [k] will be noisier. During stage 3, switch 430 is in the lowest depicted position, yielding <? _# [&] = Im{z[&]j ^* [£]}, where d ^* [k] is the complex conjugate of the nearest neighbor 2-dimensional sliced symbol decision d[k] . During stage 3, it is presumed that enough time has passed so that the equalizer taps have converged and the carrier phase has been substantially corrected such that the sliced symbol decisions are reliable. Notably, the relations e _θ [k] = <? _# [£] = Im{z[£]d ^* [Λ;][ effectively operate within a single quadrant of the complex plane. This results in an mπ/ 2 ambiguity in recovered carrier phase as discussed above.

[00159] An example of an IP filter 426 (see Fig. 42) is shown in more detail in Fig. 35. IP filter 426 allows the loop to correct both phase and frequency offsets. The output of the IP filter 426 feeds the integrator and complex exponential LUT module 424, shown in more detail in Fig. 45. The input of integrator/LUT 424 is modulo 2π added 440 (Fig. 44) to a one step delayed 442 version of the input to form a phase error signal θ[k] which is fed to a lookup table (LUT) 444 that outputs phase correction factor 445 (e ^~Jθ ^) that corrects for both θ _o and f _o . LUT 444 also provides an output 446 (e ^+jθ ^ ) that "un-corrects" the slicer output d[k] so that it can be used to derive an error signal for the equalizer tap update. This is needed because the equalizer operates on x[k] which contains both θ _o and f _o .

Error Calculator Module and Stage Operation Summary

[00160] Error calculator 422 can employ different methods for calculating e[k] depending on the stage. For stages 1 and 2, e[k] is typically calculated using a process based on a constant modulus algorithm (CMA):

where R is a pre-determined constant given by:

and where E is the expectation operator and d[k] is a symbol (see Fig. 17). Note that this e[k], which drives the tap update of Eq. 11 above, is independent of symbol decisions and the phase of x[k] and depends only on the equalizer output, the equalizer input, and the statistics of the constellation. It can be shown that during stages 1 and 2, the use of the CMA error to drive Eq. 11 is equivalent to minimizing the ISI, even though the constellation is spinning due to the carrier frequency and phase offsets.

[00161] Thus, during stage 1 , the phase/frequency recovery loop is disabled, and the equalizer minimizes the ISI using the CMA error function. After the ISI has been minimized, stage 2 begins and the loop is turned on for RCCR; carrier phase/frequency recovery begins using only the corner symbols of the constellation, as previously explained in relation to Fig. 43. At the end of stage 2, carrier phase and frequency have been recovered sufficiently so that the 2-dimensional slicer 436 of Fig. 43 begins to output reliable symbol decisions d[k] . [00162] Decision directed (DD) error may be used in stage 3. The DD error may be calculated as e[k] = e ^jθlk] d[k]- y[k] . For the purpose of this description it is assumed here that the receiver has determined which of the three constellations of Fig. 17 is being transmitted, because R is different for each of these constellations. Additionally, RCCR requires knowledge of the constellation and, in particular, knowledge of the power of the corner symbols of the constellation.

CMA With an Unknown Constellation

[00163] In the example described herein, one of three different QAM constellations may be transmitted and the equalization and phase/frequency recovery described above requires knowledge of the transmitted constellation. While the constellation selection is encoded in the mode symbols, equalization and phase/frequency recovery precede the frame sync (see Fig. 20), where this information can be directly decoded as described above (e.g., with reference to Figs. 18, 20 and 41 ). Consequently, in certain embodiments, the constellation is determined within the equalizer and carrier recovery algorithm itself. [00164] Note that R (as provided in Eq. 12), is constellation dependent. In certain embodiments and with continued reference to Fig. 17, the real and imaginary parts of the symbols for 64-QAM are chosen from the set ± {1,3,5,7} , the real and imaginary parts of the symbols for 16-QAM are chosen from the set ± {2,6} and the real and imaginary parts of the symbols for QPSK are chosen from the set ± 4. In accordance with Eq. 12, the values for R would be:

For any of the three constellations of Fig. 17, it can be shown that the use of a scaled value αR for the CMA error calculation causes the equalizer filter taps to converge to the same set of values scaled by -iα , with the equalizer output likewise scaled. It can be shown that the ISI is nevertheless minimized. In one example where the constellation is unknown, R can be set to 58 and, regardless of the transmitted constellation, the ISI will be minimized during stage 1. For the example described, any value of R in the range 32 - 58 can be used. However, the selection of the largest value (viz. 58) prevents compression of the most dense constellation (here, 64-QAM) at the equalizer output and reduces the burden on equalizer performance.

[00165] The use of scaled CMA parameter R results in a scaling upwards of the equalized output by the converged filter taps such that the statistics of the equalizer output will be: assuming perfect ISI removal and regardless of the constellation. Thus, for QPSK, the equalizer output will be scaled as follows after the ISI has been minimized during stage 1 :

y[k] = e ^j2 ^ ^+θ ° J—(± 4 ± j4) = _e ^j2 *° ^kT ^ (± 5.385 ± ;5.385) .

Fig. 45A illustrates the real part of the equalized output for a system with QPSK for the case where θ ₀ = / ₀ = 0. It can be seen that the output is scaled by due to the value of

R = 58 , as the equalizer is converging to a solution that removes the ISI. Fig. 45B illustrates the real part of the equalized output for a system with 16-QAM for the case where

# ₀ = f _Q = 0. Because ^58/52.8 is relatively close to 1 , the real part of the equalizer output appears to be only slightly scaled. Thus the actual scaling is evident during the equalizer convergence.

Constellation Detection Methods

[00166] In certain embodiments, a histogram method can be used to determine the constellation before entering stage 2. The constellation can be determined even though the carrier phase and frequency has not yet been recovered. Consider the histogram of the power of the equalizer output, η\k\ = y[k]y ^* [k] , shown in Figs. 46A, 46B and 46C for the QPSK, 16-QAM, and 64-QAM constellations respectively. The histograms represent the power after the equalizer has converged with R = 58 . Since the power of the equalizer output is independent of the phase and the histograms for each constellation are substantially different, the transmitted constellation can be determined in the receiver from the equalizer output power histogram.

[00167] Without additive or tap noise, the power of each equalizer output sample is η[k] = 58 for the QPSK constellation. For the 16-QAM constellation, the probability mass function for the power of the equalizer output is: r r i ,i fl/4 for ξ = 8 ^■ 58/52.8 , 72 ^• 58/52.8 *{*W}= | _{|/2 yor # = 40} . _58/52 . ₈ (Eq. 14)

Similarly, for the 64-QAM constellation, the probability mass function for the equalized output power is:

1/16 for ξ =2, 18,98

Vr{η[k] = ξ}= 1/8 for £ =10, 26, 34,58, 74 (Eq. 15)

3/16 for ξ =50

[00168] Due to tap update noise and the additive noise v on the input signal, there is some spread in the histograms around these values even for a substantial SNR of 3OdB, for example. Modeling the noise on the equalizer output as additive and independent of the symbols, and assuming the output is free of ISI, then

\y[k]\ ² +H*]f + 2Retø*M4 (Eq. 16) The variance, conditioned on a given symbol, associated with the 2Re{ύ?[A:]« ^* [A:]j term increases with increasing symbol power. In the histogram figures, this phenomenon presents as the spread, i.e. the variance, around a given constellation power increasing with increasing symbol power. In the 16-QAM case, the spread about the constellation power of symbols ± 2.1± y ^" 2.1 is less than the spread about the constellation power of symbols

± 6.3± ;6.3.

[00169] Certain other relationships can be observed from the histograms of the equalizer output power:

• Region T ₁ , in the QPSK histogram falls roughly between the second and third regions, R ₂ and R ₃ , respectively, in the 16-QAM histogram. Therefore, the regions to declare which symbol power was transmitted are non-overlapping for the QPSK and 16-QAM constellations.

• A comparison of the QPSK histogram to the 64-QAM histogram reveals that Pr{/7[A:]e 7;}< Prføtørjg 7;} for 64-QAM. Thus, for a comparison of η[k] to the region T ₁ , it is more likely for η[k] to be outside that region.

• In the absence of noise in the 64-QAM example, η[k] takes a value from the set {2,

18, 26, 34, 58, 98} with probability 9/16. Thus, ignoring noise, when the underlying constellation is 64-QAM:

Pr{(η[k]e RMη[k]e R ₂ )U (η[k]≡ R ₃ )}< l/2 , _{(Eq 17)} where U indicates an OR. Therefore, if the transmitted constellation is 64-QAM and η[k) is compared to the regions F?i, R ₂ , and R ₃ , it is more likely for η[k] to be outside of those regions.

[00170] Certain embodiments employ an algorithm based on these observations: fc = 0,λ.[-J] « 0,A _Jβ (-Il =r 0 while k < N do #l ~ !/{% ^• [*]; If η{k] e T ₁ then

X ₄ Ik] = X ₄ Ik - 11 + I; else

X ₄ Ik] = ImX(A ₄ (A; - 1] - 1,0}; end if If ((η[k] G Ri) U (jj(A) € Λ ₂ ) U (#1 € #3}) then λ,#] = Aut{* - II + 1; else λ, _β {*l = max{Aiβ(* - l] - l,0}; end if Jb = Ar H- Ii end while

The algorithm may be initiated after the equalizer has converged and, in a first portion, increments the QPSK counter, λ _Λ [k], if the equalizer output power is in region, T ₁ , over N equalizer output samples. If the equalizer output power is not in the region T ₁ , the counter is decremented. Similarly, the 16-QAM counter, is incremented if η[k] is within the regions f?i, R ₂ , and R ₃ , and decremented otherwise.

[00171] After N equalizer output samples, it can be assumed that the histograms have been correctly characterized. If the underlying constellation is 64-QAM, the QPSK and 16- QAM counters will be quite small since more likely than not, the power estimate, τj[k] , will fall outside of the QPSK and 16-QAM regions. If the transmitted constellation is either QPSK or 16-QAM, the counter of the transmitted constellation will be considerably larger. Thus, If (A ₄ [Nj < M) n (Xm[N] < M) then 64-QAM Constellation Transmitted. else

If X ₄ [N] > A ₁₆ [N)

QPSK Constellation Transmitted, else

16-QAM Constellation 'Bransmitted. end if end if

The threshold, M, can be experimentally determined, but should be relatively small in relation to N. The algorithm is extremely robust, reliably selecting the correct constellation for low signal-to-noise ratios ("SNR") when QPSK, 16-QAM, or 64-QAM are transmitted. After the constellation has been reliably determined, R can be set to the correct Eq. 13 value and stage 1 can be run to completion. The equalizer output will be properly scaled and stage 2 can commence with the knowledge of the threshold ξ required for RCCR. [00172] Another method of determining the constellation prior to the equalizer entering stage 3 is now described. In this method, stage 1 executes and is allowed to complete with R = 58. Thus, and as explained, all three constellations will have been scaled at the equalizer output resulting in y[k] as shown in the three constellations of Fig. 47, though these constellations will likely be spinning. As discussed in relation to Fig. 43, a key to stage two RCCR is the consideration of only symbols where the power of the symbol z[k] as given by z[k]\ exceeds a threshold ξ . It may then be presumed that z[k) is one of the comer

symbols of the constellation. Equivalently, z[&]| > y[ξ can indicate a corner symbol. It is relatively easy to select a value for ξ when the constellation is known, as is illustrated in Fig.

48 (A) for the 64-QAM constellation. Fig. 48 shows all three constellations at the equalizer output and carrier phase/frequency recovery loop module input. It can be seen that z[k]\ = 9.90 for the corner points. For example, a threshold of y[ξ = 9.30 , indicated by the dotted line circle 484, ensures that only the corner points are selected. Similarly, a yjζ = 7.48 circle 482 and a ^[ξ = 7.0 circle 480 can be used with comfortable margins for

16-QAM and QPSK, respectively.

[00173] Fig. 49 shows an overlay plotting of the upper right hand quadrant of all three constellations. It can be seen that if yfξ = 7.34 , only the corner points for QPSK and 16- QAM, which fall outside the dotted circle, will be utilized by RCCR. However, if 64-QAM is received, five constellation points (four non-corner) fall outside the circle and will be utilized by RCCR. RCCR typically works best if only corner constellation points are used since the recovered phase is less noisy. However, RCCR will successfully recover phase even if some additional points are used, although an increase in phase noise will result. Therefore, stage 2 can operate initially with ^[ξ - 134 , allowing for adequate initial carrier recovery for all three constellations while the constellation remains unknown to the receiver. [00174] As described above in relation to Fig. 20, equalizer 2000 feeds a 2-level slicer 2018 which in turn feeds frame sync 2020. Frame sync 2020 can perform a continuous cross-correlation operation on the sign of the incoming sliced QAM symbols, with a stored copy of the binary frame-sync PN sequence, as described by Eq. 10. The continuous cross- correlation operation can be performed separately for both the real and imaginary parts. Each member of the stored copy has a value of -1 or +1. The maximum magnitude of either b _R and b, indicates the start of the FEC data frame. The only difference now is that for the 64-QAM constellation, 2-level slicer 2018 operates on a signal that has some additional phase noise. However, this additional phase noise has very little detrimental affect on the 2- level slicing and subsequent cross-correlation based frame sync, which is very robust even in the presence of the phase noise. Decoding of the constellation codeword, as previously described, is also very robust to the phase noise.

[00175] Fig. 50 illustrates the operation of this alternative approach to determining the constellation, which can be summarized as follows:

(1 ) The equalizer and phase/frequency loop completes stage 1 with R = 58, then enters stage 2.

(2) Instead of waiting for stage 3, the correlation based frame-sync 2020 accepts input data during stage 2, finds frame sync, and decodes the constellation codeword.

(3) The determined constellation information 2021 is sent back to the equalizer 2000 and phase/frequency loop, which goes back to stage 1 using an R value that properly corresponds to the determined constellation.

(4) Stages 1 , 2 and 3 are then completed as before.

It will be appreciated that the primary difference between the systems depicted in Fig. 50 and Fig. 20 is the additional connection 5000 from the frame-sync 2020 to the equalizer/carrier recovery 2000 which carries the constellation information. SPOT Monitoring in Coax Security Links

[00176] Certain embodiments of the invention improve the performance of systems and apparatus, including those described above and in which baseband video signals can be combined with digital representations of the baseband video signal and with control signals, thereby enabling transmission over a single cable such as a coaxial cable ("coax"). Referring again to Fig. 4, one embodiment of the invention provides a security link over coax ("SLOC") system. Fig. 5 shows one possible modulation scheme for the SLOC system. In the example, HD camera 30 provides an IP output 41 comprising compressed digital HD video images 332, and an auxiliary camera signal comprising analog SD CVBS 330. The compressed HD video IP signal 332 is modulated to passband 52 utilizing a SLOC camera side modem 49 that comprises a QAM modulator (see modulator 212 in modem 32 of Fig. 21 ). Modulator 212 provides a modulated signal that can be combined with the baseband analog CVBS signal 330. The combined signal is transmitted "downstream" over coax cable 41 , typically for distances that can extend to 300m or longer. At the monitor side, a SLOC monitor side modem 45 separates the baseband CVBS signal 330 from the passband downstream IP signal 332. The separated CVBS signal 330 feeds an SD display 43 for live, delay-free viewing. The passband downstream IP signal 332 is demodulated with a QAM demodulator (see demodulator 222 in Fig. 22) that outputs a signal to host network switch 44 or a processor/DVR (not shown in Fig. 4).

[00177] In the example, upstream communication is provided in accordance with IP protocol requirements. Upstream communication 334 may additionally be used to send audio and camera control signals 42 from the monitor side to the camera 40. Typically the bit rate and corresponding required bandwidth for the upstream signal will be much lower than required for the downstream passband signal. Monitor side SLOC modem 45 includes a QAM modulator (see modulator 224 in Fig. 22) that modulates the IP signal to upstream passband 44. As depicted in Fig. 5, upstream passband 54 and downstream passband 52 are located at different spectral locations. At the camera side, SLOC modem 49 includes a QAM demodulator (see demodulator 214 in modem of Fig. 21 ) for receiving the upstream signal. This approach offers several advantages over prior systems and methods, including increased operational range, ease of deployment using existing coax infrastructure and obtainment of low-delay, real-time video. The simplified schematics of Figs. 21 and 22 show additional detail of the SLOC camera-side modem 49 of Fig. 4 and SLOC monitor side modem 45 of Fig. 4 and are described in detail above.

[00178] Fig. 51 A shows a SLOC system based on the system illustrated in Fig. 4, in which a filtered tap 519 is provided between coax cable segments 512 and 514 such that the tap 513 and cable segments 512 and 514 operate to connect camera-side equipment with monitor-side components. Filtered tap 513 is typically used to extract at least a portion of baseband CVBS signal 5100 to camera-side SD display 5130. Display 5130 may be provided in proximity to camera 510 for testing, setup and/or local monitoring. Filtered tap 513 typically comprises a low pass filter that blocks unwanted signals such as modulated digital, IP and/or control signals that can interfere with display functions 5130. Tap 513 may also include filters or switches that block transmission of signals between modems 511 and 515. For example, a test modem may be 5131 may be connected through tap 513 to enable troubleshooting or initial setup of camera-side modem 511 and display side modem 515 may be disconnected to avoid interference and/or degradation of signals. As shown in Fig. 5, the SLOC camera-side modem 511 typically outputs a low passband QAM signal based on a camera-generated portion of signal 5102 in addition to the baseband CVBS signal 5100 and the SLOC monitor-side modem 515 outputs a high passband QAM signal based on control signal in signal 5170. One or more filters may be provided by tap 513 to avoid undesirable interference that can be visible on SD display 5130 and/or 516 and to block IP and control signals. It will be appreciated that some displays and monitors lack the filtering necessary to block higher frequency signals (relative to the baseband CVBS signal 5100) in the passband signals.

[00179] Fig. 51 B shows a SLOC system based on the system illustrated in Fig. 3 in which the cable 514 between the camera-side and the monitor-side has been temporarily disconnected at the camera-side, and an SD display device or monitor 5130 has been directly connected to the SLOC camera side modem 511 over cable segment 519. A test modem 5131 may optionally be connected for test/setup purposes. SD display device 5130 displays the baseband CVBS signal and provides an ability to monitor video from the camera 510 near the physical location of camera 510 and the reconfiguration of connections may be desired to facilitate setup and troubleshooting. In Fig. 51 B ₁ the low passband QAM signal 5102 can cause undesirable visible interference on SD displays 5130 that lack high frequency filtering.

[00180] In the examples shown in Figs 51 A and 51 B, partial or complete disconnection of signals between modems 511 and 515 may occur. Partial disconnection of signals may leave QAM signal transmission paths intact. However, some reconfigurations of connections result in disconnection of QAM signaling between camera-side modem 511 and monitor-side SLOC modem 515. Certain embodiments of the invention provide mechanisms by which the camera side modem 511 ceases passband QAM transmission, outputting only the CVBS signal, when the connection between the modems 511 and 515 is broken. It will be appreciated that temporary substitution of test modem 5131 for display-side modem typically includes a sequence of that includes disconnection between modems 511 and 515, establishment of connection between modems 511 and 5131, disconnection between modems 511 and 5131 and reestablishment of connection between modems 511 and 515. Disconnection of QAM signals may be detected using various functional components of modem 511. Accordingly, the operation of the SLOC system is described in detail, below.

QAM Modulator Architecture For A SLOC System

[00181] As described above, Fig. 19 illustrates a frame structure 1336 provided to passband modulation ("PB Mod") module 1314 (see Fig. 13). The trellis coding of Fig. 16 adds bits; the number of data bits per mapped QAM symbol prior to trellis coding (as shown in Table 2). The number of QAM symbols to which the 315 RS packets (521640 bits) of Fig. 14 are mapped varies with mode selection. With RS packet size of 207, and 315 packets per frame an integral numbers of symbols per frame is obtained, as shown in Table 3. The PB Mod module 1314 then modulates the baseband QAM symbols to passband using any suitable method known to those with skill in the art. (See, e.g., description above related to Fig. 24).

[00182] As described above, with relation to Fig. 20, the QAM demodulators of Figs. 21 and 22 will be further described. Module 2000 receives and converts transmitted data in a passband signal to baseband QAM symbols. The operations performed by module 2000 typically include symbol clock synchronization, equalization (to remove inter-symbol interference) and carrier recovery, typically using sub-modules. Accordingly, module 2000 may comprise an equalizer that outputs recovered baseband QAM symbols 2001. Baseband QAM signals 2001 are provided to two-level slicer 2018 for slicing in both the real and imaginary directions, thereby forming the sequences α _Λ [£]e [- l,+l] and α^Arje [— l,+l]

2019 which are provided to frame-sync module 2020.

[00183] Frame sync module 2020 performs a continuous cross-correlation operation on the incoming sliced QAM symbols 2019, separately for both the real and imaginary parts, with a stored copy of the binary frame-sync PN sequence. Each member of the stored copy has a value of -1 or +1. This operation is given by Equation 1 , reproduced here:

b _R [k] = Eq. 10 where s is the stored copy in the 127 long frame-sync PN sequence. The maximum magnitude of either b _R or b, indicates the start of the FEC data frame. A frame sync pulse or other synchronizing signal is communicated to one or more of the receiver modules when this FEC data frame start point is detected in the stream.

[00184] Figs. 52A and 52B show elements of a process that can reliably produce a frame sync pulse when a noisy signal is received. Fig. 52A shows a portion of the process that determines frame length. Frame length can vary depending on selected transmission mode (Table 3). A process commencing at step 5200 is repeatedly executed as symbols are received, and a symbol counter keeps track of a number of symbols between executions that result in a value above a predetermined threshold. At step 5201 , cross-correlation is performed for each arriving symbol and the symbol counter is incremented until the predetermined threshold is determined at step 5202 to have been exceeded. The symbol counter is incremented 5203 for each symbol until the threshold is exceeded. When the threshold is exceeded at step 5202, then the symbol counter is cleared 5204 and steps of cross-correlating 5205, incrementing symbol counter 5207 and receiving a new symbol 5208 are repeated until it is determined that the threshold has been exceeded at step 5206. An intermediate symbol count is recorded at step 5208 and the symbol counter is reset at step 5209. The steps of cross-correlating 5210, incrementing symbol counter 5212 and receiving a new symbol 5213 are repeated until it is determined that the threshold has been exceeded at step 5211. If at step 5214 the symbol counter is the same as the intermediate symbol count recorded at step 5208, then the frame length is returned at 5215 as the value of the symbol counter. It will be appreciated that, in the example described, frame length can be determined after two consecutive consistent counts. However, the number of required consecutive identical counts may be selected as desired. [00185] Fig 52B illustrates one process by which frame sync module 2020 produces correctly timed frame sync pulses even when the received signal is very noisy. The process also provides for acquisition of a new frame sync position when a temporary interruption of the signal occurs or after transmitter transmission mode changes cause corresponding changes in frame_size. A free running symbol counter counts the received symbols using modulo frame_size arithmetic, where frame_size has been determined by the steps described in connection with Fig. 52A. It is anticipated that, when the result of the Eq. 10 cross-correlation exceeds the selected threshold value, the symbol counter value will always have the same value. When the value is consistent, a confidence counter is incremented up to a selected maximum - e.g. a maximum of 16; otherwise the confidence counter it is decremented toward a minimum of zero.

[00186] Thus, upon receipt of a symbol at 5250, cross correlation is performed at 5251 and, if the result at 5252 exceeds the threshold value, the current maximum is set to the threshold value and a maximum point is set to the current value of the symbol counter at 5253. In the example depicted, if the confidence counter is set to at least a value of 4 (5254) and the current symbol count indicates the frame synchronization point (5255), then a frame sync signal is output at 5256. Next, the symbol counter is incremented at 5257, here using modulo 4 addition. The next symbol is awaited at step 5277 unless, at step 5270, the symbol counter is determined to be zero. If the symbol counter is zero, then the current maximum value is reset at 5271. Then, if the current maximum point is equal to the frame synchronization point at 5272, the confidence counter is incremented at 5273 and the next symbol is awaited at step 5277; otherwise, the confidence counter is decremented at 5274. In the presently illustrated example, if the confidence is determined to have fallen below 2 at step 5275, then the frame synchronization point is set to the current maximum point at step 5276. In either case, the next symbol is awaited at step 5277. [00187] In summary, according to the described process, frame synchronization is determined to have been reliably acquired when the confidence counter exceeds a predetermined value - for this example, a value of 4. The frame sync module can then be cleared to provide a frame sync pulse at the correct time. The frame sync pulse will be output at the correct time - typically corresponding to a start of frame - if the confidence counter exceeds 4, even if noise occasionally causes Eq. 10 to produce a low value. [00188] If the transmission mode changes, the confidence counter will ultimately count back to zero. This can be used to trigger a recalculation of frame length (e.g. using the process of Fig. 52A) of determining the new frame length. As will be described below in relation to carrier recovery, there can be a π/2 ambiguity in the recovered carrier phase which may result in an arbitrary additional recovered phase offset of zero, ± π/2 or π . For frame sync symbols, the real and imaginary parts are the same sign and the transmitted constellation is shown in Fig. 39.

[00189] Thus, it will be appreciated that, for zero phase offset, the signs of the maximum magnitude b _R and b, are both positive. As summarized in Table 5, a - π/2 offset will yield a negative maximum magnitude b _R and a positive maximum magnitude b _j ; for an offset of π, both b _R and b, will be negative, and for an offset of π/2 , the maximum magnitude b _R will be positive and the maximum magnitude b, will be negative. Thus, the respective signs of the maximum magnitude b _R and b, in combination can indicate the quadrant of the complex plane to which the final phase offset has converged. This permits an additional phase correction to be applied to the signal in phase offset corrector module 2002 (Fig. 20). The signs of the maximum b _R and b, may be sent from the correlation based frame-sync module 2020 to the phase offset corrector 2002.

[00190] With reference also to Fig. 40, the operation of certain aspects of phase offset corrector 2002 in the example of Fig. 20 can be better understood. LUT 400 generates an output based on the signs of the maximum magnitude b _R and b _f (see Table 5). Given that ^∑ [k] = Z _R [k] + Jz ₁ [k] , operation 142 can be executed as follows:

1 ) For the case of φ = +π : z'[k] = -z _R [k] - Jz ₁ [k]

2) For the case of φ = + — : z'[k] = -Z ₁ [k] + jz _R [k]

3) For the case of φ = - — : z'[k] = +z, [k] - jz _R [k] [00191] Once the frame sync start position is located and the mπ/ 2 phase offset corrected, the position of the code words containing the mode bits (constellation and trellis code rate) is known. The code words can then be reliably decoded by, for example, a BCH decoder or by correlating the received code word with all the possible code words and choosing the code word yielding the highest resulting value. Since this information is sent repeatedly, additional reliability can be obtained by requiring that the same result occur multiple times before it is accepted. Fig. 41 shows an example of such a process that can be performed by frame-sync module 2020.

[00192] Continuing with the system of Fig. 20, frame-sync signal 2021 output from the frame-sync module 2020 can be used to indicate which symbols are to be removed in module 2004 before symbols are fed to the soft de-mapper. In one example, 127 frame- sync symbols and 8 mode symbols are removed from the stream ensuring that only symbols corresponding to the RS packets are passed to soft de-mapper 2006. Soft de-mapper 2006 calculates soft bit metrics using algorithms that are known in the art including, for example, algorithms described by Akay and Tosato. For correct operation, soft de-mapper 2006 must know which puncture pattern (which trellis code rate) was used in the transmitter and also the alignment of that pattern with the received bits. This information 2021 is provided by frame-sync module 2020 which decodes the mode information and also provides a repeating frame sync signal to which the puncture pattern is aligned, regardless of the current mode. These soft bit metrics are fed to Viterbi decoder 2008 that operates in a manner known in the art to arrive at estimates of the bits that were input to the PTCM encoder in the transmitter. De-randomizer 2010, byte de-interleaver 2014, and RS decoder 2016, which are all synchronized by the frame-sync signal 2021 , respectively de-randomize, de- interleave, and decode the byte data to obtain the data that originally entered the RS encoder in the transmitter.

Stage Switching

[00193] Certain embodiments employ stage switching that is based on estimates of mean square error at the output of the equalizer. An accurate estimate of the mean square error ("MSE') of the equalizer output can be obtained from a series of errors e[k] calculated by the error calculator module 422 of Fig. 42. For example, an estimate may be obtained by using:

MSE[k] = (1 - β)e ² [k] + βMSE[k - 1] , (Eq- ¹⁸ ) where β < 1 is a forgetting factor. Other methods for averaging e[k] are known and can be used. Eq. 18 produces a result that can be compared to a predetermined threshold and used by the stage controller module 423 of Fig. 42 to switch operation from stage 1 to stage 2 when MS ¹ E[A:] drops below that threshold. It can be compared to a second predetermined threshold to switch operation from stage 2 to stage 3 when MSZi[A:] drops below that second threshold.

Detecting Disconnect and Re-connect

[00194] Certain embodiments provide systems and methods for detecting disconnect and re-connect events on the camera side of a communications link. Referring again to Figs 51 A and 51 B, partial or complete disconnection of signals between modems 511 and 515 may occur in normal operation. Certain disconnections affect QAM signaling between camera- side modem 511 and monitor-side SLOC modem 515. In particular, signals that carry images captured by HD camera 510 are encoded and/or modulated by modem 511 for transmission over cable 514 to display side modem 515. A plurality of methods of detecting disconnection and re-connection events related to the coax 514 can be performed by the camera-side SLOC modem 511. Responsive to a disconnection or re-connection event, the modem 511 may halt, commence or recommence downstream passband QAM transmission. In some embodiments a "coax connected" signal transmitted from a QAM demodulator to a QAM modulator may be used to control transmission for connection-related events. [00195] Referring to Fig. 53, for example, a camera side QAM modulator 530 may be configured to transmit a downstream passband signal 533 only when a coax connected signal 531 is asserted by a camera side QAM demodulator 532. Camera side QAM demodulator 532 can determine the presence of input signal 534 that is transmitted by the monitor side QAM modulator (not shown) using a variety of methods. Typically, the coax connected signal 531 is asserted by the camera side QAM demodulator 532 when reception of input signal 534 is reliably confirmed, when constellation identification is confirmed and/or upon verification of a frame sync has been obtained.

[00196] One method of detecting presence of input signal 534 includes a method based on an automatic gain control ("AGC") loop. Commonly found in communications receivers, including QAM demodulators, AGC is used to control signal levels at various stages and points in the receiver. One example is depicted in Fig. 27 which shows an AGC loop 540 added to the receiver front end of Fig. 24. In the AGC loop 540, the magnitude of a complex signal is determined at 541 and subtracted at 542 from a predetermined reference level 543. The result is filtered by low pass filter (LPF) 544 to suppress noise and short term variations. The LPF 544 provides an output that feeds an accumulator comprising an adder 545 and a delay element 546. The accumulator output is used as gain control signal 547 that is fed back to gain block 548 at the system input 549. In one example, gain control signal 547 is used as a gain factor or multiplier that determines the gain provided by gain block 548 such that the gain provided by gain block 548 increases within predetermined limits as gain control 547 increases. When input 549 is disconnected (e.g. the coax is disconnected), output of magnitude block 541 tends to be very low. Typically, the coax connected signal 531 may be asserted only if the magnitude block output is above a predetermined threshold. Additionally, gain control signal 547 is typically very high when input 549 is disconnected. Thus, the coax connected signal 531 may be asserted only if the gain control signal is below a predetermined threshold. An AGC loop 540 can be used to monitor connection status of input 549 even if the loop is found elsewhere in the QAM demodulator 532.

[00197] Another method of detecting presence of input signal 534 is based on equalizer and carrier phase/frequency loop stages shown in Fig. 43 (see also Eq. 18). In particular, the coax connected signal 531 may be asserted when the QAM modulator stage controller 434 of the QAM demodulator 532 (initially at stage 1 ) switches to stage 2 based on the results of Eq. 18. The stage 1 to stage 2 transition occurs only if the coax is connected and the QAM demodulator 532 is actively receiving an upstream signal from the monitor side QAM modulator. Any subsequent disconnection of the coax will cause loss of signal, an increase in the MSE calculated by Eq. 18 and will lead to a reversion to stage 1. The coax connected signal 531 can be reset or otherwise de-asserted when the QAM demodulator

532 is at stage 1. In some embodiments, it the camera side QAM demodulator 532 may be required to have achieved stage 3 before asserting the coax connected signal 531. [00198] Another method for detecting presence of input signal 534 is based on the demodulator frame sync confidence counter discussed in relation to Fig. 52B. In particular, the coax connected signal 531 may be asserted by the camera side QAM demodulator 532 only when the confidence counter registers a value that is greater than a pre-determined threshold value. In one example, the threshold value may be 4. Accordingly, the coax connected signal 531 will be asserted only when the coax is connected and the monitor side modem is transmitting SLOC frames to the camera. If the frame sync process continues to free run even if no symbols are being received, disconnection will cause the confidence counter to count backwards and eventually to fall below 4 and the coax connected signal 531 will be de-asserted.

[00199] Another method for detecting presence of input signal 534 is based on higher layer protocols. Referring again to Fig. 51 A, HD camera 30 and the monitor side host system 38 may be communicating using a networking protocol. For the purposes of this discussion, the ubiquitous Internet protocol (IP) will be used as an example of a networking protocol. Some modes of IP are inherently two-way and result in data being sent both upstream and downstream. If the cable is disconnected, a network controller or processor in HD camera 30 and/or modem 32 recognizes that no return IP packets are arriving from the monitor side and can notify camera side SLOC modem 32 to cease passband transmission. In one example, such notification may include transmitting a special predetermined data packet from HD camera 30 to modem 32 through, for example Mil interface 536 shown in

Fig. 53. Additional Descriptions of Certain Aspects of the Invention

[00200] The foregoing descriptions of the invention are intended to be illustrative and not limiting. For example, those skilled in the art will appreciate that the invention can be practiced with various combinations of the functionalities and capabilities described above, and can include fewer or additional components than described above. Certain additional aspects and features of the invention are further set forth below, and can be obtained using the functionalities and components described in more detail above, as will be appreciated by those skilled in the art after being taught by the present disclosure. [00201] Certain embodiments of the invention provide systems and methods related to a camera. Some of these embodiments comprise a processor that receives an image signal from an image sensor and produces a plurality of video signals representative of the image signal and an encoder combining the baseband video signal and the digital video signal as an output signal for transmission over a cable. In some of these embodiments, the video signals include a baseband video signal and a digital video signal. In some of these embodiments, the combined baseband and digital video signals are substantially isochronous. In some of these embodiments, the camera is a closed circuit high definition television camera. In some of these embodiments, the baseband video signal comprises a standard definition analog video signal. In some of these embodiments, the digital video signal is modulated before combination with the baseband video signal. In some of these embodiments, the digital video signal comprises compressed digital video. In some of these embodiments, the digital video signal is a high definition digital video signal. In some of these embodiments, the frame rate of the digital video signal is less than the frame rate of the image signal. In some of these embodiments, the modulated digital signal is provided to a video recorder.

[00202] Some of these embodiments comprise a decoder configured to demodulate an upstream signal received from the cable. In some of these embodiments, the demodulated upstream signal comprises control signals. In some of these embodiments, the control signals include signals to control the position and orientation of the camera. In some of these embodiments, the control signals include signals to control the production of the baseband video signal and the digital video signal by the processor. In some of these embodiments, the control signals include a signal to select a portion of the image signal for encoding as the baseband video signal. In some of these embodiments, the control signals include a signal to select a portion of the image signal for encoding as the digital video signal. In some of these embodiments, the demodulated upstream signal comprises an audio signal for driving an audio output of the camera.

[00203] Certain embodiments of the invention provide systems and methods for transmitting video images. Some of these embodiments comprise frequency division multiplexing a video signal received from a high definition imaging device to obtain a modulated digital signal, producing an output signal by combining the modulated digital signal with a baseband analog signal representative of the video signal and transmitting the output signal simultaneously to a display system and digital video capture and/or storage device. In some of these embodiments, the display system displays an image derived from the baseband analog representation of the video signal. In some of these embodiments, the digital video storage records a sequence of high definition frames extracted from the modulated digital signal using a digital video recorder

[00204] Some of these embodiments comprise compressing the video signal. In some of these embodiments, the step of frequency division multiplexing the digital video signal includes compressing the video signal prior to modulation. In some of these embodiments, transmitting the output signal includes providing the output signal to a coaxial cable. Some of these embodiments comprise demodulating an input signal received from the coaxial cable to obtain a control signal. Some of these embodiments comprise generating the baseband analog signal by encoding a portion of the video signal in a composite video signal. Some of these embodiments comprise selecting the portion of the video signal to be encoded in the composite video signal using the control signal. Some of these embodiments comprise controlling a position of the camera using the control signal. In some of these embodiments, demodulating the input signal includes extracting an audio signal from the input signal

[00205] Certain embodiments of the invention provide systems and methods for operating cameras. Some of these embodiments comprise a processor that receives an image signal from an image sensor and produces a plurality of video signals, control logic configured to respond to a control signal received by the camera and a modulator configured to modulate the digital video signal as a modulated signal. In some of these embodiments, the plurality of video signals includes a baseband video signal and a digital video signal. In some of these embodiments, each of the plurality of video signals represents at least a portion of a field of view of the camera. In some of these embodiments, the control signal controls the content of the baseband and digital video signals. In some of these embodiments, the modulated signal and the baseband video signal are transmitted simultaneously by the camera

[00206] In some of these embodiments, the baseband and digital video signals are substantially isochronous. Some of these embodiments comprise an encoder that combines the baseband video signal and the modulated signal as an output signal for transmission over a cable. In some of these embodiments, the control signal is received as a wireless signal. In some of these embodiments, the modulated signal is transmitted wirelessly. In some of these embodiments, the digital video signal is a high definition digital video signal. In some of these embodiments, the digital video signal comprises compressed digital video. In some of these embodiments, the control signal moves the portion of the field of view represented by one of the video signals.

[00207] Certain embodiments of the invention provide an equalizer for use with a digital signal and a baseband analog signal separated by frequency and carried by a cable. Some of these embodiments comprise a digital equalizer that removes distortions from the digital signal received at the receiver. Some of these embodiments comprise an analog equalizer that compensates for attenuations of the analog signal caused by the cable. In some of these embodiments, the analog equalizer applies one of a set of baseband analog filters to compensate for the attenuations. In some of these embodiments, the applied baseband analog filter is selected based on an estimate calculated by the digital equalizer of difference in attenuation at different frequencies.

[00208] In some of these embodiments, the digital signal and the analog signal are transmitted between a transmitter embodied in a camera and a receiver, and wherein the receiver provides an equalized signal representative of the analog signal to a monitor. In some of these embodiments, the cable comprises a coax cable. In some of these embodiments, the distortions increase with the length of the cable. In some of these embodiments, the distortions include multipath distortions. In some of these embodiments, the estimate of attenuation is calculated from a frequency band having a power spectral density in which tilt is approximately linear. In some of these embodiments, the tilt is calculated using a fast Fourier transform for a plurality of filter taps. In some of these embodiments, frequency bins within the frequency band are selected to permit calculation of the frequency response of a filter of the digital equalizer using the summations: ,[4« + 3] where

G[k] is the discrete Fourier transform of time-domain converged equalizer filter taps and £, corresponds to a specific frequency bin of the DFT. In some of these embodiments, the digital signal comprises a high-definition representation of video images captured by a camera, and wherein the analog signal comprises a standard-definition representation of the video images.

[00209] Certain embodiments of the invention provide methods for equalizing an analog signal in a cable that also carries a digital signal separated from the analog signal by frequency. In some of these embodiments, the method is performed by a modem that receives the analog and digital signals and outputs a baseband video signal. Some of these embodiments comprise calculating tilt in the digital signal. In some of these embodiments, the tilt characterizes attenuation as a function of frequency attributable to the cable. Some of these embodiments comprise equalizing the digital signal based on the calculated tilt. Some of these embodiments comprise configuring an analog equalizer by using the calculated tilt to select one of a set of baseband analog filters. Some of these embodiments comprise equalizing the analog signal using the selected baseband analog filter. [00210] In some of these embodiments, the analog signal comprises a baseband video signal and the digital signal comprises a high definition version of the baseband video signal. In some of these embodiments, the cable comprises a coax cable and wherein the tilt varies with length of the cable. In some of these embodiments, the tilt derives from multi-path distortions. In some of these embodiments, calculating tilt includes estimating attenuations within a frequency band having a power spectral density in which tilt is approximately linear. In some of these embodiments, estimating attenuation includes using a fast Fourier transform for a plurality of filter taps. In some of these embodiments, estimating attenuation includes selecting frequency bins within the frequency band. In some of these embodiments, the selected frequency bins optimize the efficiency of the step of calculating the tilt. [00211] Certain embodiments of the invention provide digital communications systems that use a novel framing structure. Some of these embodiments comprise a convolutional byte interleaver that interleaves a frame of data, wherein the interleaver is synchronized to a frame structure. Some of these embodiments comprise a randomizer configured to produce a randomized data frame from the interleaved data frame. Some of these embodiments comprise a punctured trellis code modulator operated at a selectable code rate that produces a trellis coded data frame from the randomized data frame. Some of these embodiments comprise a QAM mapper that maps groups of bits in the trellis coded data frame to modulation symbols, thereby providing a mapped frame. Some of these embodiments comprise a synchronizer that adds a synchronization packet to the mapped frame.

[00212] In some of these embodiments, the punctured trellis code modulator is bypassed to obtain an optimized net bit rate based on a measured white noise performance of the system. In some of these embodiments, the same synchronization packet is added to each of a sequence of subsequent mapped frames. In some of these embodiments, the same synchronization packet is added to each mapped frame. In some of these embodiments, a portion of the synchronization packet comprises 127 symbols. In some of these embodiments, a portion of the synchronization packet comprises different binary sequences for real and imaginary parts of the modulation symbols. In some of these embodiments, a portion of the synchronization packet comprises an identical binary sequence for both real and imaginary parts of the modulation symbols. In some of these embodiments, the synchronization packet comprises data that indicates a transmission mode for the mapped frame. In some of these embodiments, the indication of transmission mode includes a selected QAM constellation and a selected trellis code rate. In some of these embodiments, the system generates a constant integral number of Reed-Solomon packets for each frame of data regardless of transmission mode. In some of these embodiments, the system generates a variable integer number of modulation symbols for each frame of data regardless of transmission mode. In some of these embodiments, the system generates an integral number of puncture pattern cycles per frame of data regardless of transmission mode.

[00213] Certain embodiments of the invention provide framing methods for a variable net bit rate digital communications system. Some of these embodiments comprise providing a set of different quadrature amplitude modulation (QAM) constellations. Some of these embodiments comprise generating frames of data packets using punctured trellis code combinations, each combination corresponding to an associated mode. Some of these embodiments comprise providing a frame having a variable integral number of QAM symbols. In some of these embodiments, the number of QAM symbols corresponds to a selected mode. In some of these embodiments, an associated number of bytes and Reed-Solomon packets per frame is constant. In some of these embodiments, generating frames of data packets using punctured trellis code combinations includes generating an integral number of puncture pattern cycles per frame of data regardless of the associated mode. In some of these embodiments, the number of data bits per QAM symbol for one or more modes is fractional. In some of these embodiments, a number of trellis coder puncture pattern cycles per frame is an integer for all modes.

[00214] Certain embodiments of the invention provide systems that correct phase offset. Some of these embodiments comprise a phase offset corrector that receives an equalized signal representative of a quadrature amplitude modulated signal and derives a phase- corrected signal from the equalized signal. Some of these embodiments comprise a two- level slicer that slices the equalized signal to obtain real and imaginary sequences. Some of these embodiments comprise a frame synchronizer that performs a correlation of the real and imaginary sequences with corresponding parts of a stored frame-sync pseudo-random sequence. Some of these embodiments comprise a phase correction signal provided by the frame synchronizer to the phase offset corrector. In some of these embodiments, the phase correction signal is based on the maximum real and imaginary values of the correlation. In some of these embodiments, the frame synchronizer performs continuous cross-correlation on incoming sliced quadrature amplitude modulated symbols.

[00215] In some of these embodiments, the continuous cross-correlation is performed separately for the real and imaginary sequences with a stored copy of a binary frame-sync pseudo-random noise sequence. In some of these embodiments, the quadrature amplitude modulated signal is modulated using punctured trellis codes. In some of these embodiments, the quadrature amplitude modulated signal is modulated using quadrature phase shift keying modulation. In some of these embodiments, the quadrature amplitude modulated (QAM) signal is modulated using 16-QAM. In some of these embodiments, the quadrature amplitude modulated (QAM) signal is modulated using 64-QAM. In some of these embodiments, frame sync symbols of the quadrature amplitude modulated signal have the same sign and the signs of the maximum real and imaginary values of the correlation are indicative of phase rotation in the equalized signal. In some of these embodiments, the phase correction signal provided by the frame synchronizer comprises the signs of the maximum real and imaginary values of the correlation. In some of these embodiments, the phase offset corrector derives the phase-corrected signal by indexing a lookup table with the signs of the maximum real and imaginary values of the correlation to determine a phase correction value.

[00216] Certain embodiments of the invention provide methods for correcting carrier phase offset in a quadrature amplitude modulated signal in a receiver. Some of these embodiments comprise equalizing the signal. Some of these embodiments comprise slicing the equalized signal, thereby obtaining real and imaginary sequences from the equalized signal. Some of these embodiments comprise identifying a frame synchronization sequence in the real and imaginary sequences. In some of these embodiments, identifying the frame synchronization sequence includes correlating a stored pseudo-random sequence with the real and imaginary sequences. In some of these embodiments, identifying the frame synchronization sequence includes determining a start of a frame from maximum correlation values associated with the real and imaginary sequences. Some of these embodiments comprise correcting a phase error in the equalized signal based on the maximum correlation values.

[00217] In some of these embodiments, the correlating step includes performing continuous cross-correlation on a series of sliced quadrature amplitude modulated symbols with a stored copy of a binary frame-sync pseudo-random noise sequence. In some of these embodiments, the correlating step includes performing continuous cross-correlation on a stored copy of the frame synchronization sequence separately with the real and imaginary sequences. In some of these embodiments, frame sync symbols of the frame synchronization sequence have the same sign. In some of these embodiments, correcting a phase error includes determining phase rotation in the equalized signal based on the signs of the maximum correlation values. In some of these embodiments, correcting a phase error in the equalized signal includes indexing a lookup table with the signs of the real and imaginary maximum correlation values. [00218] Certain embodiments of the invention provide methods for correcting carrier phase offset in a quadrature amplitude modulated signal. In some of these embodiments, the methods can be implemented in a system comprising one or more processors configured to execute instructions. Some of these embodiments comprise executing, on the one or more processors, instructions configured to equalize the signal. Some of these embodiments comprise executing, on the one or more processors, instructions configured to slice the equalized signal, thereby obtaining real and imaginary sequences from the equalized signal. Some of these embodiments comprise executing, on the one or more processors, instructions configured to identify a frame synchronization sequence in the real and imaginary sequences. In some of these embodiments, identifying the frame synchronization sequence includes performing continuous cross-correlation on a stored copy of the frame synchronization sequence separately with the real and imaginary sequences. In some of these embodiments, identifying the frame synchronization sequence includes determining a start of a frame from maximum correlation values associated with the real and imaginary sequences. Some of these embodiments comprise executing, on the one or more processors, instructions configured to correct a phase error in the equalized signal based on the maximum correlation values. In some of these embodiments, frame sync symbols of the frame synchronization sequence have the same sign. In some of these embodiments, correcting a phase error includes determining phase rotation in the equalized signal based on the signs of the maximum correlation values.

[00219] Certain embodiments of the invention provide methods for identifying a constellation of symbols. In some of these embodiments, the method is performed by one or more processors of a multi-mode quadrature amplitude modulated communications system. Some of these embodiments comprise executing instructions that cause the one or more processors to characterize power distribution in a signal. In some of these embodiments, the power distribution statistically tracks occurrences of power levels detected in the signal. Some of these embodiments comprise executing instructions that cause the one or more processors to determine one or more peak occurrences of power levels within the power distribution. Some of these embodiments comprise executing instructions that cause the one or more processors to determine the constellation based on distribution of the peak occurrences.

[00220] In some of these embodiments, the one or more processors determine the constellation based also on spread of the one or more peak occurrences. In some of these embodiments, the signal is an equalized signal and wherein the one or more processors determine the constellation by examining a plurality of sections in a histogram of the power distribution. In some of these embodiments, each of the sections corresponds to a range of power levels associated with one but not all of a plurality of constellation candidates. In some of these embodiments, the plurality of constellation candidates includes a quadrature phase shift key constellation and a quadrature amplitude modulation (QAM) constellation. In some of these embodiments, the plurality of constellation candidates includes 16-QAM and 64-QAM constellations. In some of these embodiments, the plurality of constellation candidates includes a 256-QAM constellation.

[00221] Some of these embodiments comprise executing instructions that cause the one or more processors to establish reliability of an identified constellation by performing steps for each of a succession of constellation determinations. In some of these embodiments, the steps include incrementing a counter when a succeeding determination confirms the identity of the constellation. In some of these embodiments, the steps include decrementing the counter when a succeeding determination identifies a different constellation. In some of these embodiments, the steps include providing a measure of reliability based on the value of the counter. In some of these embodiments, the constellation is identified when the counter exceeds a threshold value. In some of these embodiments, a counter is provided for each of a plurality of constellation candidates and wherein the constellation is identified when its corresponding counter exceeds a threshold value. In some of these embodiments, the peak occurrences of power levels correspond to corner symbols of the constellation. In some of these embodiments, the constellation is identified before the signal is equalized. [00222] Certain embodiments of the invention provide methods for identifying a constellation of symbols in a multi-mode quadrature amplitude modulated communications system. In some of these embodiments, the methods are performed by a processor in a modem of the communications system. Some of these embodiments comprise executing instructions that cause the processor to extract mode information from the frame of data responsive to detection of a start of a frame of data received at the modem. Some of these embodiments comprise executing instructions that cause the processor to determine a current constellation by selecting from a plurality of potential constellation codes a code that most closely matches a corresponding code in the mode bits. Some of these embodiments comprise executing instructions that cause the processor to increase a confidence metric associated with the previously identified constellation if the current constellation matches a previously determined constellation. Some of these embodiments comprise executing instructions that cause the processor to decrease the confidence metric, and record the current constellation as the previously identified constellation if the current constellation is different from the previously identified constellation. Some of these embodiments comprise repeating the steps that cause the processor to extract mode information, select a current constellation and adjust the confidence metric for subsequent frames of data until the confidence metric exceeds a predetermined threshold. In some of these embodiments, the constellation is identified when the confidence metric exceeds the predetermined threshold. [00223] In some of these embodiments, selecting a constellation code includes causing the processor to perform cross-correlations for each of the plurality of potential constellation codes with the corresponding code bits. In some of these embodiments, the constellation is identified in an unequalized signal that carries the frame of data and subsequent frames of data. In some of these embodiments, the constellation is identified while the processor is recovering a carrier from the signal. Some of these embodiments comprise executing instructions that cause the processor to calculate an error signal using a constant modulus algorithm (CMA) to converge equalizer filter taps to permit equalization of the signal. In some of these embodiments, the error signal is calculated using a scaled CMA parameter to improve equalization performance. In some of these embodiments, performing equalization of the signal includes analyzing histograms of power of the equalized signal. In some of these embodiments, analyzing the histograms includes using a probability mass function. In some of these embodiments, performing equalization of the signal includes executing instructions that cause the processor to calculate the power associated with a plurality of symbols in the equalized signal. In some of these embodiments, performing equalization of the signal includes executing instructions that cause the processor to identify corner symbols of the constellation by using a threshold power level. In some of these embodiments, the threshold power level indicates the identity of the constellation. [00224] Certain embodiments of the invention provide systems for transmitting video signals, comprising a camera-side modem configured to receive two signals from a video camera, each signal being representative of sequence of images captured by the camera, and further configured to transmit one of the two signals as a composite baseband video signal and to modulate and transmit the other signal as a passband video signal that does not overlap the baseband signal. In some of these embodiments, the camera-side modem includes a mixer that combines the baseband and passband video signals to provide a transmission signal. In some of these embodiments, the camera-side modem includes a diplexer configured to transmit the transmission signal over a transmission line and to extract a received passband signal from the transmission line. In some of these embodiments, the camera-side modem includes a detector that monitors the camera-side modem and generates an enable signal when the received passband signal is identified. In some of these embodiments, the enable signal controls transmission of at least one of the baseband video signal and the passband video signal.

[00225] In some of these embodiments, the passband video signal is transmitted only when the enable signal is generated. In some of these embodiments, the received passband signal is quadrature amplitude modulated. In some of these embodiments, the detector monitors an estimate of mean square error in a quadrature amplitude demodulator, and wherein the enable signal is generated when the estimate exceeds a threshold value. In some of these embodiments, the detector monitors a constellation detector. In some of these embodiments, the enable signal is generated based on a measurement of reliability provided by the constellation detector. In some of these embodiments, the measurement of reliability is based on a sequence of frame synchronizations. In some of these embodiments, the detector monitors an estimate of mean square error in an equalizer. In some of these embodiments, the enable signal is generated when the estimate exceeds a threshold value. In some of these embodiments, the detector monitors a gain factor in an automatic gain control module of the camera-side modem. In some of these embodiments, the enable signal is generated when the gain factor has a value less than a threshold value. In some of these embodiments, the detector monitors a magnitude of the received passband signal. In some of these embodiments, the enable signal is generated when the magnitude has a value that exceeds a threshold value. In some of these embodiments, the received passband signal comprises data encoded according to Internet protocols. [00226] Certain embodiments of the invention provide methods for controlling signaling in a security system. Some of these embodiments comprise determining, at an upstream modem, presence of an upstream QAM signal in a composite signal transmitted on a coax cable. Some of these embodiments comprise causing the upstream modem to transmit a composite baseband video signal and a passband video signal on the coax cable when the upstream QAM signal is determined to be present. In some of these embodiments, the composite baseband video signal and the passband video signal are concurrent representations of a sequence of images captured by a video camera. Some of these embodiments comprise causing the upstream modem to transmit the composite baseband video signal on the coax cable and to prevent transmission of the passband video signal when the upstream QAM signal is determined to be absent.

[00227] In some of these embodiments, the upstream QAM signal is determined to be present when a gain value in an automatic gain control signal exceeds a threshold value. In some of these embodiments, the upstream QAM signal is determined to be present when a measurement of magnitude of the upstream QAM signal is less than a threshold value. In some of these embodiments, the upstream QAM signal is determined to be absent when an estimate of mean square error in an equalizer exceeds a threshold value. In some of these embodiments, the upstream QAM signal is determined to be absent when an Internet protocol data packet is identified in the upstream QAM signal. [00228] Certain embodiments of the invention provide automatically reconfigurable systems for transmitting video signals. Some of these embodiments comprise an upstream modem configured to receive two signals from a video camera. In some of these embodiments, each signal is representative of sequence of images captured by the camera.

In some of these embodiments, the upstream modem is configured to transmit one of the two signals as a composite baseband video signal and to modulate and transmit the other signal as a passband video signal that does not overlap the baseband signal. Some of these embodiments comprise a downstream modem configured to receive the composite baseband video signal and the passband video signal from the upstream modem and further configured to transmit an upstream passband signal to the upstream modem. In some of these embodiments, the upstream modem ceases transmission of at least one of the two signals when it detects a degradation in the upstream passband signal. [00229] Although the present invention has been described with reference to specific exemplary embodiments, it will be evident to one of ordinary skill in the art that various modifications and changes may be made to these embodiments without departing from the broader spirit and scope of the invention. For example, systems have been described which provide compressed digital HD video concurrently with a baseband analog video signal. Other embodiments of the invention provide simultaneous standard definition digital and analog feeds. Other embodiments provide full frame rate digital HD video along with the baseband analog video. Accordingly, the specification and drawings are to be regarded in an illustrative rather than a restrictive sense.