Field of the invention The field of the present invention is wireless

communication devices and in particular, circuits used in communication device transceiver architectures for conversion of signals to and from radio frequencies. Background of the invention

Wireless communication devices transmit and receive radio frequency signals. Mixer circuits are used in wireless communication device transceivers for converting signals to and from radio frequencies. For example, mixers are used to convert intermediate frequency or baseband signals to radio frequency signals for transmission, also know as up-conversion. Mixers are also used for converting radio frequency signals received by the communication device to intermediate frequency or baseband signals for processing to retrieve the data communicated using the signal.

There is a current market trend for smaller, cheaper and lower power consumption wireless communication devices . Thus there is a need for improved circuits for use in wireless devices.

Summary of the invention According to one aspect of the present invention there is provided a quadrature mixer circuit 100 adapted to be used in a quadrature system, the quadrature mixer circuit comprising:

a first double balanced passive mixer circuit 130 adapted to mix in-phase (I) and complementary in-phase

(lb) components of an input signal 110 with a first local oscillator signal 150 to provide a first mixed signal and a first mixed complement signal;

a second double balanced passive mixer circuit 140 adapted to mix quadrature (Q) and complementary quadrature (Qb) components of an input signal 120 with a second local oscillator signal having a 90 degree phase offset from the first local oscillator signal to provide a second mixed signal and a second mixed complement signal;

a first amplifier stage 170 adapted to amplify the first mixed signal and first mixed complement signals output of the first double balanced passive mixer 130; a second amplifier stage 180 adapted to amplify the second mixed signal and the second mixed complement signal output of the second double balanced passive mixer 140; and

an adder 190 adapted to add the amplified first mixed signal and amplified second mixed signal to provide a first output signal and add the amplified first mixed complement signal and the amplified second mixed

complement signal to provide a second output signal.

An embodiment of the quadrature mixer circuit further comprises an output amplifier stage 480 adapted to amplify the first output signal and the second output signal. The quadrature mixer circuit can further comprise:

a local oscillator 150 adapted to generate a local oscillator signal and complement local oscillator signal; and

a phase offset component 160 adapted to phase shift each of the local oscillator signal and complement local oscillator signal by 90 degrees.

Each double balanced mixer circuit can be implemented using four differentially connected transistors 230, 235, 240, 245, each having gate source and drain terminals, wherein the local oscillator signal is applied to the gate terminals of a first transistor 230 and a second transistor 235 and the complement local oscillator signal is applied to the gate terminals of a third transistor 240 and fourth transistor 245, an input signal 210 is applied to the drain terminals of the first transistor 230 and the fourth transistor 245, a complement 220 of the input signal 210 is applied to the drain terminals of the second transistor 235 and third transistor 240, the source terminals of the first transistor 230 and third transistor 240 are electrically coupled to add the source outputs to provide a mixed signal, and the source terminals of the second transistor 235 and fourth transistor 245 are electrically connected to add the source outputs to provide a mixed complement signal. Each double balanced mixer circuit 130, 140 can include an input stage adapted to filter any direct current (DC) bias from the input signal and complement input signal.

In an embodiment the input stage comprises a capacitor 215 connected serially to an input connection for the input signal input 210 and a capacitor 225 connected serially to an input connection for the complement signal input 220.

In an embodiment the first and second amplifier stages are implemented as part of the first and second double

balanced mixer circuits respectively and each of the first and second amplifier stage comprises two transistors 270, 275 each having gate source and drain terminals, the source terminals of each transistor being electrically grounded, where the mixed signal output from the double balanced mixer circuit is electrically connected to the gate terminal of one transistor 270 to produce an

amplified mixed signal at the drain terminal, and the mixed complement signal output from the double balanced mixer circuit is electrically connected to the gate terminal of the other transistor 275 to provide an

amplified mixed complement signal at the drain terminal. In the above embodiment the adder stage 190 can comprise a direct electrical connection between the amplified first mixed signal and amplified second mixed signal to add these signals to provide the first output signal, and a direct electrical connection between the amplified first mixed complement signal and the amplified second mixed complement signal to add these signals to provide a second output signal.

The output amplifier stage 580 can comprise a first resonant circuit adapted to amplify the first output signal and a second resonant circuit adapted to amplify the second output signal, each of the first and second resonant circuits comprising a transistor 581 having gate source and drain terminals with the output signal applied to the source terminal, drive voltage supply VDD applied to the gate terminal, an inductor 583 electrically

connected between the drive voltage supply and the drain terminal and a capacitor 585 electrically connected to the drain terminal and a signal output port, whereby the inductor 583, capacitor 585 and parasitic capacitance of the transistor 581 create a resonant circuit at an

intended frequency to amplify the output signal.

According to another aspect of the present invention there is provided a mixer circuit comprising:

a mixer stage 440 adapted to mix a first input signal and a second input signal that is the complement of the first input signal, with a local oscillator signal and complement local oscillator signal to provide a mixed signal and a complement mixed signal; and

a pre-adder amplifier stage 460 adapted to amplify each of the mixed signal and complement mixed signal.

The mixer circuit can include an input stage 430 adapted to receive the first input signal and the second input signal and filter any direct current (DC) bias from the first input signal and the second input signal.

The mixer stage can comprise four differentially connected transistors 230, 235, 240, 245 each having gate source and drain terminals, wherein the local oscillator signal 250 is applied to the gate terminals of a first transistor 230 and a second transistor 235 and the complement local oscillator signal 260 is applied to the gate terminals of a third transistor 240 and fourth transistor 245, an input signal is applied to the drain terminals of the first transistor 230 and the fourth transistor 245, a complement input signal is applied to the drain terminals of the second transistor 235 and the third transistor 240, the source terminals of the first transistor 230 and third transistor 240 are electrically coupled to add the source outputs to provide a mixed signal, and the source

terminals of the second transistor 235 and fourth

transistor 245 are electrically connected to add the source outputs to provide a mixed complement signal.

The pre-adder amplification stage can comprise two

transistors 270, 275 each having gate source and drain terminals, the source terminals of each transistor 270, 275 being electrically grounded, where the mixed signal output from the mixer stage is electrically connected to the gate terminal of one transistor 270 to produce an amplified mixed signal at the drain terminal, and the mixed complement signal output from the mixer stage is electrically connected to the gate terminal of the other transistor 275 to provide an amplified mixed complement signal at the drain terminal .

A mixer circuit as claimed in claim 13 wherein the input stage comprises a capacitor 215 connected serially to an input connection for the input signal input and a

capacitor 225 connected serially to an input connection for the complement signal input.

According to another aspect of the present invention there is provided a mixer circuit as described above implemented in a single integrated circuit.

Brief description of the drawings

Figure 1 is a block diagram of a mixer circuit

architecture according to an embodiment of the present invention

Figure 2 is a representative circuit diagram of a mixer circuit including an amplifier stage

Figure 3 is a symbol representing the mixer and amplifier stage circuit of Figure 2

Figure 4 is a block diagram of a mixer circuit

architecture according to another embodiment of the present invention

Figure 5 is a representative circuit diagram of an

embodiment of a mixer circuit architecture according to an embodiment of the present invention

Detailed description

According to an embodiment of the present invention there is provided a quadrature mixer circuit as illustrated in Figure 1. The mixer 100 includes two double balanced passive mixer circuits 130, 140, two amplifiers 170, 180, and an adder stage 190. The illustrated mixer is adapted for using in quadrature systems, for example orthogonal frequency division multiplexing (OFDM) systems. A local oscillator 150 provides a local oscillator signal to be mixed with input in-phase (I) signal components 110 in the first mixer 130. A 90° phase shift 160 is applied to the local oscillator signal for mixing with input quadrature (Q) signal 120 components in the second mixer 140. The local oscillator signal and the 90° offset local

oscillator signal can be externally generated and applied to the mixer. Alternatively, in some embodiments the local oscillator and phase shift can be implemented as part of the mixer. The input signals 110 In-phase (I) signal and

complementary in-phase (lb) components of an input 110 are applied to the first double balanced mixer circuit 130. The complementary lb signal component is the inverse of the I signal component, or put another way the I signal component phase shifted by 180°. The first double balanced passive mixer circuit 130 is adapted to mix input 110 in-phase (I) and complementary in-phase (lb)

components with a local oscillator 150 signal to provide a first mixed signal and a first mixed complement signal . The output mixed signals are a convolution of the input signals and the local oscillator signals.

The input signals 120 quadrature (Q) signal and

complementary quadrature (Qb) components of an input 120 are applied to the second double balanced mixer circuit

140. The second double balanced passive mixer circuit 140 is adapted to mix quadrature (Q) and complementary

quadrature (Qb) components of an input signal with a second local oscillator signal having a 90 degree phase offset 160 from the first local oscillator signal 150, to provide a second mixed signal and a second mixed

complement signal. The output mixed signals are a

convolution of the input signals and the local oscillator signals .

The first amplifier stage 170 is adapted to amplify the first mixed signal and first mixed complement signals output of the first double balanced passive mixer. The second amplifier stage 180 is adapted to amplify the second mixed signal and the second mixed complement signal output of the second double balanced passive mixer. The adder 190 adds the amplified first mixed signal and amplified second mixed signal to provide a first output signal and add the amplified first mixed complement signal and the amplified second mixed complement signal to provide a second output signal.

An embodiment of the double balance mixer circuits 130, 140 will now be described with reference to Figure 2 which shows an example of a double balanced mixer circuit and an amplifier stage implemented using MOSFET transistors, N- type ( MOS) transistors in the embodiment shown although other types may be used. It should be appreciated that the same circuit can be used for the mixer 130 for the in- phase signal components and the mixer 140 for the

quadrature signal components, the only different being the 90° phase offset between the local oscillator signal mixed with the I and Q signal components .

The circuit 200 comprises a mixer stage and an amplifier stage. The mixer stage is implemented using four

differentially connected transistors 230, 235, 240, 245, each having gate source and drain terminals. The local oscillator signal 250 is applied to the gate terminals of a first transistor 230 and a second transistor 235 and the complement local oscillator signal 260 is applied to the gate terminals of a third transistor 240 and fourth transistor 245. An input signal 210 is applied to the drain terminals of the first transistor 230 and the fourth transistor 245. The complement of the input signal 220 is applied to the drain terminals of the second transistor 235 and third transistor 240. The source terminals of the first transistor 230 and third transistor 240 are

electrically coupled to add the source outputs to provide a mixed signal, and the source terminals of the second transistor 235 and fourth transistor 245 are electrically connected to add the source outputs to provide a mixed complement signal.

It should be appreciated that for each transistor the local oscillator signal applied to the gate terminal will cause the transistor to switch on during the first half of the local oscillator (LO) signal cycle where the

sinusoidal LO signal is positive. Increasing gate voltage during the first half of the LO sinusoidal cycle reduces the drain to source resistance of the transistor. This effectively opens the drain to source channel through the transistor enable the signal input to the drain terminal to pass though to the source terminal. In the second half of the LO signal cycle the negative voltage applied to the gate terminal pinches off the drain to source channel.

As shown in Figure 2 the LO signal is used to drive the gate terminals of the first and second transistors and complement LO (LOb) signal is used to drive the third and fourth transistors. While the first 230 and second 235 transistors are in pinch off, the third 240 and fourth 245 transistors are switching through the first and second input signals by virtue of the gate terminals being driven by the complement LO signal. The signals from the source terminals of the first and third 230, 240 transistors are added and the signals from the source terminals of the second and fourth 235, 245 are added. Switching of the first and third transistors by the LO and LOb signals respectively and adding the source output provides an output signal where the mixed signal switches between the input signal and its complement at the LO frequency, thus providing a mixed signal.

The double balanced mixer circuit 200 can includes an input stage adapted to filter any direct current (DC) bias from the input signal 210 and complement input signal 220. In the embodiment shown in Figure 2 the input stage comprises a capacitor 215 connected serially to an input connection for the input signal input 210 and a capacitor 225 connected serially to an input connection for the complement signal input 220.

The double balanced mixer circuit 200 also includes an amplifier stage comprising two transistors 270, 275 each having gate source and drain terminals. The source terminals of each transistor are grounded. The gate terminal of one transistor 270 is electrically connected to the source terminals of the first 230 and third 240 transistors so as to be driven by the mixed signal 280 and output an amplified mixed signal 290 at the drain

terminal. The gate terminal of the other transistor 275 is electrically connected to the source terminals of the second 235 and fourth 245 transistors so as to be driven by the mixed complement signal 285 and output an amplified mixed complement signal 295 at the drain terminal. This is a common source transconductance amplifier

configuration. Where the gate is driven by the input signal to provide an output signal at the drain terminal amplified based on the transconductance of the transistor.

It should be appreciated that the circuit of the mixer and amplifier stage shown in Figure 2 can be implemented in a single integrated circuit. Figure 3 shows an example of a symbol 300 used to

represent the circuit of Figure 2. In the symbol 300 the input terminal 310 corresponds to input 210 and input terminal 320 corresponds to input 220 of Figure 2, whereby the input signal and complement input signal can be applied to the circuit. Local oscillator terminal 330 corresponds to local oscillator input 250 of Figure 2.

Complement local oscillator terminal 340 corresponds to complement local oscillator input 260 of Figure 2. Mixed signal terminal 350 corresponds to mixed signal 280 of Figure 2 and mixed signal terminal 360 corresponds to mixed signal 285 of Figure 2. The output terminal 370 corresponds to the signal output 290 and the complement output terminal 380 corresponds to the complement output signal 295 of Figure 2.

The symbol 300 of Figure 3 represents a mixer circuit of Figure 2 comprising an input stage adapted to receive a first input signal 310 and a second input signal 320 that is the complement of the first input signal, and filter any direct current (DC) bias from the first input signal and the second input signal, a mixer stage adapted to mix the first input signal and second input signal with a local oscillator signal 330 and complement local

oscillator signal 340 to provide a modulated signal and a complement modulated signal and a pre-adder amplifier stage adapted to amplify each of the mixed signal and complement mixed signal.

An advantage of the present mixer circuit architecture is that it can be used in a circuit to convert four

quadrature input signals (I, lb, Q, Qb) at an intermediate or baseband frequency to two differential radio frequency output signals. Thus making the mixer architecture suitable for use in quadrature systems, such as orthogonal frequency division multiplexing (OFDM) systems. Figure 4 shows a block diagram for the circuit of Figure 5. The bock diagram of Figure 4 corresponds to the block diagram of Figure 1 with the exception of an additional output amplifier stage 480 after the adder 470. The circuit of Figure 4 comprises an input stage 430, mixer stage 440 and pre-adder amplifier stage 460 which can be implemented using the circuit of Figure 2 and represented by the symbol of Figure 3, to provide an in- phase mixing path. The mixer stage 440 is connected to a local oscillator 450. In-phase (I) input and complement in-phase (lb) input signals at a baseband or intermediate frequency can be applied to input terminals 405 and 410 of input stage 430 and any DC bias filtered from the input signals. The mixer stage 440 mixes the I and lb signals with the local oscillator (LO) signals to produce a mixed signal and mixed complement signal at a desired radio frequency based on the frequency of the LO signal. The mixed and mixed complement differential signals are a convolution of the input I and lb signals with the LO signal. Thus the mixed signals comprise the input in- phase signal modulated by the LO signal . The output amplifier stage 460 is adapted to amplify the mixed signal and mixed complement signal .

The circuit of Figure 4 also comprises an input stage 435, mixer stage 445 and pre-adder amplifier stage 465 which can be implemented using the circuit of Figure 2 and represented by the symbol of Figure 3, to provide a quadrature mixing path. The mixer stage 445 is connected to a local oscillator 450 via a 90° phase offset component 445, such that the LO signal applied to the mixer 445 will be phase shifted by 90° from the LO signal applied to mixer 440 and therefore appropriate from mixing the quadrature input signal.

Quadrature (Q) input and complement quadrature (Qb) input signals at a baseband or intermediate frequency can be applied to input terminals 415 and 420 of input stage 435 and any DC bias filtered from the input signals. The mixer stage 445 mixes the I and lb signals with the 90° offset local oscillator (LO) and 90° offset complement LO signals to produce a mixed signal and mixed complement signal at the radio frequency. The mixed and mixed complement differential signals are a convolution of the input Q and Qb signals with the 90° offset LO signals. Thus the mixed signals comprise the input quadrature signal modulated by the 90° offset LO signal. The output amplifier stage 465 is adapted to amplify the mixed signal and mixed complement signal.

The mixed signal and complement mixed signal from the in phase path are respectively added to the mixed signal and complement mixed signal of the quadrature mixing path by the adder 470. Thus the adder adds the energy from the I and Q paths. The differential signals output from the adder 470 can then amplified in the output amplifier stage 480 to provide output RF signal 490 and complement RF signal 495 for transmission.

Figure 5 is an exemplary circuit diagram corresponding to the block diagram of Figure 4 and simplified by using symbols 530 and 540 (symbol of Figure 3) to represent the input stage, mixer stage and pre-adder amplifier stage for each of the in-phase mixing path and quadrature mixing paths. Figure 5 shows an example of an adder 570 stage and output amplifier stage 580 in detail.

In-phase input intermediate frequency signal 505 and its complement in-phase intermediate frequency signal 510 can be input to the in-phase mixing circuit 530, to which is also applied a radio frequency local oscillator signal 552 and complement local oscillator signal 555 generated by local oscillator 550. The mixer circuit 530 modulates the input intermediate frequency signals and outputs a radio frequency signal 572 and complement radio frequency signal 574 as described above with reference to Figures 2 and 4.

Quadrature input intermediate frequency signal 515 and its complement in-phase intermediate frequency signal 520 can be input to the quadrature mixing circuit 540, to which is also applied a radio frequency local oscillator signal 562 and complement local oscillator signal 565 which are generated by local oscillator 550 and phase shifted by 90° by 90° phase shift component 560. Such that the local oscillator signals 562, 565 applied toe the quadrature mixer circuit 540 are offset by 90° from the local

oscillator signals 552, 555 applied to the in phase mixer circuit 530. The mixer circuit 540 modulates the input intermediate frequency signals and outputs a radio

frequency signal 576 and complement radio frequency signal 576 as described above with reference to Figures 2 and 4.

DC Bias component 568 may be provided to apply a direct currant (DC) bias, via the signal ports 532, 535, 542, 545 to drive the gates of the transistors 270, 275 of the first amplifier stage to ensure that the transistors operate in the saturation region.

The adder stage 570 comprises a direct electrical

connection between the radio frequency signal 572 output from the in-phase mixer 530 and the radio frequency signal 576 output from the quadrature mixer 540 to add these signals to provide an output RF signal. The adder stage further comprises a direct electrical connection between the complement radio frequency signal 574 output from the in-phase mixer 530 and the complement radio frequency signal 578 output from the quadrature mixer 540 to add these signals to provide a complement output RF signal.

The output amplifier stage 580 comprises a first resonant circuit adapted to amplify the output RF signal and a second resonant circuit adapted to amplify the complement output RF signal.

The first resonant circuit comprises a transistor 581 with the output RF signal applied to the source terminal, drive voltage supply VDD applied to the gate terminal. An inductor 583 is electrically connected between the drive voltage supply VDD and the drain terminal of the

transistor 581. A capacitor 585 is electrically connected to the drain terminal of the transistor 581 and a signal output port 590, for example for connection to the transmission antenna, for transmission of the RF signal. The inductor 583, capacitor 585 and parasitic capacitance of the transistor 581 create a resonant circuit at the intended radio frequency to amplify the output RF signal 590.

The second resonant circuit comprises a transistor 582 with the complement output RF signal applied to the source terminal, drive voltage supply VDD applied to the gate terminal. An inductor 584 is electrically connected between the drive voltage supply VDD and the drain

terminal of the transistor 582. A capacitor 586 is electrically connected to the drain terminal of the transistor 582 and a signal output port 595, for example for connection to the transmission antenna, for

transmission of the RF signal. The inductor 584,

capacitor 586 and parasitic capacitance of the transistor 582 create a resonant circuit at the intended radio frequency to amplify the output RF signal 595. It should be appreciated that the two amplifier stages of the circuit as described above provides a cascade type amplifier. However, incorporating part of the amplifier with the mixer stage reduces complexity of the circuit. For example, by enabling adding of the in-phase and quadrature mixed signals simply by making a direct

electrical connection between the outputs of each mixer circuit to provide the differential output. TO consider this another way the two pre adder amplification stages, adder and post adder amplification stages all from part of a cascade type amplifier.

The above described mixer circuit architecture is suited for low voltage applications. The number of transistors connected in series from the power source VDD to ground is minimal. This is advantageous as too many transistors connected in series can force the transistors out of the saturation region.

In the claims which follow and in the preceding

description of the invention, except where the context requires otherwise due to express language or necessary implication, the word "comprise" or variations such as

"comprises" or "comprising" is used in an inclusive sense, i.e. to specify the presence of the stated features but not to preclude the presence or addition of further features in various embodiments of the invention.

It is to be understood that, if any prior art publication is referred to herein, such reference does not constitute an admission that the publication forms a part of the common general knowledge in the art, in any country.