Title:
MIXER CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2023/157073
Kind Code:
A1
Abstract:
A mixer circuit according to the present invention comprises: a mixer (1); an LO matching circuit (6) inserted between an LO signal terminal (5) and a first terminal (2) of the mixer (1); an IF matching circuit (8) inserted between an IF signal terminal (7) and a second terminal (3) of the mixer (1); and an RF matching circuit (10) inserted between an RF signal terminal (9) and a third terminal (4) of the mixer (1). The reflection characteristics for the RF matching circuit (10) are set such that the minimum value of reflection loss appears on the high frequency side of the LO signal frequency.
Inventors:
JO TERUO (JP)
KITAYAMA DAISUKE (JP)
TAKAHASHI HIROYUKI (JP)
SAKAMOTO TAKESHI (JP)
KITAYAMA DAISUKE (JP)
TAKAHASHI HIROYUKI (JP)
SAKAMOTO TAKESHI (JP)
Application Number:
PCT/JP2022/005922
Publication Date:
August 24, 2023
Filing Date:
February 15, 2022
Export Citation:
Assignee:
NIPPON TELEGRAPH & TELEPHONE (JP)
International Classes:
H03D7/12; H03D7/00
Foreign References:
| US20060105732A1 | 2006-05-18 | |||
| JP2019153861A | 2019-09-12 | |||
| US20120314811A1 | 2012-12-13 | |||
| JP2004328555A | 2004-11-18 | |||
| JP2019165287A | 2019-09-26 |
Attorney, Agent or Firm:
YAMAKAWA, Shigeki et al. (JP)
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