Title:
MOS TYPE FIELD EFFECT TRANSISTOR AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2006/030505
Kind Code:
A1
Abstract:
A method for manufacturing an MOS-type field effect transistor by which mobility of electrons or holes are remarkably improved and high-speed and low power consumption are realized by using a structure wherein SiGe having a large lattice constant is buried directly below a channel and by effectively introducing distortion to a channel Si layer. The method comprises a process of forming a stressor (2) made of silicon germanium on the part within an activation region isolated by an insulating film formed on a silicon board, a process of forming a silicon channel layer (1) made of silicon on the top of the stressor, and a process of forming a tensile stress film (10) so as to surround a gate electrode and the side wall formed on the gate electrode.
Inventors:
SHIMA MASASHI (JP)
Application Number:
PCT/JP2004/013531
Publication Date:
March 23, 2006
Filing Date:
September 16, 2004
Export Citation:
Assignee:
FUJITSU LTD (JP)
SHIMA MASASHI (JP)
SHIMA MASASHI (JP)
International Classes:
H01L21/336; H01L21/8238; H01L27/092; H01L29/78; (IPC1-7): H01L21/336; H01L29/78; H01L27/092; H01L21/8238
Foreign References:
| JP2003092399A | 2003-03-28 | |||
| JP2002100762A | 2002-04-05 | |||
| JP2003045996A | 2003-02-14 |
Attorney, Agent or Firm:
Okuyama, Yuki (5-21-12 Sendagay, Shibuya-ku Tokyo 51, JP)
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