Title:
MULTI CPU COMPUTER AND SYSTEM RESTART METHOD
Document Type and Number:
WIPO Patent Application WO/2006/082657
Kind Code:
A1
Abstract:
Even if a fatal CPU error has occurred, it is possible to surely execute error processing and restart a system. When a hardware error is caused in a first CPU (2), error information is reported to a second CPU (3) via a first error report circuit (2a) of the first CPU (2). Then, the error information reported from the first CPU (2) is acquired via a second report circuit (3a) of a second CPU (3) and error processing based on the error information is requested to an operating system (4). According to the operating system (4), the second CPU (3) stores failure information including the error information in a storage device (1) and executes system restart processing.
Inventors:
TABEI RYO (JP)
KONDO HIROSHI (JP)
KONDO HIROSHI (JP)
Application Number:
PCT/JP2005/001770
Publication Date:
August 10, 2006
Filing Date:
February 07, 2005
Export Citation:
Assignee:
FUJITSU LTD (JP)
TABEI RYO (JP)
KONDO HIROSHI (JP)
TABEI RYO (JP)
KONDO HIROSHI (JP)
International Classes:
G06F11/14
Foreign References:
| JP2000311155A | 2000-11-07 | |||
| JPH0348940A | 1991-03-01 | |||
| JPH04340631A | 1992-11-27 |
Attorney, Agent or Firm:
Hattori, Kiyoshi (GE EDISON Bldg. Hachioji, 9-8, Azuma-ch, Hachioji-shi Tokyo 82, JP)
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