Title:
MULTI-GATE TRANSISTOR
Document Type and Number:
WIPO Patent Application WO/2013/062187
Kind Code:
A1
Abstract:
The present invention relates to a multi-gate transistor, and the multi-gate transistor according to the present invention comprises: a plurality of gates, which branch out from a single port and are alternately formed so as to face each other, wherein currents flow in opposite directions in gates that are adjacent; a source which is formed on one side or the other side of the plurality of gates; and a drain which is formed on the other side or the one side of the plurality of gates, thereby minimizing parasitic inductance components by inducing mutual inductance by means of the currents flowing in opposite directions in the gates that are adjacent.
Inventors:
PARK JONG-HOON (KR)
PARK CHANG-KUN (KR)
PARK CHANG-KUN (KR)
Application Number:
PCT/KR2012/002079
Publication Date:
May 02, 2013
Filing Date:
March 22, 2012
Export Citation:
Assignee:
UNIV SOONGSIL RES CONSORTIUM (KR)
PARK JONG-HOON (KR)
PARK CHANG-KUN (KR)
PARK JONG-HOON (KR)
PARK CHANG-KUN (KR)
International Classes:
H01L29/78; H01L21/336
Foreign References:
| JP2007273918A | 2007-10-18 | |||
| KR20080079377A | 2008-09-01 | |||
| KR920018932A | 1992-10-22 | |||
| KR960026768A | 1996-07-22 |
Attorney, Agent or Firm:
TAEBAEK INTELLECTUAL PROPERTY LAW FIRM (KR)
특허법인 태백 (KR)
특허법인 태백 (KR)
Download PDF:
Claims:
Previous Patent: HANDLE FOR COOKWARE
Next Patent: NETWORK LOAD DISTRIBUTION METHOD BETWEEN HETEROGENEOUS NETWORKS
Next Patent: NETWORK LOAD DISTRIBUTION METHOD BETWEEN HETEROGENEOUS NETWORKS