Title:
MULTI-ISSUE PROCESSOR SYSTEM AND METHOD
Document Type and Number:
WIPO Patent Application WO/2016/131428
Kind Code:
A1
Abstract:
Provided are a multi-issue processor system and method, which can fill an instruction into a high-speed memory capable of being directly accessed by a processor core before the processor core executes the instruction when being applied to the field of processors, to achieve a sky-high cache hit rate. According to the technical solution of the present invention, for a multi-issue processor system which needs to conduct instruction conversion, the repeated conversion of instruction addresses can also be avoided, thereby improving the performance of a multi-issue processor.
Inventors:
LIN KENNETH CHENGHAO (CN)
Application Number:
PCT/CN2016/074093
Publication Date:
August 25, 2016
Filing Date:
February 19, 2016
Export Citation:
Assignee:
SHANGHAI XINHAO MICROELECTRONICS CO LTD (CN)
International Classes:
G06F9/30
Foreign References:
| CN1687905A | 2005-10-26 | |||
| CN103226463A | 2013-07-31 | |||
| US20110154000A1 | 2011-06-23 |
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