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Title:
MULTI-LAYER INTERCONNECTED SPIRAL CAPACITOR
Document Type and Number:
WIPO Patent Application WO/2016/133685
Kind Code:
A3
Abstract:
An upper planar capacitor (204) is spaced above a lower planar capacitor (102) by a dielectric layer (201). A bridged-post inter-layer connector couples the capacitances in parallel, through first posts (210A,C) and second posts (210B,D). The first posts and second posts extend through the dielectric layer, adjacent the upper and lower planar capacitors. A first level coupler (106) extends under the dielectric layer and couples the first posts together and to a conductor of the lower planar capacitor, and couples another conductor of the lower planar capacitor to one of the second posts. A second level coupler (212) extends above the dielectric layer, and couples the second posts together and to a conductor of the upper planar capacitor, and couples another conductor of the upper planar capacitor to one of the first posts.

Inventors:
JOW UEI-MING (US)
SONG YOUNG KYU (US)
LEE JONG-HOON (US)
ZHANG XIAONAN (US)
Application Number:
PCT/US2016/016001
Publication Date:
November 24, 2016
Filing Date:
February 01, 2016
Export Citation:
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Assignee:
QUALCOMM INC (US)
International Classes:
H01L49/02; H01G4/33; H01L23/522; H01L23/64
Foreign References:
US20120326270A12012-12-27
US20140103490A12014-04-17
US20140374881A12014-12-25
US20070126078A12007-06-07
US20130277803A12013-10-24
US20140252543A12014-09-11
US20070057344A12007-03-15
US20140203404A12014-07-24
US20060061934A12006-03-23
US6661079B12003-12-09
US20070102788A12007-05-10
Attorney, Agent or Firm:
OLDS, Mark E. et al. (Geissler Olds & Lowe, P.C.,4000 Legato Road,Suite 31, Fairfax Virginia, US)
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