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Title:
MULTI-LAYER PRINTED CIRCUIT BOARD FOR USE IN A PLANAR TRANSFORMER
Document Type and Number:
WIPO Patent Application WO/2023/131417
Kind Code:
A1
Abstract:
Multi-layer printed circuit board for use in a planar transformer A multi-layer printed circuit board, PCB (100) for use in a planar transformer comprises a bottom face (101); a top face (102); at least one lateral face (103); at least one first metal layer (110) operating in a first voltage range and embedded in the multi-layer PCB above the bottom face, at least one second metal layer (120) operating in a second voltage range and, embedded in the multi-layer PCB above the at least one first metal layer, at least one planar insulation layer (130) and/or at least one lateral insulation layer (140). The planar insulation layer (130) is embedded in the multi-layer PCB (100) and configured to galvanically isolate and electrically insulate the first metal layer (110) from the second metal layer (120). The lateral insulation layer (140) is embedded in the multi-layer PCB and configured to galvanically isolate and electrically insulate the second metal layer (120) from a lateral environment (106).

Inventors:
GAONA DANIEL (DE)
PALM LASSE PETTERI (DE)
WIJEKOON PINIWAN (DE)
Application Number:
PCT/EP2022/050281
Publication Date:
July 13, 2023
Filing Date:
January 07, 2022
Export Citation:
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Assignee:
HUAWEI DIGITAL POWER TECH CO LTD (CN)
GAONA DANIEL (DE)
International Classes:
H01F27/28; H01F27/32; H01F41/04; H01F41/12; H05K1/02; H05K1/16; H05K3/46
Foreign References:
EP2682958A12014-01-08
US20180342349A12018-11-29
US20190088408A12019-03-21
DE102016204777A12017-09-28
Attorney, Agent or Firm:
KREUZ, Georg M. (DE)
Download PDF:
Claims:
CLAIMS:

1 . A multi-layer printed circuit board (100) for use in a planar transformer, the multilayer printed circuit board (100) comprising: a bottom face (101); a top face (102) opposing the bottom face (101); at least one lateral face (103); at least one first metal layer (110) embedded in the multi-layer printed circuit board (100) above the bottom face (101), the at least one first metal layer (110) being configured to conduct current, wherein the at least one first metal layer (110) is configured to operate in a first voltage range; at least one second metal layer (120) embedded in the multi-layer printed circuit board (100) above the at least one first metal layer (110), the at least one second metal layer (120) being configured to conduct current, wherein the at least one second metal layer (120) is configured to operate in a second voltage range, the second voltage range being at least partially different from the first voltage range; at least one planar insulation layer (130) and/or at least one lateral insulation layer (140), wherein the at least one planar insulation layer (130) is embedded in the multilayer printed circuit board (100) between the at least one first metal layer (110) and the at least one second metal layer (120), the at least one planar insulation layer (130) being configured to galvanically isolate and electrically insulate the at least one first metal layer (110) from the at least one second metal layer (120); wherein the at least one lateral insulation layer (140) is embedded in the multilayer printed circuit board (100) between the at least one second metal layer (120) and the at least one lateral face (103) of the multi-layer printed circuit board (100), the at least one lateral insulation layer (140) being configured to galvanically isolate and electrically insulate the at least one second metal layer (120) from a lateral environment (106) of the at least one second metal layer (120).

2. The multi-layer printed circuit board (100) of claim 1 ,

25 wherein the lateral insulation layer (140) extends at least in a portion lateral to the at least one second metal layer (120).

3. The multi-layer printed circuit board (100) of claim 1 or 2, comprising: a top insulation layer (121 ) formed at the top face (102) of the multi-layer printed circuit board (100), wherein the at least one second metal layer (120) is at least partially enclosed by insulation material of the top insulation layer (121 ), the planar insulation layer (130) and the lateral insulation layer (140).

4. The multi-layer printed circuit board (100) of any of the preceding claims, comprising: a lamination body (105) comprising at least one first printed circuit board (112) carrying the at least one first metal layer (110) and at least one second printed circuit board (122) carrying the at least one second metal layer (120), wherein the at least one first printed circuit board (112) and the at least one second printed circuit board (122) are embedded in the lamination body (105).

5. The multi-layer printed circuit board (100) of claim 4, wherein the lamination body (105) forms a single printed circuit board structure embedding multiple layers of printed circuit boards.

6. The multi-layer printed circuit board (100) of any of the preceding claims, comprising: at least one first via (501) filled with conductive material, the at least one first via (501 ) being configured to electrically connect a first metal layer (110) with an outer metal layer (503) and/or with another first metal layer (110b) of the at least one first metal layers (110, 110b) and/or at least one second via (502) filled with conductive material, the at least one second via (502) being configured to connect a second metal layer (120) with an outer metal layer (504) and/or with another second metal layer (120b) of the at least one second metal layers (120, 120b).

7. The multi-layer printed circuit board (100) of any of the preceding claims, wherein the at least one first metal layer (110) is configured to form windings of a first transformer; and wherein the at least one second metal layer (120) is configured to form windings of a second transformer.

8. The multi-layer printed circuit board (100) of any of the preceding claims, wherein the second voltage range is higher or at least one order of magnitude higher than the first voltage range.

9. The multi-layer printed circuit board (100) of any of the preceding claims, wherein the planar insulation layer (130) comprises one or a combination of a polymer-based and a ceramic-based insulation material, wherein a material of the planar insulation layer (130) is different from a material of at least one of a printed circuit board (112) carrying the at least one first metal layer (110) or a printed circuit board (122) carrying the at least one second metal layer (120) or a lamination layer (307) of the multi-layer printed circuit board (100).

10. A planar transformer (200), comprising: the multi-layer printed circuit board (100) according to any of the preceding claims; and a magnetic core (201 ) surrounding the multi-layer printed circuit board (100) at least partially.

11. A method for producing a multi-layer printed circuit board (100) for use in a planar transformer, the method comprising: providing a multilayer layup (304), the multi-layer layup (304) comprising a bottom face (101), a top face (102) opposing the bottom face (101 ), and at least one lateral face (103), the multilayer layup (304) comprising: at least one first metal layer (110) placed in the multi-layer layup (304) above the bottom face (101), the at least one first metal layer (110) being configured to conduct current, wherein the at least one first metal layer (110) is configured to operate in a first voltage range, and at least one second metal layer (120) placed in the multi-layer layup (304) above the at least one first metal layer (110), the at least one second metal layer (120) being configured to conduct current, wherein the at least one second metal layer (120) is configured to operate in a second voltage range, the second voltage range being at least partially different from the first voltage range; laminating the multilayer layup (304) to form the multi-layer printed circuit board (100) with at least one planar insulation layer (130) in the multilayer layup (304) before laminating the multilayer layup (304) and/or adding at least one lateral insulation layer (140) in the multi-layer printed circuit board (100) after laminating the multilayer layup (304), wherein the planar insulation layer (130) is formed in the multi-layer layup (304) between the at least one first metal layer (110) and the at least one second metal layer (120), the at least one planar insulation layer (130) being configured to galvanically isolate and electrically insulate the at least one first metal layer (110) from the at least one second metal layer (120); wherein the at least one lateral insulation layer (140) is formed in the multi-layer printed circuit board (100) between the at least one second metal layer (120) and the at least one lateral face (103), the lateral insulation layer (140) being configured to galvanically isolate and electrically insulate the at least one second metal layer (120) from a lateral environment (106) of the at least one second metal layer (120).

12. The method of claim 11 , wherein providing the multilayer layup (304) comprises: providing at least one first printed circuit board (112) and at least one second printed circuit board (122); structuring the at least one first printed circuit board (112) to form the at least one first metal layer (110) at the at least one first printed circuit board (112); structuring the at least one second printed circuit board (122) to form the at least one second metal layer (120) at the at least one second printed circuit board (112); and stacking up the at least one first printed circuit board (112) and the at least one second printed circuit board (122) with the planar insulation layer (130) between the at least one first printed circuit board (112) and the at least one second printed circuit board (122) to form the multilayer layup (304).

28

13. The method of claim 11 or 12, wherein forming the lateral insulation layer (140) comprises: routing slots in the multi-layer printed circuit board (100) between the at least one second metal layer (120) and the at least one lateral face (103); and filling the slots with insulation material or placing a prefabricated insulation piece into the slots to form the lateral insulation layer (140).

14. The method of claim 13, wherein the slots are routed from the top face (102) to the planar insulation layer (130) or from the top face (102) to the bottom face (101) of the multi-layer printed circuit board (100).

15. The method of any of claims 11 to 14, comprising : forming at least one first via (501 ), the at least one first via (501) extending from a first metal layer (110) to an outer metal layer (503) and/or to another first metal layer (110b) of the at least one first metal layers (110, 110b); and filling the at least one first via (501) with conductive material to electrically connect the first metal layer (110) with the outer metal layer (503) and/or the other first metal layer (110b); and/or forming at least one second via (502), the at least one second via (502) extending from a second metal layer (120) to an outer metal layer (504) and/or to another second metal layer (120b) of the at least one second metal layers (120, 120b); and filling the at least one second via (502) with conductive material to electrically connect the second metal layer (120) with the outer metal layer (503) and/or the other second metal layer (120b).

29

Description:
MULTI-LAYER PRINTED CIRCUIT BOARD FOR USE IN A PLANAR TRANSFORMER

TECHNICAL FIELD

The disclosure relates to the field of power electronics and planar transformers in power electronics applications. The disclosure particularly relates to a multi-layer printed circuit board (PCB) for use in a planar transformer, a planar transformer comprising such multilayer PCB and a method for producing such multi-layer PCB. More particularly, the disclosure relates to apparatus and methods for embedded insulation for high-voltage PCBs.

BACKGROUND

Planar transformers are used in low power/low voltage applications. However, their utilization in high-voltage (HV) and/or high-power (HP) is increasing every year. Examples of such applications are: High-voltage generators (capacitor charging, pulse generators, etc.); isolated gate-drive power supplies for medium-voltage converters; and power supplies interfacing HV and low-voltage (LV) circuits; e.g. solar-roof DC-DC converters.

The applicability of the planar transformer is limited among other reasons by the insulation requirements. To ensure safety, planar transformers used in the afore-mentioned applications need to withstand high voltages in normal operation and during commissioning (hi-pot & impulse tests). Typical voltage insulation requirements are specified in the standard IEC 62477-1 . A system operating at 1 kVdc shall withstand between 4 kV and 12 kV of impulse voltage. These voltages define in turn the minimum clearance and creepage levels as specified in the standard. The clearance and creepage distances can be up to several millimeters. This makes the design of compact/small planar transformers challenging. The problem is exacerbated when the application is critical and requires supplementary (reinforced) insulation which can double the necessary clearances/creepage distances.

SUMMARY

This disclosure provides an efficient and cost-effective solution for a compact planar transformer and a method for producing such a planar transformer that can withstand high voltages and can be used for the above-described applications. The foregoing and other objects are achieved by the features of the independent claims. Further implementation forms are apparent from the dependent claims, the description, and the figures.

The disclosure addresses the fundamental issues mentioned above. The disclosure provides a concept for a single-PCB structure with embedded HV planar and/or lateral insulation. While planar HV insulation reduces the distance between HV and LV traces, lateral insulation may be required to reduce the clearance and creepage distances from the HV-winding to the transformer body (core). Lateral insulation can also be extended to applications without a magnetic core. It can help to reduce the creepage and clearances requirements of HV-PCBs in general.

A basic idea presented in this disclosure is the concept of embedding the lateral insulation in a PCB with HV and LV traces. When combined with planar insulation, the HV traces are enclosed completely. The solution results in a single-PCB structure which ensures repeatability and easier interconnection between HV and LV PCBs (signals). The clearance and creepage distances can be largely reduced which results in wider AC traces for transformers, higher power densities, and higher efficiencies.

However, even with planar insulation alone as presented hereinafter, i.e., without lateral insulation, a single-PCB structure can be provided which ensures the above benefits, i.e., repeatability and easier interconnection between HV and LV PCBs (signals). The clearance and creepage distances can even be largely reduced with planar insulation alone, as described hereinafter, which results in wider AC traces for transformers, higher power densities, and higher efficiencies.

The solution disclosed hereinafter provides a single-PCB structure as opposed to the conventional 2-PCB structure where two separate PCBs are required including enough space between them in order to meet the requirements with respect to clearance and creepage distances.

The following benefits can be achieved with the disclosed single-PCB structure: Repeatability, easier interconnection between HV and LV traces, thinner insulation, a normal low-cost PCB process can be used. An embedded lateral and planar insulation results in: a reduction of clearance/creepage distances which facilitates compact designs and higher power densities; and wider HV traces which lowers the AC resistance which improves the power density and efficiency.

Even with embedded planar insulation alone, these benefits can be achieved.

In order to describe the disclosure in detail, the following terms, abbreviations and notations will be used:

PCB printed circuit board

HV high-voltage, in this disclosure between 100kV and above, for example

MV medium-voltage, in this disclosure between 1500V and 100kV, for example

LV low-voltage, in this disclosure below 1500V, for example

DC direct current

AC alternating current

In this disclosure, planar transformers are described. Planar transformers are high- frequency transformers used in isolated switch mode power supplies operating at high frequency. Planar transformers usually contain winding turns made of thin copper sheets riveted together at the ends of turns in the case of high current windings, or windings etched on a PCB in a spiral form. As the current conductors are thin sheets of copper, the operating frequency is not limited by skin effect. As such, high-power converters built with planar transformers can be designed to operate at relatively high switching frequencies, often 100 kHz or above. This reduces the size of required magnetic components and capacitors, thereby increasing power density.

Planar transformers are becoming mainstream in power electronics. Their main advantages are: LOW PROFILE: Similar to that of other power electronics components which results in more compact systems. LOW AC RESISTANCE: The PCB traces reduce AC resistance of windings at higher frequency which results in higher power density. SUPERIOR THERMAL DISSIPATION: The large surface-to-volume ratio improves its thermal dissipation capability. REPEATIBILITY: It is easier to control the parasitic elements (leakage inductance and stray capacitance). This is ideal for mass production.

According to a first aspect, the disclosure relates to a multi-layer printed circuit board for use in a planar transformer, the multi-layer printed circuit board comprising: a bottom face; a top face opposing the bottom face; at least one lateral face; at least one first metal layer embedded in the multi-layer printed circuit board above the bottom face, the at least one first metal layer being configured to conduct current, wherein the at least one first metal layer is configured to operate in a first voltage range; at least one second metal layer embedded in the multi-layer printed circuit board above the at least one first metal layer, the at least one second metal layer being configured to conduct current, wherein the at least one second metal layer is configured to operate in a second voltage range, the second voltage range being at least partially different from the first voltage range; at least one planar insulation layer and/or at least one lateral insulation layer, wherein the at least one planar insulation layer is embedded in the multi-layer printed circuit board between the at least one first metal layer and the at least one second metal layer, the at least one planar insulation layer being configured to galvanically isolate and electrically insulate the at least one first metal layer from the at least one second metal layer; wherein the at least one lateral insulation layer is embedded in the multi-layer printed circuit board between the at least one second metal layer and the at least one lateral face of the multi-layer printed circuit board, the at least one lateral insulation layer being configured to galvanically isolate and electrically insulate the at least one second metal layer from a lateral environment of the at least one second metal layer.

The multi-layer printed circuit board can also be part of a large PCB board that has also other features and sections.

Note that the insulation layers really separate (isolate and separate electrically the top and bottom part) the top and bottom side of the PCB boards from each other’s. All PCB layers are isolating but the additional layer provides enhanced isolation.

Such a multi-layer printed circuit board can be used as or within a planar transformer. The multi-layer printed circuit board is characterized by high power density, significantly reduced height, i.e., low profile, greater surface area, resulting in improved heat dissipation capability, greater magnetic cross-section area, enabling fewer turns, smaller winding area, a winding structure that facilitates interleaving, lower leakage inductance resulting from fewer turns and interleaved windings, less AC winding resistance, and excellent reproducibility, enabled by winding structure. The winding structure may be realized by the at least one first metal layer and/or the at least one second metal layer.

Such a multi-layer printed circuit board allows fulfilling the requirements for impulse withstand voltage and temporary overvoltage versus system voltage, the requirements for creepage distances for functional, basic, or supplementary insulation, and the requirements for clearance distances for functional, basic, or supplementary insulation according to the standard IEC 60664-1 for different working voltages.

In an exemplary implementation of the multi-layer printed circuit board, the lateral insulation layer extends at least in a portion lateral to the at least one second metal layer.

The vertical insulation layer, i.e., lateral insulation layer, can extend to different lengths, not necessarily until the planar insulation layer. It can cross the entire PCB or only a portion of it.

This provides the advantage of a flexible design according to the requirements for creepage distances and clearance distances, e.g., according to the standard IEC 60664-1 for different working voltages.

In an exemplary implementation of the multi-layer printed circuit board, the multi-layer printed circuit board comprises: a top insulation layer formed at the top face of the multilayer printed circuit board, wherein the at least one second metal layer is at least partially enclosed by insulation material of the top insulation layer, the planar insulation layer and the lateral insulation layer.

This provides the advantage of adequate isolation of the second metal layer, e.g., the high voltage section of the multi-layer PCB. Thus, requirements for creepage distances and for clearance distances can be efficiently fulfilled by such structure.

In an exemplary implementation of the multi-layer printed circuit board, the multi-layer printed circuit board comprises: a lamination body comprising at least one first printed circuit board carrying the at least one first metal layer and at least one second printed circuit board carrying the at least one second metal layer, wherein the at least one first printed circuit board and the at least one second printed circuit board are embedded in the lamination body.

This provides the advantage that the multi-layer PCB can be provided as a single PCB structure, i.e., the lamination body. The embedding of lateral and/or planar insulation layers in the lamination body together with the corresponding first and second metal layers results in a reduction of clearance/creepage distances which allows for compact designs and higher power densities. Besides, wider HV traces can be implemented which lowers the AC resistance which further improves the power density and efficiency. In an exemplary implementation of the multi-layer printed circuit board, the lamination body forms a single printed circuit board structure embedding multiple layers of printed circuit boards.

This provides the advantage that the embedding of multiple layers of PCBs results in a reduction of clearance/creepage distances which allows for compact designs and higher power densities; the HV traces, e.g., formed by the second metal layers, can be implemented which lowers the AC resistance which improves the power density and efficiency.

In an exemplary implementation of the multi-layer printed circuit board, the multi-layer printed circuit board comprises: at least one first via filled with conductive material, the at least one first via being configured to electrically connect a first metal layer with an outer metal layer and/or with another first metal layer of the at least one first metal layers and/or at least one second via filled with conductive material, the at least one second via being configured to connect a second metal layer with an outer metal layer and/or with another second metal layer of the at least one second metal layers.

This provides the advantage that different vias can be flexibly routed throughout the multilayer PCB allowing design flexibility.

The vias can be internal vias connecting the top and bottom layers of a single PCB layer within the multi-layer PCB. The vias can be also external vias connecting one or more layers of a PCB or of multiple PCBs with an outer metal layer. Internal vias can be interconnected with external vias.

In an exemplary implementation of the multi-layer printed circuit board, the at least one first metal layer is configured to form windings of a first transformer; and the at least one second metal layer is configured to form windings of a second transformer.

This provides the advantage that a planar transformer can be realized by such a multi-layer PCB. The planar transformer can be applied in HV/LV applications facilitating design complexity due to the use of a single structure PCB instead of two single separate PCBs.

In an exemplary implementation of the multi-layer printed circuit board, the second voltage range is higher or at least one order of magnitude higher than the first voltage range. This provides the advantage that the multi-layer PCB can be efficiently utilized in high- voltage (HV) and/or high-power (HP) applications such as high-voltage generators, e.g., capacitor charging, pulse generators, etc., isolated gate-drive power supplies for mediumvoltage converters; and power supplies interfacing HV and LV circuits, e.g., solar-roof DC- DC converters.

In an exemplary implementation of the multi-layer printed circuit board, the planar insulation layer comprises one or a combination of a polymer-based and a ceramic-based insulation material, wherein a material of the planar insulation layer is different from a material of at least one of a printed circuit board carrying the at least one first metal layer or a printed circuit board carrying the at least one second metal layer or a lamination layer of the multilayer printed circuit board.

This provides the advantage that the material of the planar insulation layer has improved isolation characteristics over common materials used in PCBs.

According to a second aspect, the disclosure relates to a planar transformer, comprising: the multi-layer printed circuit board according to the first aspect; and a magnetic core surrounding the multi-layer printed circuit board at least partially.

Such a planar transformer is characterized by high power density, significantly reduced height, i.e., low profile, greater surface area, resulting in improved heat dissipation capability, greater magnetic cross-section area, enabling fewer turns, smaller winding area, a winding structure that facilitates interleaving, lower leakage inductance resulting from fewer turns and interleaved windings, less AC winding resistance, and excellent reproducibility, enabled by winding structure.

According to a third aspect, the disclosure relates to a method for producing a multi-layer printed circuit board for use in a planar transformer, the method comprising: providing a multilayer layup, the multi-layer layup comprising a bottom face, a top face opposing the bottom face, and at least one lateral face, the multilayer layup comprising: at least one first metal layer placed in the multi-layer layup above the bottom face, the at least one first metal layer being configured to conduct current, wherein the at least one first metal layer is configured to operate in a first voltage range, and at least one second metal layer placed in the multi-layer layup above the at least one first metal layer, the at least one second metal layer being configured to conduct current, wherein the at least one second metal layer is configured to operate in a second voltage range, the second voltage range being at least partially different from the first voltage range; laminating the multilayer layup to form the multi-layer printed circuit board with at least one planar insulation layer in the multilayer layup before laminating the multilayer layup and/or adding at least one lateral insulation layer in the multi-layer printed circuit board after laminating the multilayer layup, wherein the planar insulation layer is formed in the multi-layer layup between the at least one first metal layer and the at least one second metal layer, the at least one planar insulation layer being configured to galvanically isolate and electrically insulate the at least one first metal layer from the at least one second metal layer; wherein the at least one lateral insulation layer is formed in the multi-layer printed circuit board between the at least one second metal layer and the at least one lateral face, the lateral insulation layer being configured to galvanically isolate and electrically insulate the at least one second metal layer from a lateral environment of the at least one second metal layer.

Such a method provides the same advantages as described above for the multi-layer PCB. That means, by such method a planar transformer can be produced which is characterized by high power density, significantly reduced height, i.e., low profile, greater surface area, resulting in improved heat dissipation capability, greater magnetic cross-section area, enabling fewer turns, smaller winding area, a winding structure that facilitates interleaving, lower leakage inductance resulting from fewer turns and interleaved windings, less AC winding resistance, and excellent reproducibility, enabled by winding structure.

In an exemplary implementation of the method, providing the multilayer layup comprises: providing at least one first printed circuit board and at least one second printed circuit board; structuring the at least one first printed circuit board to form the at least one first metal layer at the at least one first printed circuit board; structuring the at least one second printed circuit board to form the at least one second metal layer at the at least one second printed circuit board; and stacking up the at least one first printed circuit board and the at least one second printed circuit board with the planar insulation layer between the at least one first printed circuit board and the at least one second printed circuit board to form the multilayer layup.

This provides the advantage that these process steps correspond to process steps of standard PCBs. These process steps can be easily adapted to manufacture the multi-layer PCB. Structuring may include the process steps of drilling, plating, lithography processing and/or etching.

In an exemplary implementation of the method, forming the lateral insulation layer comprises: routing slots in the multi-layer printed circuit board between the at least one second metal layer and the at least one lateral face; and filling the slots with insulation material or placing a prefabricated insulation piece into the slots to form the lateral insulation layer.

This provides the advantage that these process steps can be easily performed since they are available in standard PCB manufacture.

Isolation can be done also with a prefabricated piece (placing and fixing the piece into the slot).

In an exemplary implementation of the method, the slots are routed from the top face to the planar insulation layer or from the top face to the bottom face of the multi-layer printed circuit board.

This provides the advantage that the slots for the lateral insulation layer can be flexible manufactured according to the application requirements.

In an exemplary implementation of the method, the method comprises: forming at least one first via, the at least one first via extending from a first metal layer to an outer metal layer and/or to another first metal layer of the at least one first metal layers; and filling the at least one first via with conductive material to electrically connect the first metal layer with the outer metal layer and/or the other first metal layer; and/or forming at least one second via, the at least one second via extending from a second metal layer to an outer metal layer and/or to another second metal layer of the at least one second metal layers; and filling the at least one second via with conductive material to electrically connect the second metal layer with the outer metal layer and/or the other second metal layer.

This provides the advantage that these process steps can be easily performed since they are available from standard PCB manufacture.

According to a fourth aspect, the disclosure relates to a computer program product including computer executable code or computer executable instructions that, when executed, causes at least one computer to execute the method according to the third aspect described above.

The computer program product may run on a controller of a production machine or robot for producing the multi-layer PCB according to the first aspect by using the method according to the third aspect.

According to a fourth aspect, the disclosure relates to a computer-readable medium, storing instructions that, when executed by a computer, cause the computer to execute the method according to the third aspect described above. Such a computer-readable medium may be a non-transient readable storage medium. The instructions stored on the computer- readable medium may be executed by a controller or processor of a production machine or robot for producing the multi-layer PCB according to the first aspect by using the method according to the third aspect.

BRIEF DESCRIPTION OF THE DRAWINGS

Further embodiments of the disclosure will be described with respect to the following figures, in which:

Figure 1 shows a cross-sectional view of a multi-layer printed circuit board 100 according to the disclosure;

Figure 2 shows a cross-sectional view of a planar transformer 200 according to the disclosure;

Figures 3a, 3b, and 3c show production steps of a method for producing a multi-layer printed circuit board 100 according to the disclosure;

Figure 4 shows a cross-sectional view 400a, 400c and a top view 400b, 400d of the multilayer printed circuit board 100 before 400a, 400b and after 400c, 400d construction with ubiquitous insulation according to an embodiment;

Figure 5 shows a cross-sectional view 500a, 500c and a top view 500b, 500d of the multilayer printed circuit board 100 before 500a, 500b and after 500c, 500d construction with localized insulation according to an embodiment; Figure 6 shows a cross-sectional view of a planar transformer 600 comprising a multi-layer printed circuit board 100 and a magnetic core 201 according to the disclosure; and

Figure 7 shows a schematic diagram illustrating a method 700 for producing a multi-layer printed circuit board 100 according to the disclosure.

DETAILED DESCRIPTION OF EMBODIMENTS

In the following detailed description, reference is made to the accompanying drawings, which form a part thereof, and in which is shown by way of illustration specific aspects in which the disclosure may be practiced. It is understood that other aspects may be utilized and structural or logical changes may be made without departing from the scope of the disclosure. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the disclosure is defined by the appended claims.

It is understood that comments made in connection with a described method may also hold true for a corresponding device or system configured to perform the method and vice versa. For example, if a specific method step is described, a corresponding device may include a unit to perform the described method step, even if such unit is not explicitly described or illustrated in the figures. Further, it is understood that the features of the various exemplary aspects described herein may be combined with each other, unless specifically noted otherwise.

The novel solution entails a single-PCB structure with embedded HV planar and/or lateral insulation. While planar HV insulation reduces the distance between HV and LV traces, lateral insulation reduces the clearance and creepage distances from the HV-winding to the transformer body (core). Lateral insulation can be used in applications with (Figure 2) or without a magnetic core (Figure 1 ). It helps to reduce the creepage and clearances requirements of HV-PCBs in general.

The novel solution can be based on either planar insulation or lateral insulation or both, planar and lateral insulation.

The overall structure of the novel solution is shown in Figures 1 and 2. HV PBC traces are separated from the LV traces by a localized (planar) insulation layer. Lateral insulation can also be included, which protects the magnetic core and reduces the creepage and clearance distances required to ensure safety. The top and bottom layers can also be insulated. Thus, the HV traces can be completely enclosed by insulation material.

In the following, the more general terms “first metal layer operating in a first voltage range” and “second metal layer operating in a second voltage range” are used to describe the LV and HV traces. The second voltage range (HV) is differentiated from the first voltage range (LV) in that the second voltage range is at least partially different from the first voltage range.

Figure 1 shows a cross sectional view of a multi-layer printed circuit board 100 according to the disclosure.

The multi-layer printed circuit board 100 can be used in a planar transformer, e.g., a planar transformer 200 as shown in Figure 2. Alternatively, a planar transformer can be formed with this multi-layer printed circuit board 100 without any magnetic core or by using any magnetic materials attached to the multi-layer printed circuit board 100.

The multi-layer printed circuit board 100 comprises: a bottom face 101 ; a top face 102 opposing the bottom face 101 ; at least one lateral face 103 (for example there may be four lateral faces 103).

The multi-layer printed circuit board 100 comprises: at least one first metal layer 1 10 embedded in the multi-layer printed circuit board 100 above the bottom face 101 , at least one second metal layer 120 embedded in the multi-layer printed circuit board 100 above the at least one first metal layer 1 10, at least one planar insulation layer 130 and/or at least one lateral insulation layer 140. That means the multi-layer printed circuit board 100 can have both, planar insulation layer 130 and lateral insulation layer 140. Alternatively, only planar insulation layer 130 may be implemented. Alternatively, only lateral insulation layer 140 may be implemented.

The at least one first metal layer 110 is configured to conduct current and it is configured to operate in a first voltage range. The at least one second metal layer 120 is configured to conduct current and it is configured to operate in a second voltage range. The second voltage range is at least partially different from the first voltage range. In the most relevant implementation, the first voltage range is a low voltage (LV) range or medium voltage (MV) range and the second voltage range is a high voltage (HV) range. The at least one planar insulation layer 130 is embedded in the multi-layer printed circuit board 100 between the at least one first metal layer 1 10 and the at least one second metal layer 120. The at least one planar insulation layer 130 is configured to galvanically isolate and electrically insulate the at least one first metal layer 110 from the at least one second metal layer 120.

The at least one lateral insulation layer 140 is embedded in the multi-layer printed circuit board 100 between the at least one second metal layer 120 and the at least one lateral face 103 of the multi-layer printed circuit board 100. The at least one lateral insulation layer 140 is configured to galvanically isolate and electrically insulate the at least one second metal layer 120 from a lateral environment 106 of the at least one second metal layer 120.

The multi-layer printed circuit board 100 can also be part of a large PCB board that has also other features and sections.

The lateral insulation layer 140 may, for example, extend at least in a portion lateral to the at least one second metal layer 120.

The multi-layer printed circuit board may comprise a top insulation layer 121 formed at the top face 102 of the multi-layer printed circuit board 100. The at least one second metal layer 120 may be at least partially enclosed by insulation material of the top insulation layer 121 , the planar insulation layer 130, and the lateral insulation layer 140.

The multi-layer printed circuit board 100 may comprise a lamination body 105 comprising at least one first printed circuit board 112 carrying the at least one first metal layer 110 and at least one second printed circuit board 122 carrying the at least one second metal layer 120. The at least one first printed circuit board 112 and the at least one second printed circuit board 122 are embedded in the lamination body 105.

In Figure 1 , there a two first printed circuit boards, 112 and 112b, and two second printed circuit boards 122, 122b. However, any other number of first printed circuit boards and second printed circuit boards may be used as well. The number of first printed circuit boards may be different from the number of second printed circuit boards.

The insulation layers 130 and 140 really separate (isolate and separate electrically the top and bottom part) the top and bottom side of the PCB boards 1 12, 122 from each other. While all PCB layers 112, 1 12b, 122, 122b shown in Figure 1 are isolating, the additional layer, i.e., the planar insulation layer 130, provides enhanced isolation, i.e., galvanically isolation and electrical insulation.

The lamination body 105 may form a single printed circuit board structure embedding multiple layers of printed circuit boards.

The multi-layer printed circuit board 100 may comprise at least one first via 501 (e.g., as shown in Figures 3b, 3c, 4 and 5) filled with conductive material. The at least one first via 501 is configured to electrically connect a first metal layer 1 10 with an outer metal layer 503, e.g., as shown in Figure 3c, and/or with another first metal layer 1 10b, e.g., as shown in Figure 3c, of the at least one first metal layers 1 10, 1 10b.

The multi-layer printed circuit board 100 may comprise at least one second via 502 filled with conductive material. The at least one second via 502 is configured to connect a second metal layer 120 with an outer metal layer 504 and/or with another second metal layer 120b of the at least one second metal layers 120, 120b, e.g., as shown in Figure 3c.

The at least one first metal layer 1 10 may be configured to form windings of a first transformer and the at least one second metal layer 120 may be configured to form windings of a second transformer.

The second voltage range may be higher than the first voltage range. In particular, the second voltage range may be at least one order of magnitude higher than the first voltage range.

For example, the first voltage range may be a low-voltage (LV) range, e.g., below 1500V. The second voltage range may be a high-voltage (HV) range, e.g., above 100kV, for example.

In another example, the first voltage range may be a medium-voltage (MV) range, e.g., between 1500V and 100kV. The second voltage range may be a high-voltage (HV) range, e.g., above 100kV, for example.

In another example, the first voltage range may be a low-voltage (LV) range, e.g., below 1500V. The second voltage range may be a medium-voltage (MV) range, e.g., between 1500V and 100kV. A material of the planar insulation layer 130 can be different from a material of at least one of a printed circuit board 1 12 carrying the at least one first metal layer 1 10 or a printed circuit board 122 carrying the at least one second metal layer 120 or a lamination layer 307 of the multi-layer printed circuit board 100.

The planar insulation layer 130 may comprises one or a combination of a polymer-based and a ceramic-based insulation material.

The materials used in this structure, i.e., the multi-layer printed circuit board 100, can be selected based on the voltage requirements of the application at hand.

For embedding the planar insulation 130, standard multilayer PCB processes of know high- quality can be used. These can be applied to both polymer-based and ceramic-based materials. From polymer-based materials, for example, polyimide is recommended as a candidate as its adhesion with respect to normal PCB material (e.g., FR4) is highly adequate. Polyimide is particularly important due to its adequate aging performance, flexibility, and high electric breakdown voltage (about 900 V/mil). This material is commonly used in semi-flex PCBs.

The insulation material can also be based on High Voltage Polyimide Film (HVPF), a very special printed circuit material developed by Sierra that has a dielectric breakdown of over 3000 V/mil. It can be used as a stand-alone thin material or be inserted into FR4 material boards to enhance the voltage characteristics. Other insulation materials can be based on Teflon or BT epoxy having a dielectric breakdown of about 1300 V/mil.

When using ceramic insulators, the adhesion to FR4 can be improved with an adhesion promoter such as silane coating. Other types of polymer materials and multilayer materials can be used as well. The material has to fulfill two main requirements. The isolation properties have to be good and stable during the whole life-time of the product and the material has to be compatible with PCB materials and PCB processes.

The type and dimensions of the insulation material can be selected based on the requirements of the standard IEC 60664-1 , e.g., based on Table 9 describing requirements for impulse withstand voltage and temporary overvoltage versus system voltage; Table 11 describing requirements for creepage distances for functional, basic, or supplementary insulation (millimeters); and/or Table 10 describing clearance e distances for functional, basic or supplementary insulation; or based on the standard IPC-2221 B describing requirements for the thickness of FR4 required for different working voltages.

For the lateral insulation, the insulating material can be applied using different techniques such as printing (liquid), lamination (thermosetting, thermoplastic), clueing (film, foil, preform), dispensing, or other suitable process. Diverse materials can be used depending on the method. Suitable candidates are silicone rubber, polyimide, fluoropolymer, preforms, isolation bonding sheet (e.g., Namics TC1203 or similar), or molding resin sheets. To avoid possible voids, vacuum lamination, vacuum printing, or separate vacuum treatment process might be used in some cases (e.g., a similar process that is used in via filling process). All proposed processes are normal processes that are commonly used in PCB or packaging industry and thus can be easily introduced and combined with the processes described in this disclosure.

Figure 2 shows a cross-sectional view of a planar transformer 200 according to the disclosure.

The planar transformer 200 comprises the multi-layer printed circuit board 100 described above with respect to Figure 1 ; and a magnetic core 201 surrounding the multi-layer printed circuit board 100 at least partially. The magnetic core 201 may be implemented as a closed shape that extends through one or more holes in the multi-layer printed circuit board 100.

The at least one first metal layer 1 10 may form a closed shape within the multi-layer printed circuit board 100 surrounding the magnetic core 201. Similarly, the at least one second metal layer 120 may form a closed shape within the multi-layer printed circuit board 100 surrounding the magnetic core 201 .

The magnetic core 201 may, for example, be formed in the shape of an Eight having two sections surrounding respective parts of the multi-layer printed circuit board 100, wherein a middle section of the Eight extends through a hole in the multi-layer printed circuit board 100 which may be located at a central position of the multi-layer printed circuit board 100.

Such a planar transformer 200 is characterized by high power density, significantly reduced height, i.e., low profile, greater surface area, resulting in improved heat dissipation capability, greater magnetic cross-section area, enabling fewer turns, smaller winding area, a winding structure that facilitates interleaving, lower leakage inductance resulting from fewer turns and interleaved windings, less AC winding resistance, and excellent reproducibility, enabled by winding structure.

The planar transformer 200 allows to fulfill the requirements for impulse withstand voltage and temporary overvoltage versus system voltage, the requirements for creepage distances for functional, basic, or supplementary insulation, and the requirements for clearance distances for functional, basic or supplementary insulation according to the standard IEC 60664-1 for different working voltages.

The planar transformer 200 can withstand high voltages in normal operation and during commissioning (hi-pot & impulse tests). Typical voltage insulation requirements according to the standard IEC 62477-1 can be fulfilled. For example, when operating at 1 kVdc, the planar transformer is able to withstand between 4 kV and 12 kV of impulse voltage or even higher.

Figures 3a, 3b and 3c show production steps of a method for producing a multi-layer printed circuit board 100 according to the disclosure.

The manufacturing method, also referred to as process flow, is shown with respect to production steps 1 ) to 10) in Figures 3a, 3b and 3c and explained below in detail. The process starts with the fabrication of several standard 2-layer PCBs following the standard simplified PCB process flow: 1 ) drilling 2) plating and 3) lithography and etching as shown in Figure 3a.

These layers (two or more) are then 4) stacked-up together along with insulation layers 307 between to form a multilayer layup 304 (typically FR4, but it can also be a different material if final product requires different properties) and additional insulating layer 307 and copper foil 308 on top 102 and bottom side 101 , as shown in Figure 3a. This is optional, it may be needed if vias between the layers are needed.

Then, in production step 5), see Figure 3b, the multilayer layup 304 is laminated in vacuum lamination press to form a single structure. This single structure may include, for example, a first PCB 122b, e.g., 2-layer PCB, a second PCB 122, e.g., 2-layer PCB, a third PCB 112, e.g., 2-layer PCB and a fourth PCB 112b, e.g., 2-layer PCB. The at least one first metal layer 1 10 may be any of the layers of the third PCB 1 12 or the fourth PCB 1 12b. The at least one second metal layer 120 may be any of the layers of the first PCB 122b or the second PCB 122. Afterwards, in production step 6) mechanical or laser drilling may be performed to drill vias 401 , 402 between the selected layers. These holes 401 , 402 can be drilled to the certain depth from the top 102 or bottom side 101 , or throughout the entire PCB, as shown for example for the first PCB 122b and the fourth PCB 1 12b, see Figure 3b.

In production step 7) electroless and electrochemical plating will then be used to fill the holes 401 , 402 with conductive material to form vias 501 , 502, see Figure 3b. Up to this point, planar insulation is guaranteed. If lateral insulation is not required, the process flow will stop here. Otherwise, in process step 8) slot routing will be performed to create the canals 403, 404 for the lateral insulation. These slots 403, 404 can be routed throughout the entire PCB stack-up or only for the section corresponding to the HV windings.

The slots 403, 404 are then filled in production step 9) with insulating material to form the lateral insulation layer 140, see Figure 3c. This can be done by means of printing, lamination, dispensing or other suitable processes. To minimize the risk of voids, vacuum lamination, vacuum printing or additional vacuum treatment can be used. If required, in process step 10), stencil or screen-printing process can be used but also etching and structuring can be applied to clear the insulation material from unwanted regions of the PCB by using water-blasting, plasma cleaning, mechanical brushing, chemical cleaning, or other similar processes, see Figure 3c. These are standard in normal PCB processing such as in via filling. In addition to the processes described above, other kinds of PCB processes can be used to manufacture the HV and LV layers and the final product

The application of the lateral insulation 140 can be localized to specific areas of the PCB as shown in Figure 5 or it can be applied to the entire PCB as shown in Figure 4. The latter is preferred as it simplifies the process flow.

Figure 4 shows a cross-sectional view 400a, 400c and a top view 400b, 400d of the multilayer printed circuit board 100 before 400a, 400b and after 400c, 400d construction with ubiquitous insulation according to an embodiment.

The left-hand side diagrams 400a, 400c depict the cross-sectional views of the single structure multi-layer PCB 100 while the right-hand side diagrams 400b, 400d depict the top views of the single structure multi-layer PCB 100. In diagrams 400a and 400b, the holes 403, 404 for the lateral insulation layer are shown, the PCB is in construction, e.g., corresponding to production step 8 of Figure 3b. In diagrams 400c and 400d, the holes 403, 404 are filled with conductive material forming the lateral insulation layer 140; the PCB is finished, e.g., corresponding to production step 10 of Figure 3c.

In this example, the single structure multi-layer printed circuit board 100 comprises a first section, e.g., HV section with first PCB 122b, e.g., 2-layer PCB and a second PCB 122, e.g., 2-layer PCB with respective HV traces corresponding to the at least one second metal layer 120 described above with respect to Figure 1 .

The single structure multi-layer printed circuit board 100 comprises a second section, e.g., LV section with a third PCB 1 12, e.g., 2-layer PCB and a fourth PCB 112b, e.g., 2-layer PCB with respective LV traces corresponding to the at least one first metal layer 110 described above with respect to Figure 1 .

The first section and the second section are isolated against each other by a planar insulation layer 130 as described above with respect to Figure 1 and isolated against the lateral environment by a lateral insulation layer 140 as described above with respect to Figure 1. The lateral insulation layer 140 is as described above with respect to Figure 1. The lateral insulation layer 140 ranges from the top side 102 to the bottom side 101 and provides a ubiquitous insulation.

Figure 5 shows a cross sectional view 500a, 500c and a top view 500b, 500d of the multilayer printed circuit board 100 before 500a, 500b and after 500c, 500d construction with localized insulation according to an embodiment.

The left-hand side diagrams 500a, 500c depict the cross-sectional views of the single structure multi-layer PCB 100 while the right-hand side diagrams 500b, 500d depict the top views of the single structure multi-layer PCB 100. In diagrams 500a and 500b, the holes 403, 404 for the lateral insulation layer are shown, the PCB is in construction, e.g., corresponding to production step 8 of Figure 3b. In diagrams 500c and 500d, the holes 403, 404 are filled with conductive material forming the lateral insulation layer 140; the PCB is finished, e.g., corresponding to production step 10 of Figure 3c.

As described above with respect to Figure 4, the single structure multi-layer printed circuit board 100 comprises a first section and a second section. The first section and the second section are isolated against each other by a planar insulation layer 130 as described above with respect to Figure 1 and isolated against the lateral environment by a lateral insulation layer 140 as described above with respect to Figure 1 . The lateral insulation layer 140 is as described above with respect to Figure 1 . The lateral insulation layer 140 ranges from the top side 102 down to the insulation layer 130 and not to the bottom side 101. The lateral insulation layer 140 provides a localized insulation.

Figure 6 shows a cross-sectional view of a planar transformer 600 comprising a multi-layer printed circuit board 100 and a magnetic core 201 according to the disclosure.

The planar transformer 600 comprises the multi-layer printed circuit board 100 described above with respect to Figure 1 ; and a magnetic core 201 surrounding the multi-layer printed circuit board 100 at least partially, as described above with respect to Figure 2. The magnetic core 201 may be implemented as a closed shape that extends through one or more holes in the multi-layer printed circuit board 100.

The at least one first metal layer 1 10 may form a closed shape within the multi-layer printed circuit board 100 surrounding the magnetic core 201. Similarly, the at least one second metal layer 120 may form a closed shape within the multi-layer printed circuit board 100 surrounding the magnetic core 201 .

Electrical components 601 , 602 may be connected to the first metal layer 110 and the second metal layer 120.

Compared to conventional planar transformers which require a structure with two separate PCBs and enough space between them in order to meet the requirements with respect to clearance and creepage distances, the novel planar transformer 600 can be implemented as a single PCB structure. This single PCB structure can be designed to meet the requirements with respect to clearance and creepage distances.

The novel single PCB structure can have wider HV traces resulting in lower AC resistance, shorter clearance and creepage distances as the conventional two-PCB structure. With the novel single PCB structure, easier interconnection between LV and HV sections can be achieved and a thinner planar insulation 130 can be applied than required for a conventional two-PCB structure.

The planar transformer 600 is characterized by high power density, significantly reduced height, i.e., low profile, greater surface area, resulting in improved heat dissipation capability, greater magnetic cross-section area, enabling fewer turns, smaller winding area, a winding structure that facilitates interleaving, lower leakage inductance resulting from fewer turns and interleaved windings, less AC winding resistance, and excellent reproducibility, enabled by winding structure.

Figure 7 shows a schematic diagram illustrating a method 700 for producing a multi-layer printed circuit board 100 according to the disclosure.

The method 700 comprises providing 701 a multilayer layup 304, e.g., as shown in Figure 3a. The multi-layer layup 304 comprises a bottom face 101 , a top face 102 opposing the bottom face 101 , and at least one lateral face 103.

The multilayer layup 304 comprises: at least one first metal layer 110 placed in the multilayer layup 304 above the bottom face 101 and at least one second metal layer 120 placed in the multi-layer layup 304 above the at least one first metal layer 1 10, e.g., as shown in Figure 3a.

The at least one first metal layer 1 10 is configured to conduct current and configured to operate in a first voltage range. The at least one second metal layer 120 is configured to conduct current and configured to operate in a second voltage range which is at least partially different from the first voltage range.

The method 700 comprises laminating 702 the multilayer layup 304, e.g., as shown in Figure 3b, to form the multi-layer printed circuit board 100 with at least one planar insulation layer 130 in the multilayer layup 304 before laminating the multilayer layup 304 and/or adding at least one lateral insulation layer 140 in the multi-layer printed circuit board 100 after laminating the multilayer layup 304. That means, a multi-layer printed circuit board 100 with or without lateral insulation layer 140 may be produced.

The planar insulation layer 130 is formed 703 in the multi-layer layup 304 between the at least one first metal layer 110 and the at least one second metal layer 120. The at least one planar insulation layer 130 is configured to galvanically isolate and electrically insulate the at least one first metal layer 110 from the at least one second metal layer 120, e.g. as described above with respect to Figures 1 to 5.

The at least one lateral insulation layer 140 is formed 703 in the multi-layer printed circuit board 100 between the at least one second metal layer 120 and the at least one lateral face 103. The lateral insulation layer 140 is configured to galvanically isolate and electrically insulate the at least one second metal layer 120 from a lateral environment 106 of the at least one second metal layer 120, e.g., as described above with respect to Figures 1 to 5.

Providing 701 the multilayer layup 304 may comprise the following production steps: providing at least one first printed circuit board 112 and at least one second printed circuit board 122; structuring the at least one first printed circuit board 1 12 to form the at least one first metal layer 110 at the at least one first printed circuit board 1 12; structuring the at least one second printed circuit board 122 to form the at least one second metal layer 120 at the at least one second printed circuit board 112; and stacking up the at least one first printed circuit board 1 12 and the at least one second printed circuit board 122 with the planar insulation layer 130 between the at least one first printed circuit board 112 and the at least one second printed circuit board 122 to form the multilayer layup 304.

Forming 703 the lateral insulation layer 140 may comprises the following production steps: routing slots in the multi-layer printed circuit board 100 between the at least one second metal layer 120 and the at least one lateral face 103, e.g. as described above with respect to Figure 3b, production step 8); and filling the slots with insulation material or placing a prefabricated insulation piece into the slots to form the lateral insulation layer 140, e.g. as described above with respect to Figure 3c, production step 9).

The slots may be routed from the top face 102 to the planar insulation layer 130 as shown in Figure 5 or from the top face 102 to the bottom face 101 of the multi-layer printed circuit board 100, as shown in Figure 4.

The method 700 may comprise: forming at least one first via 501 , e.g., as shown in Figure 3b, steps 6) and 7), the at least one first via 501 extending from a first metal layer 110 to an outer metal layer 503 and/or to another first metal layer 110b of the at least one first metal layers 110, 110b; and filling the at least one first via 501 with conductive material, e.g., as shown in Figure 3b, step 7) to electrically connect the first metal layer 110 with the outer metal layer 503 and/or the other first metal layer 110b; and/or forming at least one second via 502, e.g., as shown in Figure 3b, steps 6) and 7), the at least one second via 502 extending from a second metal layer 120 to an outer metal layer 504 and/or to another second metal layer 120b of the at least one second metal layers 120, 120b; and filling the at least one second via 502 with conductive material, e.g., as shown in Figure 3b, step 7), to electrically connect the second metal layer 120 with the outer metal layer 503 and/or the other second metal layer 120b.

While a particular feature or aspect of the disclosure may have been disclosed with respect to only one of several implementations, such feature or aspect may be combined with one or more other features or aspects of the other implementations as may be desired and advantageous for any given or particular application. Furthermore, to the extent that the terms "include", "have", "with", or other variants thereof are used in either the detailed description or the claims, such terms are intended to be inclusive in a manner similar to the term "comprise". Also, the terms "exemplary", "for example" and "e.g." are merely meant as an example, rather than the best or optimal. The terms “coupled” and “connected”, along with derivatives may have been used. It should be understood that these terms may have been used to indicate that two elements cooperate or interact with each other regardless of whether they are in direct physical or electrical contact, or they are not in direct contact with each other.

Although specific aspects have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that a variety of alternate and/or equivalent implementations may be substituted for the specific aspects shown and described without departing from the scope of the disclosure. This application is intended to cover any adaptations or variations of the specific aspects discussed herein. Although the elements in the following claims are recited in a particular sequence with corresponding labeling, unless the claim recitations otherwise imply a particular sequence for implementing some or all of those elements, those elements are not necessarily intended to be limited to being implemented in that particular sequence.

Many alternatives, modifications, and variations will be apparent to those skilled in the art in light of the above teachings. Of course, those skilled in the art readily recognize that there are numerous applications of the disclosure beyond those described herein. While the disclosure has been described with reference to one or more particular embodiments, those skilled in the art recognize that many changes may be made thereto without departing from the scope of the disclosure. It is therefore to be understood that within the scope of the appended claims and their equivalents, the disclosure may be practiced otherwise than as specifically described herein.