Siddharth Maru

Zhaohui He

Mohit Sood

CROSS-REFERENCE TO RELATED APPLICATION

[001] This application claims the benefit of U.S. Patent Application No. 13/715,914, filed December 14, 2012, which claims the benefit of U.S. Provisional Application No.

61/570,554, filed December 14, 201 1, both of which are incorporated by reference in their entireties.

BACKGROUND OF THE INVENTION

Field of the Invention

[002] The present invention relates in general to the field of electronics, and more specifically to a system and method that provides multi-mode flyback control for a switching power converter.

DESCRIPTION OF THE RELATED ART

[003] Many electronic systems utilize switching power converters to efficiently convert power from one source into power useable by a device (referred to herein as a "load"). Some facilities, such as homes and buildings, include light source dimming circuits (referred to herein as a "dimmer"). Dimmers control the power delivered to a load, such as a lamp having one or more light sources. Dimming saves energy and, in a lighting installation, also allows a user to adjust the intensity of the light source to a desired level.

[004] A switching power converter is controlled by a controller. For systems that are not intended for use with dimmers, the controller provides power factor correction for displacement and distortion so that the phases of an alternating current (AC) supply voltage and an average input current to the switching power converter are approximately in-phase (power factor displacement) and the current shape follows the shape of the supply voltage (power factor distortion). For systems that include dimmers and constant current loads, the controller controls the switching power converter to provide a constant, average input current to the load without regard to power factor correction.

[005] Figure 1 depicts an electronic system 100 that converts power from voltage supply 102 into power usable by load 104. Load 104 is a constant current load that includes, for example, one or more light emitting diodes (LEDs). A controller 106 controls the power conversion process. Voltage source 102 can be any type of voltage source such as a public utility supplying a 60 Hz/1 10 V input voltage VIN in North America or a 50 Hz/220 V input voltage VIN in Europe or the People's Republic of China, or a DC voltage source supplied by a battery or another switching power converter. The dimmer 103 phase cuts the supply voltage VSUPPLY, and the full-bridge rectifier 105 rectifies the phase-cut supply voltage to generate a rectified phase-cut input voltage VIN to the flyback-type switching power converter 1 10. In at least one embodiment, the dimmer 103 is a triac -based dimmer.

[006] The controller 106 provides a pulse width modulated (PWM) control signal CSo to current control switch 108 in a flyback-type, switching power converter 1 10 to control the conversion of input voltage VIN into a primary-side voltage Vp and secondary voltage Vs. When the switch 108 is non-conductive, i.e. "off, the primary voltage Vp is N times the secondary voltage Vs, i.e. Vp = N-Vs, and "N" is a ratio of turns in the primary-winding 114 to the turns in the secondary-winding 118. The switch 108 is, for example, a field effect transistor (FET). When control signal CSo causes switch 108 to conduct, a primary-side current ½ flows into a primary-winding 1 14 of transformer 1 16 to energize the primary- winding 114. When switch 108 conducts, the diode 120 is reverse biased, and the secondary- side current i _s is zero. When control signal CSo opens switch 108, the primary voltage Vp and secondary voltage Vs reverse the indicated polarities, and diode 120 is forward biased. When diode 120 is forward biased, the secondary side current i _s flows through the diode 120 to charge capacitor 122 so that an approximately constant current and direct current (DC) voltage VLD is provided to the load 104. Since the dimmer 103 is present, the controller 106 controls the input current ½ as a constant current. SUMMARY OF THE INVENTION

[007] In one embodiment of the present invention, a method includes detecting whether a dimmer is phase cutting an input voltage to a switching power converter and operating the switching power converter in a first mode if the dimmer is detected. The method further includes operating the switching power converter in a second mode if the dimmer is not detected and transitioning between operating the switching power converter in the first mode and the second mode if a status of detection of the dimmer changes.

[008] In another embodiment of the present invention, an apparatus includes to control a switching power converter. The controller is configured to detect whether a dimmer is phase cutting an input voltage to a switching power converter and operate the switching power converter in a first mode if the dimmer is detected. The controller is further configured to operate the switching power converter in a second mode if the dimmer is not detected and transition between operating the switching power converter in the first mode and the second mode if a status of detection of the dimmer changes.

[009] In a further embodiment of the present invention, an apparatus includes a switching power converter and a controller coupled to the switching power converter. The controller is configured to detect whether a dimmer is phase cutting an input voltage to a switching power converter and operate the switching power converter in a first mode if the dimmer is detected. The controller is further configured to operate the switching power converter in a second mode if the dimmer is not detected and transition between operating the switching power converter in the first mode and the second mode if a status of detection of the dimmer changes.

[0010] In another embodiment of the present invention, an apparatus includes a switching power converter and a controller coupled to the switching power converter. The controller includes a dimmer detector and the dimmer detector generates a dimmer detection output that controls operational characteristics of the switching power converter in one of at least two different operational modes depending on whether the detector detects a dimmer.

BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The present invention may be better understood, and its numerous objects, features and advantages made apparent to those skilled in the art by referencing the accompanying drawings. The use of the same reference number throughout the several figures designates a like or similar element.

[0012] Figure 1 (labeled prior art) depicts an electronic system that provides either power factor correction or a constant current.

[0013] Figure 2 depicts an electronic system having a controller that operates a switching power converter in any of multiple input current control modes.

[0014] Figure 3 depicts a functional multi-mode operational diagram for the controller of Figure 2.

[0015] Figure 4 depicts exemplary dimmer mode and no dimmer mode waveforms.

[0016] Figure 5 depicts an embodiment of the electronic system of Figure 2.

[0017] Figure 6 depicts an embodiment of a multi-mode current controller.

[0018] Figure 7 depicts exemplary waveforms associated with one embodiment of the controller of Figure 6.

[0019] Figure 8 depicts an exemplary switching power converter current controller. DETAILED DESCRIPTION

[0020] In at least one embodiment, an electronic system and method includes a controller to control a switching power converter in at least two different modes of operation depending on whether the controller detects a dimmer or not and/or if a current being drawn by the switching power converter should be reduced to optimize efficiency of the system by reducing power dissipation. In at least one embodiment, the controller detects whether a dimmer is phase cutting an input voltage to a switching power converter. The controller operates the switching power converter in a first mode if the dimmer is detected, and the controller operates the switching power converter in a second mode if the dimmer is not detected. The controller also transitions between operating the switching power converter in the first mode and the second mode if a status of detection of the dimmer changes. In at least one embodiment, in the first mode the controller operates the switching power converter to draw a substantially constant average input current to the switching power converter averaged for an approximately constant dimmer level (referred to as a "constant input current control mode" or "Dimmer Mode") while a switching power converter control signal is active. The switching power converter control signal is active when the control signal regularly changes logical states. In at least one embodiment, the controller operates the switching power converter to draw an input current to the switching power converter to provide power factor correction (referred to as "PFC control mode" or "No Dimmer Mode"). In at least one embodiment, the controller also operates in a High Power Mode to provide a current to a load by combining current control operations from the Dimmer Mode and the No Dimmer Mode. In at least one embodiment, a dimmer is considered to be "not detected" if the input voltage is substantially passed by the dimmer. In at least one embodiment, the input voltage to the switching power converter is a rectified version of a supply voltage. Thus, in this embodiment, a cycle of the input voltage represents a half-line cycle of the supply voltage. In at least one embodiment, the input voltage is substantially passed by the dimmer if, in at least one embodiment, at least 160 degrees of a cycle of the input voltage is passed, in another embodiment at least 170 degrees of a cycle of the input voltage is passed, or in another embodiment all of a cycle of the input voltage is passed.

[0021 ] Having a multi-mode current control allows the controller to obtain operational efficiencies. In at least one embodiment, the controller operates the switching power converter differently depending on whether the switching power converter is operating in Dimmer Mode or No Dimmer Mode, and each mode has different areas of power usage. For example, in at least one embodiment, for a flyback-type switching power converter, when the controller detects a dimmer, during an active control signal period the controller causes the flyback switching power converter to pull a pre-programmed constant average input current greater than a dimmer hold current to help ensure that a triac -based dimmer does not disconnect and mis-fire. When a dimmer is not detected, the controller operates the flyback switching power converter in No Dimmer Mode and shapes an input current to follow an input supply voltage. In at least one embodiment, a dimmer is detected when the dimmer is phase cutting a supply voltage. Furthermore, in at least one embodiment, the controller transitions between the Dimmer Mode and No Dimmer Mode without abruptly changing an amount of charge delivered to a load, which avoids power surges as indicated by, for example, flicker in a light source. Thus, in at least one embodiment, the capability to operate in at least constant input current control mode, PFC control mode, and to transition between the two modes allows the system to optimize system performance in both the dimmer and no- dimmer cases. [0022] In at least one embodiment, the controller operates the switching power converter in a "High Power Mode", which combines current control from the Dimmer Mode and the No Dimmer Mode. In at least one embodiment, operating in the High Power Mode allows the current to reduce an average input current and shape the input current to provide power factor correction. In at least one embodiment, the High Power Mode extends an active period of the switching power converter control signal to approximately match a complete half line cycle of a supply voltage to the switching power converter. In at least one embodiment, operating in the High Power Mode improves efficiency while maintaining output current regulation.

[0023] Figure 2 depicts an electronic system 200 having a controller 202 that operates the switching power converter 204 in any of multiple input current control modes depending on, for example, whether the controller 202 detects a presence of the optional dimmer 206 or not. The term "optional" is used because the dimmer 206 may be present and actively phase-cuts the supply voltage VSUPPLY, may be present and may not phase-cut the supply voltage VSUPPLY, or may be absent from the system 200. The switching power converter 204 can be any type of switching power converter such as a flyback, boost, buck, boost-buck, or Ciik type switching power converter. The electronic system 200 receives power from a voltage supply 204. The voltage supply 204 is an AC supply and, in at least one embodiment, is identical to voltage supply 102 (Figure 1). The dimmer 206 phase cuts the supply voltage VSUPPLY, and the full-bridge diode rectifier 208 rectifies the phase-cut supply voltage VSUPPLY to generate the phase-cut input voltage VIN. The dimmer 206 can be any type of dimmer, and, in at least one embodiment, the dimmer 206 is a triac -based dimmer. In other embodiments, the dimmer 206 is an electronic dimmer that uses well-known components such as high power field effect transistors (FETs) to phase-cut the supply voltage VSUPPLY- The dimmer 206 can be disabled by asserting the disable signal D/A so that the input voltage VIN is not phase-cut.

[0024] The controller 202 includes a switching power converter current controller 210 to generate a control signal CS to control conductivity of switch 212. In at least one embodiment, the control signal CS is a pulse modulated signal, and the switch 212 is a FET. When the switch 212 conducts, the input current ii _N flows through the switching power converter 204, the switch 212 and the sense resistor 214. Controlling the input current ½ controls the output current ί ₀ υτ of the switching power converter 204, which controls the load voltage VLD to the load 216. The load 216 can be any type of load, including one or more lamps having one or more light emitting diodes.

[0025] The controller 202 also includes a multi-mode current controller 218. In at least one embodiment, the multi-mode current controller 218 allows the system 200 to operate in at least two different current control modes of operation. As subsequently described in more detail, in at least one embodiment, the amount of charge QPUSHED provided to the load 216 from switching power converter 204 depends on the value of the peak current ΪΡΕΑΚ of the input current ii _N . The peak current ΪΡΕΑΚ value depends on the pulse width Tl, the period TT, and, the decay time T2 of the secondary-side current is for each cycle of the switch control signal CS.

[0026] Figure 3 depicts a functional multi-mode operational diagram 300 that conceptually depicts embodiments of multi-mode operations of multi-mode current controller 218 and switching power converter current controller 210 for controlling the switching power converter 204. Referring to Figures 2 and 3, in at least one embodiment, the controller 202 operates the switching power converter 204 in the Dimmer Mode, No Dimmer Mode, a Transition Mode to transition between the Dimmer Mode and No Dimmer Mode depending on whether and when the controller 202 detects the dimmer 206 or not and in a High Power Mode if the load 216 generally demands a high input current. In at least one embodiment, the quantitative measure of "high" is a matter of design choice, and, in at least one embodiment, is determined during manufacture of the system 200 that includes controller 202. In at least one embodiment, a high current is a current greater than or equal to 20mA. In at least one embodiment, the controller 202 includes a dimmer detector 203 to detect whether the dimmer 206 is substantially phase cutting the input voltage VIN to the switching power converter 204. U.S. Patent Application No. 13/077,483, entitled "Dimmer Detection", inventors Robert T. Grisamore, et al, filing date March 31, 201 1, and assignee Cirrus Logic, Inc. describes exemplary embodiments of detecting a dimmer. U.S. Patent Application No. 13/077,483 is hereby incorporated by reference in its entirety. The dimmer detector 203 generates an output signal DD to notify the multi-mode current controller 218 if a dimmer is detected or not.

[0027] The controller 202 operates the switching power converter 204 in a first mode if the dimmer 206 is detected, and the controller 202 operates the switching power converter 204 in a second mode if the dimmer 206 is not detected. The controller 202 also transitions between operating the switching power converter 204 in the first mode and the second mode if a status of detection of the dimmer 206 changes. In at least one embodiment, in the first mode the controller 202 operates the switching power converter 204 to draw a substantially constant average input current ½ to the switching power converter 204 for each cycle of the input voltage V _IN when the control signal CS is active, averaged for an approximately constant dimmer level (referred to as a "constant input current control mode" or "Dimmer Mode"). A half cycle of the supply voltage VSU _PPLY equals a cycle of the rectified input voltage V _I N. In at least one embodiment, during the No Dimmer Mode, the controller 202 operates the switching power converter 204 to shape the input current ii _N to the switching power converter 204 to provide power factor correction. Furthermore, in at least one embodiment, the controller 202 transitions, in a Transition Mode, between the Dimmer Mode and No Dimmer Mode without abruptly changing an amount of charge delivered to the load 216, which avoids power surges as indicated by, for example, flicker in a light source load 216. Thus, in at least one embodiment, the capability to operate in at least Dimmer Mode, No Dimmer Mode, and to transition between the two modes allows the system to optimize system performance whether a dimmer 206 is detected or not.

[0028] The functional multi-mode operational diagram 300 depicts a conceptual process 302 that receives three mode inputs. If Dimmer Mode is selected based on detection of the dimmer 206, the first input, DIMMER MODE indicates that the controller 202 will determine the peak input current Ϊ _ΡΕΑ in accordance with a Dimmer Mode control process, and switching power converter current controller 210 will determine the switch control signal CS in accordance with a peak input current Ϊ _ΡΕΑΚ equal to Ϊ _{ΡΕΑ DIMMER} - If NO Dimmer Mode is selected based on the absence of detecting dimmer 206, the second input, NO DIMMER MODE indicates that the controller 202 will determine the peak input current Ϊ _ΡΕΑ in accordance with a No Dimmer Mode control process, and the switching power converter current controller 210 will determine the switch control signal CS in accordance with a peak input current Ϊ _ΡΕΑ equal to Ϊ _ΡΕΑ NO _DIMMER . If TRANSITION MODE is selected based on detection of the dimmer 206 followed by no detection or vice versa, the first and second inputs combine to indicate that the controller 202 will determine the peak current Ϊ _ΡΕΑ in accordance with a Transition Mode process, and the switching power converter current controller 210 will determine the switch control signal CS in accordance with a peak input current Ϊ _ΡΕΑ representing a transitioning combination of the Ϊ _ΡΕΑ NO _DIMMER and ipEA NO DIMMER values. The current transition module 304 provides a smooth transition between the Dimmer Mode and the No Dimmer Mode so that, in at least one embodiment, the switching power converter current controller 210 controls the output current ί ₀ υτ of switching power converter 204 in Fig. 2 without any significant discontinuities. If operated in High Power Mode, the control signal CS is determined using current control operations from both the Dimmer Mode and No Dimmer Mode current control operations and, thus, uses a combination of the ΪΡΕΑ NO DIMMER and ΪΡΕΑ NO DIMMER values. In at least one

embodiment, the values of ΪΡΕΑ NO DIMMER and ΪΡΕΑ NO DIMMER are summed together to form the combination. Thus, the controller 202 operates the switching power converter 204 differently depending on whether the switching power converter 204 is Dimmer Mode, No Dimmer Mode, Transition Mode, or High Power Mode.

[0029] Figure 4 depicts exemplary no-dimmer and dimmer current control waveforms 400. Waveforms 402 represent No Dimmer Mode waveforms and specifically represent a cycle of the rectified input voltage VIN (which is a half line cycle of the supply voltage VSUPPLY), shaped input current and an active control signal CS. Waveforms 404 represent an exemplary Dimmer Mode input line cycle of the voltage VIN, constant average input current iiN while the control signal CS is active. The frequency of the rectified input voltage VIN is generally 100-120Hz, and the frequency of the control signal CS and, thus, the modulated input current iiN is generally greater than 10kHz and often greater than 20kHz-25kHz, such as lOOkHz, to avoid audible frequencies. Waveforms 402 and 404 depict a low frequency control signal CS and modulated input current ½ for purposes of illustration. Each cycle of the control signal CS has a period TT, a pulse width Tl (logical 1 value), and an off time T2 (logical 0 value). At the point 406, the switching power converter 204 has pushed sufficient charge to the load 216, and the switching power converter current controller 210 drives the control signal CS to a logical 0 until an end of the cycle of the input voltage VIN. In the Dimmer Mode waveforms 404, the cycle of the input voltage VIN begins at time to and ends at the zero crossing time t2. The dimmer 206 passes the input voltage VIN from the leading edge at time until Ϊ2. In waveforms 404, the cycle of the input voltage VIN is a half line cycle of the supply voltage VSUPPLY, and, thus, the cycle of the input voltage is 180° of the half line cycle of the supply voltage VSUPPLY- The beginning of the cycle of the input voltage VIN at time t ₀ is 0°, the peak 408 is 90°, and the end is 180° with all other portions of the input voltage VIN residing from 0° to 180°. In the depicted waveforms 404, the leading edge at time ti occurs prior to the peak 408 of the input voltage VIN, and, thus, the dimmer 206 passes more than 90° of the input voltage VIN.

[0030] In the Dimmer Mode waveforms 404, the control signal CS is active when periodically changing states to cause the input current ¾N to rise to the peak value IPEAK. The control signal CS is inactive after sufficient charge has been delivered to the load 216. In at least one embodiment, the "sufficient charge" is an amount of charge equal to a target charge QTARGET as illustratively defined in Equation 2 below. The input current ½ maintains an approximately constant average value while the control signal CS is active.

[0031] Referring to Figures 2 and 4, during time TI, the modulated input current ¾N rises to a peak value ΪΡΕΑ at the end of time TI . During time T2, the modulated input current ½ is approximately OA. For a flyback type switching power converter 204, energy is transferred to the load 216 during the period T2. In the No Dimmer Mode, the peak value ΪΡΕΑ of the input current ½ tracks the shape of the shape of the input voltage VIN waveform in accordance with the second term of Equation 1 below to provide power factor correction. In the Dimmer Mode, the peak value ΪΡΕΑ is controlled to in accordance with the first term of Equation 1 below to provide an approximately constant average current ίουτ to the load 216 during when the control signal CS is active. The number of pulses M of the control signal CS during the active time corresponds to a particular dimmer level indicated by the phase-cut angle of the input voltage VIN. Thus, in at least one embodiment, the amount of charge provided to the load 216 is determined by a level of the constant average input current ¾N and the number of cycles M of the control signal CS during a cycle of the input voltage VIN.

[0032] Figure 5 depicts an electronic system 500 that includes a controller 502, which respectively represents embodiments of the electronic system 200 and controller 202. The controller 502 includes a multi-mode current controller 504 and a switching power converter current controller 506, which respectively represent embodiments of the multi-mode current controller 218 and the switching power converter current controller 210. The controller 502 controls the flyback switching power converter 508. The flyback switching power converter 508 represents one embodiment of the switching power converter 204. In at least one embodiment, the electrical processes of transferring energy from the primary-winding 114 of transformer 1 16 to the secondary-winding 1 18 and load 216 are as previously described in conjunction with the switching power converter 110 of Figure 1. FET 510 represents one embodiment of the switch 212, and switch control signal CS2 represents one embodiment of the switch control signal CS of Figure 2.

[0033] In general, the multi-mode current controller 500 determines the peak current ΪΡΕΑ so that the load 216 receives an amount of charge QPUSHED that is commensurate with (i) a dimming level from dimmer 206, if a dimmer 206 is detected, (ii) power factor correction when no dimmer 206 is detected, (iii) a smooth transition between the Dimmer Mode and No Dimmer Mode during a Transition Mode, and (iv) an amount of current to be provided to a load during a High Power Mode. When the controller 502 detects the presence of the dimmer 206, the controller 502 operates the flyback switching power converter 508 in Dimmer Mode so that the input current ¾N has an approximately constant average value during an active time of the control signal CS ₂ . In Dimmer Mode, the controller 502 generates the control signal CS ₂ so that the average constant input current ¾N is greater than a dimmer hold current to help ensure that the dimmer 206 does not disconnect and mis-fire. In at least one embodiment, the average constant input current ¾N is set by a target average input current value IIN AVG τ. The value of the target average input current value iiN AVG τ can be set in any manner, such as providing the value as parameter data 509 via a programmable input, a wireless input, or a resistance value of an attached resistor. In at least one embodiment, the target average input current value iiN AVG τ is set to be greater than a hold current value of the dimmer 206. When the controller 502 does not detect the dimmer 206, the controller 502 operates the flyback switching power converter 508 in No Dimmer Mode and shapes the input current ¾N to follow the input voltage VIN. In at least one embodiment, in the No Dimmer Mode, the dimmer 206 is present but is not actively phase cutting the supply voltage VSUPPLY, and, thus, the dimmer 206 is not detected by the controller 202. The controller 502 shapes the input current ¾N shaping using primary-winding control by sensing the input voltage VIN and the flyback time T2 to determine the appropriate peak value ΪΡΕΑ of the input current ½. In at least one embodiment, a dimmer 206 is considered to be "not detected" if the input voltage VIN is substantially passed by the dimmer 206. The particular value of the amount of the input voltage VIN that is passed for the controller 502 to consider the dimmer 206 is a matter of design choice. In at least one embodiment, the input voltage VIN is substantially passed by the dimmer if, in at least one embodiment, at least 160 degrees of a cycle of the input voltage VIN is passed, in at least one embodiment at least 170 degrees of a cycle of the input voltage V _I N is passed, or in at least one embodiment all (i.e. 180°) of a cycle of the input voltage V _I N is passed.

[0034] In at least one embodiment, in general the amount of charge that is transferred from the primary-winding 1 14 to the secondary-winding 1 18 and, thus, to load 216 depends on a peak value I _PEAK of the input current i _m per cycle of the control signal CS ₂ and the number M cycles of the control signal CS ₂ during a cycle of the input voltage V _IN . In at least one embodiment, the multi-mode current controller 504 determines the peak current value Ϊ _ΡΕΑ in accordance with Equation 1 :

Equation 1

iiN _{AVG T} represents the average target value of the input current ii _N .

TT = switching period of the control signal CS ₂ measured from a previous cycle of the control signal CS ₂ .

Tl is the pulse width of the control signal CS ₂ measured from a previous cycle of the control signal CS ₂ .

V _IN is the input voltage to the switching power converter 508.

V _{IN PEAK} is the peak input voltage during a switching cycle of the control signal CS ₂ .

Q _e is a charge integration error as subsequently discussed.

he first term of Equation 1, and

[0035] The multi-mode current controller 504 provides the peak current value I _PEA to the switching power converter current controller 506. The switching power converter current controller 506 also monitors the value of sense current I _SENSE to determine when the input current ¾N has reached the peak value I _PEAK or approximately the peak value I _PEAK to take into consideration latencies in the determination of the value of input current The switching power converter 506 changes the value of the control signal CS ₂ to a logical 0 to turn OFF switch 510 when the input current ii _N reaches the peak value I _PEAK -

[0036] The first term of Equation 1 utilizes a predetermined target average input current value iiN _{AVG T} and pulse width Tl and switching period TT measured from the preceding cycle of the of the control signal CS ₂ to determine the peak value I _PEA of the input current i _m for each cycle of the input voltage VIN. The second term of Equation 1 shapes the input current in No-Dimmer Mode for power factor correction. In Dimmer Mode, the second term is zero and, thus, the actual average input current ¾N maintains the value of the target average input current value ¾N_AVG_T until the switching power converter 508 delivers a target amount of charge QTARGET to the load 216. In the No-Dimmer Mode, the first term is zero and, thus, input current ½ is shaped to provide power factor correction. If neither term is zero, the multi-mode current controller 504 is operating in Transition Mode or High Power Mode.

[0037] In at least one embodiment, in the Dimmer Mode, the controller 502 controls the switching power converter 508 so that the same amount of charge is provided to the load 216 during each half line cycle of the input voltage VIN. In at least one embodiment, this Dimmer Mode process ensures that the output current ί ₀ υτ to the load 216 is regulated as an approximately constant value irrespective of the instantaneous input current In each line cycle of the input voltage VIN, the control signal CS ₂ causes the FET 510 to cycle until the switching power converter 508 provides a target amount of charge QTARGET to the load 216. In at least one embodiment, the multi-mode current controller 504 determines the predetermined target charge QTARGET in accordance with Equation 2:

Equation 2

QTARGET ⁼ iour ' Dim ^■ HLCPERIOD- iouT is the current to the load 216.

Dim is the phase angle of a phase-cut edge of the input voltage VIN, as phase-cut by the dimmer 206, divided by 180°.

HLCPERIOD is the half line cycle period measured in seconds of the supply voltage VSUPPLY, which is generally 1/100 or 1/120 for a respective 50 Hz or 60Hz AC supply voltage VSUPPLY-

[0038] The charge provided ('pushed') to the secondary-winding 118 and, thus, to the load 216 in one half line cycle of the supply voltage VSUPPLY, is pushed charge QPUSHED in accordance with Equation 3 :

Equation 3 M is the number of cycles of the control signal CS2 during the half line cycle of the supply voltage V SUPPLY- The value of M determines the amount of active time of the control signal CS2. The higher the value of M the more charge is pushed to the load 216.

N is the turns ratio for the transformer 116.

T2 is the decay time of the input current ¾N for each cycle of the switch control signal CS falls to OA.

ipEA is the peak value of the input current ¾N, which is an approximately constant value for the Dimmer Mode as shown in waveforms 404 (Figure 4).

[0039] In at least one embodiment, the multi-mode current controller 504 and the switching power converter current controller 506 ensure that the control signal CS2 switches during a cycle of the input voltage VIN until QPUSHED ~ QTARGET- In the Dimmer Mode, to ensure that pushed charge QPUSHED approximately equals target charge QTARGET, the switching power converter current controller 506 stops switching the FET 510 when pushed charge QPUSHED exceeds target charge QTARGET- In the No Dimmer Mode, to provide power factor correction, the switching power converter current controller 506 does not stop switching the control signal CS2 and instead the integrated error term Qe is fed back to Equation 1. In at least one embodiment, integrated error term Qe is determined from a charge error term QERR. QERR is determined by the multi-mode current controller 504 in accordance with Equation 4:

Equation 4

QERR ⁼ QTARGET ^~ QPUSHED

[0040] The integrated error during a cycle of the rectified input voltage VIN is depicted in Equation 5.

Equation 5

"k" is a scaling factor. The value of k scales integrated error term Qe to between 0 and the peak value ΪΡΕΑΚ of the input current i _m and depends on the number of bits used by the controller 502. [0041 ] In at least one embodiment, the multi-mode current controller 504 initially starts in the Dimmer Mode. In Dimmer Mode, integrated error term Q _e is forced to zero so that the second term of Equation 1 does not impact the determination of the peak value Ϊ _ΡΕΑ of the input current ½ by the multi-mode current controller 504.

[0042] When the controller 502 detects an absence of the dimmer 206, the multi-mode current controller 504 initiates operation in the Transition Mode. In the Transition Mode, the multi-mode current controller 504 slowly reduces the value of the target average input current value iiN AVG T, which in turn slowly reduces the peak value ΪΡΕΑ DIMMER of the input current iiN- "ipEA _DIMMER " represents the value of the first term of Equation 1. The particular rate and function used to reduce the target average input current value iiN _AVG τ during the Transition Mode is a matter of design choice. In at least one embodiment, the function is a linear function that reduces the target average input current value I _{IN AVG} τ from the predetermined value to 0 over R cycles of the input voltage V _IN . In at least one embodiment, the value of R is at or about 200. The value of R is a matter of design choice, and, in at least one embodiment, is a result of the rate of transition of the target input current value I _{IN AVG} τ to 0 in the Transition Mode.. As the target average input current value I _{IN AVG} τ decreases, the peak value Ϊ _{ΡΕΑ DIMMER} also decreases. At some time during the Transition Mode, the peak current determined by only the first term of Equation 1 will be unable to provide sufficient charge to the load 216, and pushed charge Q _PUSHED will be less than target charge Q _TAR G _ET - When pushed charge Q _P US _HED is less than target charge Q _TAR G _ET , the integrated charge error Qe in accordance with Equation 3 increases from zero to a non-zero value. When the integrated error Qe becomes non-zero, the second term of Equation 1 contributes to the determination of the peak value Ϊ _ΡΕΑ of the input current When the target average input current value iiN _AVG τ is finally forced to 0, the integrated charge error Qe has settled to a steady state value, and the second term in Equation 1 completely determines the peak value ipEA of the input current Thus, the controller 202 has transitioned from the Dimmer Mode to the No Dimmer Mode.

[0043] Additionally, in at least one embodiment, the switching power converter current controller 506 can adjust the period TT of the control signal CS ₂ to compensate for any differences in a post-decay time of the input current ½ between the Dimmer Mode and the No Dimmer Mode. In at least one embodiment, when transitioning from Dimmer Mode to No Dimmer Mode, the post-decay time is adjusted to ensure that the switching power converter current controller 506 generates the control signal CS2 to cause the FET 510 to maintain power factor correction and efficiency in the valleys (i.e. low and high phase angles) of the input voltage V _IN . The value of the post-decay time is, in at least one embodiment, 1.5-2 μ8 in Dimmer Mode and is reduced in No Dimmer Mode to a value that allows switching in the valley of the input voltage V _IN .

[0044] The rate of the transition between the Dimmer Mode to the No Dimmer Mode (i.e. the duration of the Transition Mode) is a matter of design choice. In at least one

embodiment, the rate of transition is slow enough so that a dip in the output current ί ₀ υτ due to pushed charge Q _P US _HED being less than target charge Q _TAR G _ET is small enough that there is no human noticeable evidence of the transition. For example, there is no noticeable flicker in a light output of a lamp load for load 216. The controller 502 can be implemented using any technology including as an integrated circuit, as discrete circuit components, as a

combination of integrated and discrete circuits, and as any combination of hardware and software.

[0045] Figure 6 depicts a multi-mode current controller process 600, which represents one embodiment of the multi-mode current controller 504. The multi-mode current controller process 600 includes a Dimmer Mode process 602 and a No Dimmer Mode process 604. As the Dimmer Mode process 602 is deemphasized by decreasing the value of the target average input current value ¾ _N _ _AVG _ _T , the No Dimmer Mode process 604 is emphasized by driving the integrated charge error Qe to a steady-state value. The processes depicted in Figure 6 represent one embodiment that allows the electronic system 500 to operate exclusively in Dimmer Mode, operate exclusively in No Dimmer Mode, transition between the Dimmer Mode and the No Dimmer Mode in the Transition Mode, and operate in the High Power Mode. In at least one embodiment, the multi-mode current controller process 600 operates to provide transitions between the dimmer and no dimmer current control modes without abruptly changing an amount of pushed charge Q _PUSHED delivered to the load 216, which avoids power surges as indicated by, for example, flicker in a light source.

[0046] Figure 7 depicts exemplary transitional waveforms 700 associated with a transitional mode current control process of the multi-mode current controller process 600 and the electronic system 500. The depicted small dip in the average output current ί ₀ υτ and the rate of transition from Dimmer Mode to No Dimmer Mode (also referred to as the duration of the Transition Mode) has been exaggerated for purposes of illustration. For example, in at least one embodiment, a normal Transition Mode duration is equivalent to approximately 200 cycles of the input voltage VIN. The waveforms 700 depict the input voltage VIN and how the peak value IPEAK value of the input current ¾N, the actual average value iiN AVG of the input current ¾N, the integrated error Qe, and the average output current iouT respond to forcing the target average input current value IIN AVG τ to 0 during the Transition Mode from Dimmer to No Dimmer Mode. In at least one embodiment, thus, the function used to force the target average input current value IIN AVG τ to 0 also determines the duration of the Transition Mode because the Transition Mode will start when target average input current value ¾N_AVG_T begins to decrease and will stop when the target average input current value iiN AVG τ reaches 0.

[0047] Referring to Figures, 5, 6, and 7, the Dimmer Mode process 602 and the No Dimmer Mode process 604 implement Equation 1 through Equation 5. In at least one embodiment, the multi-mode current controller 504 initializes in the Dimmer Mode process 602. The target average input current value ¾N_AVG_T is set as previously described (e.g. by programming or by a resistance value of an external resistor to the controller 502). Operation 606 multiplies the target average input current value IIN AVG τ and 2(TT/T1) to determine a Dimmer Mode peak value ΪΡΕΑ DIMMER of the input current ¾N as indicated in the first term of Equation 1. Assuming the controller 502 has not detected a dimmer 206, the multiplexer 608 passes the output peak value IPEAK DIMMER, and multiplexer 610 passes a 0 so that

IPEAK NO DIMMER equals 0. Thus, the second term of Equation 1 is set to 0. Thus, the output of summer 608 is IPEAK DIMMER, and the peak value IPEA of the input current ii _N equals

IPEAK DIMMER- The peak value IPEA is received by the switching power converter current controller 506, and switching power converter current controller 506 maintains the control signal CS ₂ at a logical 1 until the multi-mode current controller 504 determines that the input current ½ has or will reach the peak value ΪΡΕΑ - The multi-mode current controller 504 forces the integrated charge error Qe to 0 when a dimmer 206 is detected.

[0048] When the controller 502 does not detect dimmer 206 and enters the Transition Mode, both multiplexers 608 and 610 are set to select the 0 input so that the respective outputs are IPEAK DIMMER and IPEAK NO DIMMER. Summer 612 adds the peak value Ϊ _ΡΕ Α

components IPEAK DIMMER and IPEAK NO DIMMER values each cycle of the control signal CS2 to determine a new peak value ΪΡΕΑ for the input current Multiplier 614 multiplies the peak value IPEA times T2 N/2 (the decay time of the secondary-side current i _s ), and integrator 616 integrates the product of ΪΡΕΑ and T2 each cycle of control signal CS2 to generate the amount of pushed charge QPUSHED to the load 216 consistent with Equation 3. In at least one embodiment, the value of N/2 is fixed or programmed into the multi-mode current controller 504 and incorporated into the value of QTARGET SO that the multi-mode current controller 504 does not perform an "N/2" multiplication. Subtractor 618 determines a difference between the amount of pushed charge QPUSHED and the target charge QTARGET to be pushed to the load 216. In at least one embodiment, the target charge QTARGET is determined by the multi-mode current controller 504 in accordance with Equation 2. The error value QERR represents the difference, which is consistent with Equation 4. Integrator 620 integrates the error value QERR every half line cycle of the supply voltage VSUPPLY (i.e. every cycle of the input voltage VIN). The output of the integrator 620 is multiplied by the constant k to generate the integrated error signal Qe, which is consistent with Equation 5.

[0049] The multi-mode current controller 504 slowly drives down the target average input current value iiN AVG τ in accordance with the linear function 704 as shown in Figure 7. Driving down the target average input current value ¾N_AVG_T drives the peak current value IPEAK down, which in turn drives down the value of pushed charge QPUSHED- After time tO, the Dimmer Mode process 602 is unable to push enough charge, and target charge QTARGET is greater than pushed charge QPUSHED at time tl . When target charge QTARGET is greater than pushed charge QPUSHED, the value of the integrated error value Qe increases during each subsequent cycle of the input voltage VIN during the Transition Mode. As the integrated error value Qe increases and the value of the target average input current value IIN AVG T decreases, as shown in Figure 7, the No Dimmer Mode process 604 begins to dominate the

determination of the peak value ΪΡΕΑ of the input current As the No Dimmer Mode process influence increases, the average input current value ¾N_AVG begins to track the shape of the input voltage VIN, thus, providing power factor correction. The small current dip 704 illustrates an exaggerated drop in the output current iour as the multi-mode current controller 504 transitions from Dimmer Mode to No Dimmer Mode. In at least one embodiment, the effect of the current dip does not result in a noticeable flicker of an LED-based lamp load 216.

[0050] The Transition Mode of Figures 6 and 7 take, for example, 200 cycles of the input voltage VIN which equals 1.67 seconds for a 120 Hz input voltage VIN frequency, i.e. 200 cycles/120 cycles. In another embodiment, the transition between No Dimmer Mode and Dimmer Mode is accelerated to an almost instantaneous transition while maintaining an approximately constant output current ίουτ by predetermining a value of integrated error value Qe rather than allowing the value of integrated error value Qe to settle to a steady state value as in the multi-mode current controller process 600. Once integrated error value Qe is predetermined, the peak current value ΪΡΕΑΚ is determined solely by the No Dimmer Mode process 604 using the predetermined value of integrated error value Qe. In at least one embodiment, integrated error value Qe is determined in accordance with Equation 6:

Equation 6

Pi = 3.1415

Vpk = 170 or 325 (depending on mode 120 bit)

Qtarget _va i _ue ^target * (w) ^is P ^re P ^ro g ^{rammed in the} controller 502 are indicated by an external resistor value (not shown)

"nVo" is determined in accordance with Equation 7:

Equation 7

[0051 ] The controller 502 senses the value of the input voltage VIN, measures the pulse width Tl of the control signal CS ₂ , and measures the decay time of the secondary current i _s . Once the value of nVo is settled, the multi-mode current controller 504 uses the value of integrated error value Qe and immediately transitions to the No Dimmer Mode process 604.

[0052] In at least one embodiment, for high power devices, the multi-mode current controller 504 combines the Dimmer Mode and No Dimmer Mode operations to efficiently regulate the output current ίουτ in the High Power Mode. Referring to Figures 5 and 6, in at least one embodiment, the target average input current value IIN AVG τ value is set in accordance with an expected power demand of the load 216. In at least one embodiment, the target average input current value iiN AVG τ is set below a value that would allow the Dimmer Mode process 602 alone to determine a peak value ΪΡΕΑΚ of the input current ½ sufficient to make pushed charge QPUSHED greater than target charge QTARGET- For example, if the power demand of the load 216 indicated a target average input current value IIN AVG τ of 20mA, the target average input current value ¾N_AVG_T is set to 15mA. Thus, during a cycle of the input voltage VIN, the Dimmer Mode process 602 will not generate a peak value IPEAK of the input current ¾N sufficient to make pushed charge QPUSHED greater than target charge QTARGET- Thus, the integrated charge error Qe will increase, and the No Dimmer Mode process 604 will contribute to the determination of the peak value ΪΡΕΑ to the extent that the Dimmer Mode process 602 does not result in sufficient charge transfer to the load 216.

[0053] Figure 8 depicts a switching power converter current controller 800, which represents one embodiment of the switching power converter current controller 506. The multi-mode current controller 504 determines the peak current value ΪΡΕΑ of the input current iiN, and the digital-to-analog converter 802 converts the peak current ΪΡΕΑ value to an analog peak current signal ΪΡΕΑΚ Α that is scaled to correspond to the same scale as sense current signal ISENSE- The comparator 804 drives the control signal CS2 to a logical 0 until the value of the sense current signal ISENSE exceeds the value of the analog sense current signal ΪΡΕΑΚ Α· When the value of the sense current signal ISENSE exceeds the value of the analog sense current signal ΪΡΕΑΚ Α, the comparator 804 drives the control signal CS2 to a logical 0.

[0054] Thus, in at least one embodiment, a controller transitions operation of a switching power converter between multiple modes of operation depending on whether the controller detects a dimmer or not and when operating in a High Power Mode.

[0055] Although embodiments have been described in detail, it should be understood that various changes, substitutions, and alterations can be made hereto without departing from the spirit and scope of the invention as defined by the appended claims.