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Patent Searching and Data


Title:
MULTICAST NETWORK AND MEMORY TRANSFER OPTIMIZATIONS FOR NEURAL NETWORK HARDWARE ACCELERATION
Document Type and Number:
WIPO Patent Application WO/2017/196694
Kind Code:
A3
Abstract:
Neural network specific hardware acceleration optimizations are disclosed, including an optimized multicast network and an optimized DRAM transfer unit to perform in constant or linear time. The multicast network is a set of switch nodes organized into layers and configured to operate as a Beneš network. Configuration data may be accessed by all switch nodes in the network. Each layer is configured to perform a Beneš network transformation of the -previous layer within a computer instruction. Since the computer instructions are pipelined, the entire network of switch nodes may be configured in constant or linear time. Similarly a DRAM transfer unit configured to access memory in strides organizes memory into banks indexed by prime or relatively prime number amounts. The index value is selected as not to cause memory address collisions. Upon receiving a memory specification, the DRAM transfer unit may calculate out strides thereby accessing an entire tile of a tensor in constant or linear time.

Inventors:
BRUESTLE JEREMY (US)
NG CHOONG (US)
Application Number:
PCT/US2017/031478
Publication Date:
December 14, 2017
Filing Date:
May 06, 2017
Export Citation:
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Assignee:
1026 LABS INC (US)
International Classes:
G06N99/00; G06F5/01
Foreign References:
US20110206053A12011-08-25
US20020126661A12002-09-12
US20040078418A12004-04-22
US20020075871A12002-06-20
US20150324685A12015-11-12
US20120005141A12012-01-05
US20090313195A12009-12-17
US6216167B12001-04-10
Other References:
See also references of EP 3452962A4
Attorney, Agent or Firm:
CHEN, Elliott Y. (US)
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