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Patent Searching and Data


Title:
MULTILAYER WIRING BOARD, ELECTRONIC DEVICE AND METHOD FOR PRODUCING MULTILAYER WIRING BOARD
Document Type and Number:
WIPO Patent Application WO/2018/216597
Kind Code:
A1
Abstract:
This multilayer wiring board is characterized by comprising a first insulating layer, a second insulating layer that is laminated on the first insulating layer, via conductors that are respectively provided within the first insulating layer and the second insulating layer, and a conductive bonding layer that bonds the via conductors with each other. This multilayer wiring board is also characterized in that if the first insulating layer and the second insulating layer are directly bonded with each other, a1 is the maximum diameter of the bonding layer, and b1 is the maximum diameter of the via conductors at the interfaces with the bonding layer, the relationship a1 > b1 is satisfied.

Inventors:
TAKADA RIYOUSUKE (JP)
HAYASHI TOSHITAKA (JP)
KOYAMA HIROMASA (JP)
Application Number:
PCT/JP2018/019120
Publication Date:
November 29, 2018
Filing Date:
May 17, 2018
Export Citation:
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Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H05K3/46; H05K3/40; H05K3/42
Foreign References:
JP2000357874A2000-12-26
JP2005119264A2005-05-12
JP2006521708A2006-09-21
JP2014049732A2014-03-17
JPH0621649A1994-01-28
JP2001160686A2001-06-12
JP2004260164A2004-09-16
Attorney, Agent or Firm:
YASUTOMI & ASSOCIATES (JP)
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