Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
MULTILAYER WIRING STRUCTURE, SEMICONDUCTOR DEVICE, PATTERN TRANSFER MASK AND METHOD FOR MANUFACTURING MULTILAYER WIRING STRUCTURE
Document Type and Number:
WIPO Patent Application WO/2006/095915
Kind Code:
A1
Abstract:
A multilayer wiring structure is provided with a plurality of wirings at a fine pitch, and is applicable to a case wherein a via is connected to at least one wiring. In the multilayer wiring structure, a region facing the via is locally narrowed, in at least the wiring which faces the via, among the wirings adjacent to the wiring to which the via is connected.

Inventors:
OOTAKE HIROTO (JP)
HAYASHI YOSHIHIRO (JP)
Application Number:
PCT/JP2006/305178
Publication Date:
September 14, 2006
Filing Date:
March 09, 2006
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NEC CORP (JP)
OOTAKE HIROTO (JP)
HAYASHI YOSHIHIRO (JP)
International Classes:
H01L21/768; H01L21/3205; H01L21/82; H01L23/52
Foreign References:
JPH0485933A1992-03-18
JPS5750448A1982-03-24
JP2004144975A2004-05-20
JP2002110644A2002-04-12
JP2003197738A2003-07-11
JP2004095902A2004-03-25
JP2003297920A2003-10-17
JP2003173013A2003-06-20
Attorney, Agent or Firm:
Ikeda, Noriyasu (4-10 Nishishinbashi 1-chom, Minato-ku Tokyo, JP)
Download PDF:
View/Download PDF      PDF Help



 
Previous Patent: EPOXY RESIN COMPOSITION FOR SEMICONDUCTOR ENCAPSULATION AND SEMICONDUCTOR DEVICE

Next Patent: AUTOMATIC GEAR CONTROL DEVICE