ALI ALI RAMADAN (DE)
CHEEMA SHER ALI (DE)
NANGIA VIJAY (US)
WO2020249844A1 | 2020-12-17 |
US20190182091A1 | 2019-06-13 | |||
US20180145803A1 | 2018-05-24 |
CLAIMS 1. A user equipment (“UE”) device apparatus, the apparatus comprising: a transceiver that: receives a first configuration from a network to apply multiple discrete Fourier transform (“DFT”)-based waveforms at one or more of a transmitter and a receiver; receives a second configuration from the network for a physical channel, the second configuration comprising a number of DFTs to apply at the transmitter for transforming one or more time-domain signals and/or channels to a frequency domain, a size of each of the DFTs, and a mapping pattern for mapping the output of each of the DFTs onto subcarriers in the frequency domain for a time symbol; and receives a third configuration from the network for determining, based on the second configuration, an inverse-DFT (“IDFT”) configuration comprising a number of IDFTs to apply on the time symbol to receive one or more signals, a size of each of the IDFTs, and a de- mapping pattern from subcarriers to the IDFTs; and a processor that: performs multiple DFT-based transmissions on a time-domain symbol transmitted to the network based on the first and second configurations; and performs multiple IDFT-based receptions of a time-domain symbol received from the network, based on the IDFT configuration. 2. The apparatus of claim 1, wherein the first, the second, and the third configurations each form a portion of a single configuration. 3. The apparatus of claim 1, wherein the transceiver receives a configuration for at least one control resource set (“CORESET”), the configuration comprising an indication of a number of DFTs used for generating control data and a corresponding demodulation reference signal (“DM-RS”), a length of each of the DFTs to determine a length of the CORESET in the frequency domain, and the mapping pattern for multiplexing the control data and/or the corresponding DM-RS on a time symbol. 4. The apparatus of claim 3, wherein the processor: applies a first DFT to the CORESET for transforming time-domain control data to the frequency domain; and applies a second DFT to the CORESET for transforming a time-domain DM-RS sequence to the frequency domain, wherein a total length of the CORESET in the frequency domain is equal to the sum length of the output of the first and second DFTs. 5. The apparatus of claim 4, wherein the processor multiplexes output of the first DFT applied to the time-domain control data with output of the second DFT applied to the DM-RS sequence onto the subcarriers in the frequency domain according to the mapping pattern. 6. The apparatus of claim 3, wherein the processor: applies one DFT for transforming the time-domain control data to the frequency domain for a CORESET; and applies no DFT to the corresponding DM-RS sequence, wherein the DM-RS sequence is generated in the frequency domain and the total length of the CORESET in the frequency domain is equal to the sum of the length of the DFT output of the control data and the number of DM-RS frequency domain symbols. 7. The apparatus of claim 6, wherein the processor directly multiplexes the output of the DFT that is applied to the control data with the frequency domain DM-RS sequence onto the subcarriers in the frequency domain according to the mapping pattern. 8. The apparatus of claim 7, wherein the processor, in response to the CORESET duration being more than one symbol: applies different configurations for each of the symbols in terms of the number of DFTs, the length of each of the DFTs, and the mapping of DFT output to subcarriers in the frequency domain; and configures the CORESET mapping in the frequency domain across different symbols to allow for frequency hopping on the different symbols. 9. The apparatus of claim 8, wherein the processor configures multiple CORESETs for a UE with independent configurations in terms of the number of DFTs, the length of each of the DFTs, and the mapping of DFT output to subcarriers in frequency domain. 10. The apparatus of claim 9, wherein the processor configures multiple CORESETs for a UE such that the multiple CORESETs are non-overlapping in the frequency domain. 11. The apparatus of claim 10, wherein the processor: applies a single DFT for the CORESET in one symbol; and in response to the CORESET duration being at least two symbols, applies time- domain multiplexing between the control data and the corresponding DM- RS for the CORESET. 12. The apparatus of claim 11, wherein the transceiver transmits a DM-RS symbol prior to the control data symbol for the CORESET. 13. The apparatus of claim 1, wherein the transceiver receives a configuration for a CORESET containing at least one selected from the group of: an indication for a number of DFTs used for generating the control data and/or corresponding DM-RS, the length of each of the DFTs to determine the length of the CORESET in the frequency domain, a configuration for a synchronization signal block (“SSB”) comprising a number of DFTs used for generating the corresponding signal, the length of each of the DFTs to determine the length of a signal in the frequency domain, and a frequency domain multiplexing pattern to multiplex the output of the DFTs for the CORESET and the output of the DFTs for the SSB. 14. A method at a user equipment (“UE”) device, the method comprising: receiving a first configuration from a network to apply multiple discrete Fourier transform (“DFT”)-based waveforms at one or more of a transmitter and a receiver; receiving a second configuration from the network for a physical channel, the second configuration comprising a number of DFTs to apply at the transmitter for transforming one or more time-domain signals and/or channels to a frequency domain, a size of each of the DFTs, and a mapping pattern for mapping the output of each of the DFTs onto subcarriers in the frequency domain for a time symbol; receiving a third configuration from the network for determining, based on the second configuration, an inverse-DFT (“IDFT”) configuration comprising a number of IDFTs to apply on the time symbol to receive one or more signals, a size of each of the IDFTs, and a de-mapping pattern from subcarriers to the IDFTs; performing multiple DFT-based transmissions on a time-domain symbol transmitted to the network based on the first and second configurations; and performing multiple IDFT-based receptions of a time-domain symbol received from the network, based on the IDFT configuration. 15. A network node apparatus, the apparatus comprising: a processor that: determines a first configuration for applying multiple discrete Fourier transform (“DFT”)-based waveforms at a transmitter and/or at a receiver; determines a second configuration for a physical channel, the second configuration comprising a number of DFTs to apply at the transmitter for transforming one or more time-domain signals and/or channels to a frequency domain, a size of each of the DFTs, and a mapping pattern for mapping the output of each of the DFTs onto subcarriers in the frequency domain for a time symbol; and determines a third configuration for determining an inverse-DFT (“IDFT”) configuration comprising a number of IDFTs to apply on the time symbol to receive one or more signals, a size of each of the IDFTs, and a de-mapping pattern from subcarriers to the IDFTs; and a transceiver that: transmits the determined first, second, and third configurations to a user equipment (“UE”) device; and transmits a time-domain symbol to the UE where the UE performs multiple IDFT-based receptions of the time-domain symbol based on the IDFT configuration. |
[0073] A control-channel element consists of 6 resource -element groups (“REGs”) where a resource-element group equals one resource block during one OFDM symbol. Resource-element groups within a control-resource set are numbered in increasing order in a time-first manner, starting with 0 for the first OFDM symbol and the lowest-numbered resource block in the control resource set.
[0074] A UE can be configured with multiple control-resource sets. Each control-resource set is associated with one CCE-to-REG mapping only.
[0075] The CCE-to-REG mapping for a control -resource set can be interleaved or noninterleaved and is described by REG bundles:
[0078] where R ∈ {2 ’ 3 ’ 6} .
[0079] The UE is not expected to handle configurations resulting in the quantity C not being an integer.
[0080] For a CORESET configured by the ControlResourceSet IE: i. is given by the higher-layer parameter frequencyDomainResources; ii. is given by the higher-layer parameter duration, where = 3 is supported only if the higher-layer parameter dmrs-TypeA-Position equals 3; iii. interleaved or non-interleaved mapping is given by the higher-layer parameter cce- REG-MappingType; iv. L equals 6 for non-interleaved mapping and is given by by the higher-layer parameter reg-BundleSize for interleaved mapping; v. . is given by the higher-layer parameter interleaverSize; vi. n shift ∈ {0,1, … ,274} is given by the higher-layer parameter shiftIndex if provided, otherwis vii. for both interleaved and non-interleaved mapping, the UE may assume 1. the same precoding being used within a REG bundle if the higher-layer parameter precoderGranularity equals sameAsREG-bundle; 2. the same precoding being used across the all resource-element groups within the set of contiguous resource blocks in the CORESET, and that no resource elements in the CORESET overlap with an SSB or LTE cell- specific reference signals as indicated by the higher-layer parameter lte- CRS-ToMatchAround or additionalLTE-CRS-ToMatchAroundList, if the higher-layer parameter precoderGranularity equals allContiguousRBs. [0081] For CORESET 0 configured by the ControlResourceSetZero IE: i. are defined by clause 13 of [5, TS 38.213]; ii. the UE may assume interleaved mapping iii. L = 6; iv. . = 2; vi. the UE may assume normal cyclic prefix when CORESET 0 is configured by MIB or SIB1; vii. the UE may assume the same precoding being used within a REG bundle. [0082] 3. Scrambling [0083] The UE shall assume the block of bits B(0), … , B(M bit − 1), where M bit is the number of bits transmitted on the physical channel, is scrambled prior to modulation, resulting in a block of scrambled bits [0084] where the scrambling sequence c(i ) is given by clause 5.2.1. The scrambling sequence generator shall be initialized with c init = (n RNTI ·2 16 + n ID )mod 2 31 [0085] where i. for a UE-specific search space as defined in clause 10 of [5, TS 38.213], n ID ∈ {0,1,...,65535 } equals the higher-layer parameter pdcch-DMRS-ScramblingID if configured, ii. otherwise [0086] and where i. n RNTI is given by the C-RNTI for a PDCCH in a UE-specific search space if the higher-layer parameter pdcch-DMRS-ScramblingID is configured, and ii. n RNTI = 0 otherwise. [0087] 4. PDCCH modulation [0088] The UE shall assume the block of bits to be QPSK modulated as described in clause 5.1.3, resulting in a block of complex-valued modulation symbols d(0), … , d(M symb − 1). [0089] 5. Mapping to physical resources [0090] The UE shall assume the block of complex-valued symbols d(0), … , d(M symb − 1) to be scaled by a factor β PDCCH and mapped to resource elements (k, l) p,μ used for the monitored PDCCH and not used for the associated PDCCH DMRS in increasing order of first k, then l. The antenna port p = 2000. [0091] In this disclosure, configuration and/or signaling of multiple DFTs is proposed in DL and/or UL to allow multiplexing of one or multiple channels, CORESETs, RSs, and/or the like within a same time symbol in different frequency resources. In one embodiment, in order to apply multiple DFT-s-OFDM as a waveform for downlink channels where multiple DFTs can be applied at the transmitter before the inverse fast Fourier transform (“IFFT”) or inverse discrete Fourier transform (“IDFT”) to allow for multiplexing different downlink channels on the same time symbol and/or multiplexing different CORESETs for a UE on the same time symbol and/or multiplexing control data with DM-RS for CORESET on the same time symbol, it is proposed to be configured with multiple DFTs configuration and corresponding mapping of the DFTs output to subcarriers. [0092] Figure 2 depicts one example of multiplexing two CORESETs with two DFTs, where corresponding CORESET configuration enhancements are implemented, as proposed in the following embodiments. In particular, Figure 2 illustrates one embodiment of applying multiple DFTs at the transmitter side. As shown in Figure 2, one M1-point DFT 206 for CORESET 1202 spreading and one M2-point DFT 208 for CORESET 2204 spreading are applied (after applying constellation mapping 205 from a serial to parallel converter 201, 203), followed by localized or distributed mapping 210 to N subcarriers and followed by N-point IFFT 212 or IDFT such that M1+M2 <= N. In one embodiment, a CP is added 214 and a parallel to serial converter is applied 216. [0093] Applying multiple DFT-s-OFDM, in one embodiment, provides better performance in terms of PAPR compared to CP-OFDM, while at the same time providing more flexibility in terms of multiplexing multiple CORESETs with same or different sizes on a time symbol, and flexibility in power/energy per resource element (“EPRE”) ratio between different channels and/or signals in comparison to single DFT-s-OFDM that is currently applied in NR UL transmission. [0094] In one embodiment, multi-DFT-s-OFDM can provide multiplexing capability for both control and DM-RS for a CORESET on a symbol, but with better PAPR compared to CP- OFDM. In addition, in one embodiment, such a waveform allows for multiplexing PDCCH CORESET 0 with SSB using two DFTs before the IFFT or IDFT. A PAPR comparison between multiple DFT-s-OFDM, CP-OFDM, and DFT-s-OFDM is shown in Figure 3 (n denotes the number of DFT operations). Figure 3 depicts the benefit of using multiple DFTs. Basically, in terms of PAPR, CP-OFDM is worst and single DFT-s-OFDM is best. Using multiple DFTs provide better results than CP-OFDM, but worse than single DFT-s-OFDM, but with better multiplexing capability. Therefore, in one embodiment, using multiple DFTs for DFT-s-OFDM can provide good trade-off. In Figure 3, the results are shown for an IFFT or IDFT size of 2048. It is evident from Figure 3 that PAPR of multiple DFT-s-OFDM reaches to the CP-OFDM with increasing number of DFT operations, it offers a PAPR compromise between CP-OFDM and DFT- s-OFDM, but on the other hand offers more frequency domain multiplexing flexibility. [0095] In a first embodiment, directed to multiple DFT-s-OFDM for multiple CORESET multiplexing on a symbol, K DFTs are applied at the transmitter for multiplexing K CORESETs on a bandwidth part (“BWP”) for a UE, where the length of each of the K DFTs is equal to the CORESET length in frequency (e.g., number of resource elements). In one embodiment, the UE is configured by the network (e.g., a gNB) with ControlResourceSet information element, shown in Figure 4, where a DFT field is introduced that can indicate the number of DFTs 402, the size of each of the DFTs 404, and the location/offset applicable for the corresponding CORESET. In some embodiments, only the same size of multiple DFTs is configured for a CORESET. In some embodiments, only one DFT is associated with one CORESET and only the corresponding length is configured. In some embodiments, only one DFT is associated with one CORESET and the DFT size is equal to the number of resource elements in a symbol of the CORESET. [0096] In some embodiments, the maximum size of the bitfield frequencyDomainResources 406 in the ControlResourceSet information element is equal to the maximum number of DFTs allowed on a symbol within a BWP, where each bitfield corresponds to contiguous number of resources elements (e.g., a group of 6 resource blocks (“RBs”) in the BWP) that is equal to the DFT length. The number of bits that are set to “1” corresponds to number of DFTs that are associated with a single CORESET. In some embodiments, only one DFT can be associated with a CORESET and only one of the bit values could be set to “1” for the frequencyDomainResources field406. [0097] Based on which field is set to “1”, the output of the DFT is mapped to corresponding resource elements (subcarriers) in frequency domain. In some embodiments, explicit field for DFT is not included in the ControlResourceSet information element and the number of DFTs for a CORESET can be inferred from the number of bits in frequencyDomainResources field 406 that are set to “1”. In this case, the size of DFT is equal to the number of resource elements (subcarriers) that are indicated by a single bit of frequencyDomainResources field406. For example, if the number of subcarriers indicated by single bit of frequencyDomainResources field 406 is 480 subcarriers, then the DFT size to be used for CORESET transmission at the gNB and at the UE for reception of the CORESET is 480. [0098] In some embodiments, the number of DFTs and the size of each of the DFTs is determined (e.g., implicitly) based on the frequencyDomainResources field 406. In one example, the frequencyDomainResources field 406 comprising a number of disjoint sets of consecutive bits each with value set to '1' (with at least one bit of bit value of '0' between any two sets, with a first set of consecutive bits with value set to '1' of first size/length, a second set of consecutive bits with value set to '1' of second size/length, the number of DFTs is equal to the number of disjoint sets, the size of the first DFT is equal to the number of resource elements in a symbol corresponding to the first set based on the first size/length, and the size of the second DFT is equal to the number of resource elements in a symbol corresponding to the second set based on the second size/length. [0099] In some embodiments, one of the number of DFTs and the size of DFT higher layer parameter is indicated, with the other parameter determined based on the frequencyDomainResources field 406. For example, if the number of DFTs parameter is indicated, the bits in the frequencyDomainResources field 406 with value set to '1' are grouped into numberofDFTs 402 groups where at least a numberofDFTs - 1 groups are equal-sized groups (e.g., have the same number of bits with value of '1') with possibly the last group having one less number of bits with value of '1' compared to the equal-size groups. The size of DFT for each group is determined based on (e.g., is equal to) the number of resource elements in a symbol corresponding to resources associated with each group. In another example, if the size of DFT parameter is indicated, each DFT is assumed to correspond to the sizeofDFT 404, and the number of DFTs is determined by dividing the resources corresponding to the bits in the frequencyDomainResources 406 field with value set to '1' by the sizeofDFT 404 with the UE assuming or expecting an integer number of number of DFTs. [0100] The number of DFTs and the mapping in frequency (based on frequencyDomainResources field 406 with value set to '1') may be configured by the network based on the expected frequency selectivity and the required PAPR/CM for the transmission. [0101] Figure 5A provides an illustration of how multiple CORESETs can be mapped onto the subcarriers in a symbol, where each of the CORESETs is mapped with contiguous frequency resources. In Figure 5A, 2 CORESETs 502, 504 are configured to a UE and in principle two DFTs 512, 514 can be used each of size M (in general, the size of each DFT corresponding to each DFT can be different) for mapping two CORESETs in the frequency (after applying serial to parallel converters 506, 508 and constellation mapping 510). Depending on how the bits in the frequencyDomainResources field are set, the exact mapping is determined. Also, the number of subcarriers corresponding to each bit is equal to the size of the DFT, e.g., size M. [0102] In the depicted example, after the DFTs 512, 514 and subcarrier mapping 516 is applied, only a size 2 bitfield is used, where bit1518 (e.g., the right-most or least significant bit) indicates the top half of the frequency resources and bit2520 (e.g., the left-most or most significant bit) indicates the bottom half of the frequency resources. For CORESET1 502, only the most significant bit is set to “1” and therefore CORESET1502 is mapped to the bottom half of the frequency resources and for CORESET2 504, only the least significant bit is set to “1” and therefore CORESET2504 is mapped to the top half of the frequency resources. In some examples, only a single CORESET can be configured to a UE in a symbol and only a single DFT can be applied. [0103] Figure 5B provides an illustration of how multiple CORESETs can be mapped onto the subcarriers in a symbol, where each of the CORESET is mapped in an interlaced or distributed manner in frequency (in general, the CORESET may be mapped in a localized manner in frequency and the signaling as described in this example can also be applicable). In Figure 5B, 2 CORESETs 502, 504 are configured to a UE and the DFT size M 512, 514 for mapping two CORESETs in the frequency. Depending on how the bits in the frequencyDomainResources field are set, the exact mapping is determined. [0104] In this example, the number of bits and the number of frequency resources indicated by each bit is not directly related to the DFT size. The number of frequency resources indicated by each bit is equal to the number of contiguous resources in frequency resources. In this example, the frequencyDomainResources field has size of 4 bits, where the bit1 518 (e.g., the least significant bit) represents the first M/2 subcarriers of CORESET2504 at the top of frequency region, followed by bit2520 that represents the first M/2 subcarriers of CORESET1502, followed by bit3522 that represents the last M/2 subcarriers of CORESET2504. and followed by bit4524 (e.g., the most significant bit) that represents the last M/2 subcarriers of CORESET1502 at the bottom of the frequency region. For CORESET1502, bit2520 and bit4524 are set to “1” and for CORESET2504, bit1518 and bit3522 are set to “1”. [0105] In an alternative embodiment, multiple DFT operations are applied to each CORESET 502, 504. The CCEs of the CORESET in time domain are grouped in a number of groups Mg with the same or different sizes and a DFT operation, for example, size M/Mg is applied on each group of CCEs where M is the CORESET size. The resulting contiguous frequency resources of each DFT 512, 514 are flexibly mapped 516 to the configured subcarriers according to frequencyDomainResources. [0106] In a second embodiment, directed to multiple DFT-s-OFDM for multiplexing control data and DM-RS for a CORESET, one or multiple DFTs can be applied for a single CORESET on a symbol. In some embodiments, 2 DFTs are applied for a single CORESET, where DFT1 is used for spreading the DM-RS associated with CORESET for channel estimation and DFT2 is used for spreading the control information to be transmitted in the CORESET. The output of these two DFTs may be mapped onto the subcarriers of the same symbol and the mapping can be indicated by the frequencyDomainResources field in the ControlResourceSet information element, e.g., depicted in Figure 4. [0107] In some embodiments, separate fields for DM-RS 602 and control information 604 are included to indicate the DFT size and also mapping to frequency resources, as illustrated in Figure 6. In some embodiments some of the fields related to DFT could be common for both DM- RS and control. In order to perform frequency domain channel estimation at the receiver, DFT spreading is applied to the generated DM-RS sequence at the UE with the same DFT size used at the gNB. In some embodiments, the number of DFTs and the size of DFT for DM-RS may be determined similarly to that for CORESET as described in the first embodiment above. This would allow for different multiplexing pattern od DM-RS resources and control data resources within a symbol. [0108] Figure 7A provides an illustration of how DM-RS 702 and control data 704 for a CORESET can be mapped 716 onto the subcarriers in a symbol in an interlaced manner in frequency. In Figure 7A, the DM-RS 702 is generated in time domain and then a separate DFT 712 is used for DM-RS 702 and then the DFT output is multiplexed in distributed manner with control data 704. In this example, two DFTs 712, 714 are applied (after applying serial to parallel converters 706, 708 and constellation mapping 710), where DFT1 714 of size M is used for spreading control data and DFT2712 of size M/3 is used for spreading DM-RS 702. The ratio of the DFT sizes could correspond to the ratio between DM-RS overhead and control data in a symbol. The interlacing pattern is determined based on the bit values in the frequencyDomainResources field for both DM-RS 702 and control 704. Also, the ratio of overhead can be dependent upon how many resources are indicated by single bit of the fields for each of DM-RS 702 and control 704. [0109] In an alternative embodiment, multiple DFT operations are applied to the DM-RS 702. The time domain DM-RS resources, in one embodiment, are grouped in a number of groups/bundles with the same or different sizes and a DFT operation is applied on each bundle. The resulting contiguous frequency resources of each DFT 712, 714 are flexibly mapped/distributed 716 in frequency grid to cover the control symbol in frequency. The number of DMRS bundles and the mapping spacing in frequency 716 can be configured by the network based on the expected frequency selectivity and the required PAPR/CM for the transmission. [0110] In some embodiments, the DM-RS 702 is generated in frequency domain and is not required to be spread by DFT 714 and only the control data 704 is spread by a DFT 714, as illustrated in Figure 7B. The output of the DFT 714 for control data 704 and frequency domain DM-RS 702 sequence are then mapped 716 to the subcarriers and followed by IFFT or IDFT. [0111] In some embodiments, when only one DFT 714 is applied for one CORESET in a symbol, then only control data 704 or DM-RS 702 for the CORESET can be transmitted on a symbol. In some of the embodiments, the DM-RS 702 is transmitted at least on the first symbol of multiple symbol length CORESET. [0112] In a third embodiment, two DL channels or signals are multiplexed on the same time symbol by using multiple DFTs. In some embodiments, PDCCH with CORESET0 is multiplexed with SSB in frequency, e.g., multiplexing patterns 2 and 3, where at least one DFT is applied for spreading the CORESET0 and at least one DFT is applied for spreading the SSB. In some embodiments, common or UE-specific PDCCH is multiplexed with PDSCH in a symbol by applying multiple DFTs, where at least one DFT is applied for spreading PDCCH CORESET and at least one DFT is applied for spreading the PDSCH. In some embodiments, same subcarrier spacing is configured for PDCCH CORESET0 and SSB and therefore, only single IFFT or IDFT is applied at the transmitter for generating the time-domain signal. In some embodiments, different subcarrier spacing is configured for PDCCH CORESET0 and SSB and therefore, two different IFFTs or IDFTs are applied at the transmitter for generating the time-domain signal. [0113] Figure 8 depicts a user equipment apparatus 800 that may be used for multiple discrete Fourier transforms for transmission and reception, according to embodiments of the disclosure. In various embodiments, the user equipment apparatus 800 is used to implement one or more of the solutions described above. The user equipment apparatus 800 may be one embodiment of the remote unit 105 and/or the UE, described above. Furthermore, the user equipment apparatus 800 may include a processor 805, a memory 810, an input device 815, an output device 820, and a transceiver 825. [0114] In some embodiments, the input device 815 and the output device 820 are combined into a single device, such as a touchscreen. In certain embodiments, the user equipment apparatus 800 may not include any input device 815 and/or output device 820. In various embodiments, the user equipment apparatus 800 may include one or more of: the processor 805, the memory 810, and the transceiver 825, and may not include the input device 815 and/or the output device 820. [0115] As depicted, the transceiver 825 includes at least one transmitter 830 and at least one receiver 835. In some embodiments, the transceiver 825 communicates with one or more cells (or wireless coverage areas) supported by one or more base units 121. In various embodiments, the transceiver 825 is operable on unlicensed spectrum. Moreover, the transceiver 825 may include multiple UE panel supporting one or more beams. Additionally, the transceiver 825 may support at least one network interface 840 and/or application interface 845. The application interface(s) 845 may support one or more APIs. The network interface(s) 840 may support 3GPP reference points, such as Uu, N1, PC5, etc. Other network interfaces 840 may be supported, as understood by one of ordinary skill in the art. [0116] The processor 805, in one embodiment, may include any known controller capable of executing computer-readable instructions and/or capable of performing logical operations. For example, the processor 805 may be a microcontroller, a microprocessor, a central processing unit (“CPU”), a graphics processing unit (“GPU”), an auxiliary processing unit, a field programmable gate array (“FPGA”), or similar programmable controller. In some embodiments, the processor 805 executes instructions stored in the memory 810 to perform the methods and routines described herein. The processor 805 is communicatively coupled to the memory 810, the input device 815, the output device 820, and the transceiver 825. In certain embodiments, the processor 805 may include an application processor (also known as “main processor”) which manages application- domain and operating system (“OS”) functions and a baseband processor (also known as “baseband radio processor”) which manages radio functions. [0117] In various embodiments, the processor 805 and transceiver 825 control the user equipment apparatus 800 to implement the above described UE behaviors. In one embodiment, the transceiver 825 receives a first configuration from a network to apply multiple discrete Fourier transform (“DFT”)-based waveforms at one or more of a transmitter and a receiver. In one embodiment, the transceiver 825 receives a second configuration from the network for a physical channel, the second configuration comprising a number of DFTs to apply at the transmitter for transforming one or more time-domain signals and/or channels to a frequency domain, a size of each of the DFTs, and a mapping pattern for mapping the output of each of the DFTs onto subcarriers in the frequency domain for a time symbol. [0118] In some alternate embodiments, only the first configuration is signaled and the other configurations for multiple DFT-S-OFDM waveform are pre-configured or fixed in specifications. In one embodiment, based on the first configuration, multiple DFT-s-OFDM is applied to both DL and UL. In an alternate embodiments, the first configuration is separate for UL and DL and this would allow to apply multiple DFT-s-OFDM for either UL, or DL or both. In some embodiments, multiple DFT-s-OFDM is applied only in certain cases where multiplexing in frequency domain is needed for different physical channels or signals, otherwise, even if configured, multiple DFT- s-OFDM is not applied. Such restriction can be fixed or pre-configured. [0119] In one embodiment, the transceiver 825 receives a third configuration from the network for determining, based on the second configuration, an inverse-DFT (“IDFT”) configuration comprising a number of IDFTs to apply on the time symbol to receive one or more signals, a size of each of the IDFTs, and a de-mapping pattern from subcarriers to the IDFTs. In one embodiment, the processor 805 performs multiple DFT-based transmissions on a time-domain symbol transmitted to the network based on the first and second configurations and performs multiple IDFT-based receptions of a time-domain symbol received from the network, based on the IDFT configuration. [0120] In one embodiment, the first, the second, and the third configurations each form a portion of a single configuration. In one embodiment, the one or more transformations performed on the physical channel time-domain symbol include at least one transformation selected from the group of: removing a cyclic prefix part of a signal corresponding to a transmitter side, passing the signal from a serial to a parallel converter, performing fast Fourier transform (“FFT”) to convert the signal into frequency domain subcarriers, and de-mapping subcarriers. [0121] In one embodiment, the transceiver 825 receives a configuration for at least one control resource set (“CORESET”), the configuration comprising an indication of a number of DFTs used for generating control data and a corresponding demodulation reference signal (“DM- RS”), a length of each of the DFTs to determine a length of the CORESET in the frequency domain, and the mapping pattern for multiplexing the control data and/or the corresponding DM-RS on a time symbol. [0122] In one embodiment, the processor 805 applies a first DFT to the CORESET for transforming time-domain control data to the frequency domain and applies a second DFT to the CORESET for transforming a time-domain DM-RS sequence to the frequency domain, wherein a total length of the CORESET in the frequency domain is equal to the sum length of the output of the first and second DFTs. [0123] In one embodiment, the processor 805 multiplexes output of the first DFT applied to the time-domain control data with output of the second DFT applied to the DM-RS sequence onto the subcarriers in the frequency domain according to the mapping pattern. [0124] In one embodiment, the processor 805 applies one DFT for transforming the time- domain control data to the frequency domain for a CORESET and applies no DFT to the corresponding DM-RS sequence wherein the DM-RS sequence is generated in the frequency domain and the total length of the CORESET in the frequency domain is equal to the sum of the length of the DFT output of the control data and the number of DM-RS frequency domain symbols. [0125] In one embodiment, the processor 805 directly multiplexes the output of the DFT that is applied to the control data with the frequency domain DM-RS sequence onto the subcarriers in the frequency domain according to the mapping pattern. [0126] In one embodiment, the processor 805, in response to the CORESET duration being more than one symbol, applies different configurations for each of the symbols in terms of the number of DFTs, the length of each of the DFTs, and the mapping of DFT output to subcarriers in the frequency domain. [0127] In one embodiment, the processor 805 configures the CORESET mapping in the frequency domain across different symbols to allow for frequency hopping on the different symbols. In one embodiment, the processor 805, in response to the CORESET duration being more than one symbol, applies the same configuration for each of the symbols. [0128] In one embodiment, the processor 805 configures multiple CORESETs for a UE with independent configurations in terms of the number of DFTs, the length of each of the DFTs, and the mapping of DFT output to subcarriers in frequency domain. [0129] In one embodiment, the processor 805 configures multiple CORESETs for a UE such that the multiple CORESETs are non-overlapping in the frequency domain. In one embodiment, the processor 805 applies a single DFT for the CORESET in one symbol, and, in response to the CORESET duration being at least two symbols, applies time-domain multiplexing between the control data and the corresponding DM-RS for the CORESET. [0130] In one embodiment, the transceiver 825 transmits a DM-RS symbol prior to the control data symbol for the CORESET. In one embodiment, the transceiver 825 receives a configuration for a CORESET containing at least one selected from the group of: an indication for a number of DFTs used for generating the control data and/or corresponding DM-RS, the length of each of the DFTs to determine the length of the CORESET in the frequency domain, a configuration for a synchronization signal block (“SSB”) comprising a number of DFTs used for generating the corresponding signal, the length of each of the DFTs to determine the length of a signal in the frequency domain, and a frequency domain multiplexing pattern to multiplex the output of the DFTs for the CORESET and the output of the DFTs for the SSB. [0131] The memory 810, in one embodiment, is a computer readable storage medium. In some embodiments, the memory 810 includes volatile computer storage media. For example, the memory 810 may include a RAM, including dynamic RAM (“DRAM”), synchronous dynamic RAM (“SDRAM”), and/or static RAM (“SRAM”). In some embodiments, the memory 810 includes non-volatile computer storage media. For example, the memory 810 may include a hard disk drive, a flash memory, or any other suitable non-volatile computer storage device. In some embodiments, the memory 810 includes both volatile and non-volatile computer storage media. [0132] In some embodiments, the memory 810 stores data related to multiple discrete Fourier transforms for transmission and reception. For example, the memory 810 may store various parameters, panel/beam configurations, resource assignments, policies, and the like as described above. In certain embodiments, the memory 810 also stores program code and related data, such as an operating system or other controller algorithms operating on the user equipment apparatus 800. [0133] The input device 815, in one embodiment, may include any known computer input device including a touch panel, a button, a keyboard, a stylus, a microphone, or the like. In some embodiments, the input device 815 may be integrated with the output device 820, for example, as a touchscreen or similar touch-sensitive display. In some embodiments, the input device 815 includes a touchscreen such that text may be input using a virtual keyboard displayed on the touchscreen and/or by handwriting on the touchscreen. In some embodiments, the input device 815 includes two or more different devices, such as a keyboard and a touch panel. [0134] The output device 820, in one embodiment, is designed to output visual, audible, and/or haptic signals. In some embodiments, the output device 820 includes an electronically controllable display or display device capable of outputting visual data to a user. For example, the output device 820 may include, but is not limited to, an LCD display, an LED display, an OLED display, a projector, or similar display device capable of outputting images, text, or the like to a user. As another, non-limiting, example, the output device 820 may include a wearable display separate from, but communicatively coupled to, the rest of the user equipment apparatus 800, such as a smart watch, smart glasses, a heads-up display, or the like. Further, the output device 820 may be a component of a smart phone, a personal digital assistant, a television, a table computer, a notebook (laptop) computer, a personal computer, a vehicle dashboard, or the like. [0135] In certain embodiments, the output device 820 includes one or more speakers for producing sound. For example, the output device 820 may produce an audible alert or notification (e.g., a beep or chime). In some embodiments, the output device 820 includes one or more haptic devices for producing vibrations, motion, or other haptic feedback. In some embodiments, all, or portions of the output device 820 may be integrated with the input device 815. For example, the input device 815 and output device 820 may form a touchscreen or similar touch-sensitive display. In other embodiments, the output device 820 may be located near the input device 815. [0136] The transceiver 825 communicates with one or more network functions of a mobile communication network via one or more access networks. The transceiver 825 operates under the control of the processor 805 to transmit messages, data, and other signals and also to receive messages, data, and other signals. For example, the processor 805 may selectively activate the transceiver 825 (or portions thereof) at particular times in order to send and receive messages. [0137] The transceiver 825 includes at least transmitter 830 and at least one receiver 835. One or more transmitters 830 may be used to provide UL communication signals to a base unit 121, such as the UL transmissions described herein. Similarly, one or more receivers 835 may be used to receive DL communication signals from the base unit 121, as described herein. Although only one transmitter 830 and one receiver 835 are illustrated, the user equipment apparatus 800 may have any suitable number of transmitters 830 and receivers 835. Further, the transmitter(s) 830 and the receiver(s) 835 may be any suitable type of transmitters and receivers. In one embodiment, the transceiver 825 includes a first transmitter/receiver pair used to communicate with a mobile communication network over licensed radio spectrum and a second transmitter/receiver pair used to communicate with a mobile communication network over unlicensed radio spectrum. [0138] In certain embodiments, the first transmitter/receiver pair used to communicate with a mobile communication network over licensed radio spectrum and the second transmitter/receiver pair used to communicate with a mobile communication network over unlicensed radio spectrum may be combined into a single transceiver unit, for example a single chip performing functions for use with both licensed and unlicensed radio spectrum. In some embodiments, the first transmitter/receiver pair and the second transmitter/receiver pair may share one or more hardware components. For example, certain transceivers 825, transmitters 830, and receivers 835 may be implemented as physically separate components that access a shared hardware resource and/or software resource, such as for example, the network interface 840. [0139] In various embodiments, one or more transmitters 830 and/or one or more receivers 835 may be implemented and/or integrated into a single hardware component, such as a multi- transceiver chip, a system-on-a-chip, an ASIC, or other type of hardware component. In certain embodiments, one or more transmitters 830 and/or one or more receivers 835 may be implemented and/or integrated into a multi-chip module. In some embodiments, other components such as the network interface 840 or other hardware components/circuits may be integrated with any number of transmitters 830 and/or receivers 835 into a single chip. In such embodiment, the transmitters 830 and receivers 835 may be logically configured as a transceiver 825 that uses one more common control signals or as modular transmitters 830 and receivers 835 implemented in the same hardware chip or in a multi-chip module. [0140] Figure 9 depicts a network apparatus 900 that may be used for multiple discrete Fourier transforms for transmission and reception, according to embodiments of the disclosure. In one embodiment, network apparatus 900 may be one implementation of a RAN node, such as the base unit 121, the RAN node 210, or gNB, described above. Furthermore, the base network apparatus 900 may include a processor 905, a memory 910, an input device 915, an output device 920, and a transceiver 925. [0141] In some embodiments, the input device 915 and the output device 920 are combined into a single device, such as a touchscreen. In certain embodiments, the network apparatus 900 may not include any input device 915 and/or output device 920. In various embodiments, the network apparatus 900 may include one or more of: the processor 905, the memory 910, and the transceiver 925, and may not include the input device 915 and/or the output device 920. [0142] As depicted, the transceiver 925 includes at least one transmitter 930 and at least one receiver 935. Here, the transceiver 925 communicates with one or more remote units 105. Additionally, the transceiver 925 may support at least one network interface 940 and/or application interface 945. The application interface(s) 945 may support one or more APIs. The network interface(s) 940 may support 3GPP reference points, such as Uu, N1, N2 and N3. Other network interfaces 940 may be supported, as understood by one of ordinary skill in the art. [0143] The processor 905, in one embodiment, may include any known controller capable of executing computer-readable instructions and/or capable of performing logical operations. For example, the processor 905 may be a microcontroller, a microprocessor, a CPU, a GPU, an auxiliary processing unit, a FPGA, or similar programmable controller. In some embodiments, the processor 905 executes instructions stored in the memory 910 to perform the methods and routines described herein. The processor 905 is communicatively coupled to the memory 910, the input device 915, the output device 920, and the transceiver 925. In certain embodiments, the processor 905 may include an application processor (also known as “main processor”) which manages application-domain and operating system (“OS”) functions and a baseband processor (also known as “baseband radio processor”) which manages radio function. [0144] In various embodiments, the network apparatus 900 is a RAN node (e.g., gNB) that includes a processor 905 and a transceiver 925. In one embodiment, the transceiver 925 sends, to a user equipment (“UE”) device, an indication comprising at least a beta-offset value and multiplexing of a plurality of repetitions of uplink control information (“UCI”) on a single transmission occasion of physical uplink shared channel (“PUSCH”). In one embodiment, the transceiver 925 sends, to the UE device, a configuration to determine a starting symbol index and a maximum number of symbols for each of the plurality of repetitions of UCI on PUSCH. In one embodiment, the transceiver 925 receives, from the UE device, UCI on PUSCH that is multiplexed based on the starting symbol index and the maximum number of symbols for each of the plurality of repetitions according to an indicated beta-offset value. [0145] The memory 910, in one embodiment, is a computer readable storage medium. In some embodiments, the memory 910 includes volatile computer storage media. For example, the memory 910 may include a RAM, including dynamic RAM (“DRAM”), synchronous dynamic RAM (“SDRAM”), and/or static RAM (“SRAM”). In some embodiments, the memory 910 includes non-volatile computer storage media. For example, the memory 910 may include a hard disk drive, a flash memory, or any other suitable non-volatile computer storage device. In some embodiments, the memory 910 includes both volatile and non-volatile computer storage media. [0146] In some embodiments, the memory 910 stores data related to multiple discrete Fourier transforms for transmission and reception. For example, the memory 910 may store parameters, configurations, resource assignments, policies, and the like, as described above. In certain embodiments, the memory 910 also stores program code and related data, such as an operating system or other controller algorithms operating on the network apparatus 900. [0147] The input device 915, in one embodiment, may include any known computer input device including a touch panel, a button, a keyboard, a stylus, a microphone, or the like. In some embodiments, the input device 915 may be integrated with the output device 920, for example, as a touchscreen or similar touch-sensitive display. In some embodiments, the input device 915 includes a touchscreen such that text may be input using a virtual keyboard displayed on the touchscreen and/or by handwriting on the touchscreen. In some embodiments, the input device 915 includes two or more different devices, such as a keyboard and a touch panel. [0148] The output device 920, in one embodiment, is designed to output visual, audible, and/or haptic signals. In some embodiments, the output device 920 includes an electronically controllable display or display device capable of outputting visual data to a user. For example, the output device 920 may include, but is not limited to, an LCD display, an LED display, an OLED display, a projector, or similar display device capable of outputting images, text, or the like to a user. As another, non-limiting, example, the output device 920 may include a wearable display separate from, but communicatively coupled to, the rest of the network apparatus 900, such as a smart watch, smart glasses, a heads-up display, or the like. Further, the output device 920 may be a component of a smart phone, a personal digital assistant, a television, a table computer, a notebook (laptop) computer, a personal computer, a vehicle dashboard, or the like. [0149] In certain embodiments, the output device 920 includes one or more speakers for producing sound. For example, the output device 920 may produce an audible alert or notification (e.g., a beep or chime). In some embodiments, the output device 920 includes one or more haptic devices for producing vibrations, motion, or other haptic feedback. In some embodiments, all, or portions of the output device 920 may be integrated with the input device 915. For example, the input device 915 and output device 920 may form a touchscreen or similar touch-sensitive display. In other embodiments, the output device 920 may be located near the input device 915. [0150] The transceiver 925 includes at least transmitter 930 and at least one receiver 935. One or more transmitters 930 may be used to communicate with the UE, as described herein. Similarly, one or more receivers 935 may be used to communicate with network functions in the non-public network (“NPN”), PLMN and/or RAN, as described herein. Although only one transmitter 930 and one receiver 935 are illustrated, the network apparatus 900 may have any suitable number of transmitters 930 and receivers 935. Further, the transmitter(s) 930 and the receiver(s) 935 may be any suitable type of transmitters and receivers. [0151] In one embodiment, the processor 905 determines a first configuration for applying multiple discrete Fourier transform (“DFT”)-based waveforms at a transmitter and/or at a receiver. In one embodiment, the processor 905 determines a second configuration for a physical channel, the second configuration comprising a number of DFTs to apply at the transmitter for transforming one or more time-domain signals and/or channels to a frequency domain, a size of each of the DFTs, and a mapping pattern for mapping the output of each of the DFTs onto subcarriers in the frequency domain for a time symbol. [0152] In one embodiment, the processor 905 determines a third configuration for determining an inverse-DFT (“IDFT”) configuration comprising a number of IDFTs to apply on the time symbol to receive one or more signals, a size of each of the IDFTs, and a de-mapping pattern from subcarriers to the IDFTs. In one embodiment, the transceiver 925 transmits the determined first, second, and third configurations to a user equipment (“UE”) device and transmits a time-domain symbol to the UE where the UE performs multiple IDFT-based receptions of the time-domain symbol based on the IDFT configuration. [0153] Figure 10 is a flowchart diagram of a method 1000 for multiple discrete Fourier transforms for transmission and reception. The method 1000 may be performed by a UE as described herein, for example, the remote unit 105, the UE and/or the user equipment apparatus 800. In some embodiments, the method 1000 may be performed by a processor executing program code, for example, a microcontroller, a microprocessor, a CPU, a GPU, an auxiliary processing unit, a FPGA, or the like. [0154] In one embodiment, the method 1000 includes receiving 1005 a first configuration from a network to apply multiple discrete Fourier transform (“DFT”)-based waveforms at one or more of a transmitter and a receiver. In one embodiment, the method 1000 includes receiving 1010 a second configuration from the network for a physical channel, the second configuration comprising a number of DFTs to apply at the transmitter for transforming one or more time-domain signals and/or channels to a frequency domain, a size of each of the DFTs, and a mapping pattern for mapping the output of each of the DFTs onto subcarriers in the frequency domain for a time symbol. [0155] In one embodiment, the method 1000 includes receiving 1015 a third configuration from the network for determining, based on the second configuration, an inverse-DFT (“IDFT”) configuration comprising a number of IDFTs to apply on the time symbol to receive one or more signals, a size of each of the IDFTs, and a de-mapping pattern from subcarriers to the IDFTs. In one embodiment, the method 100 includes performing 1020 multiple DFT-based transmissions on a time-domain symbol transmitted to the network based on the first and second configurations. In one embodiment, the method 1000 includes performing 1025 multiple IDFT-based receptions of a time-domain symbol received from the network, based on the IDFT configuration, and the method 1000 ends. [0156] Figure 11 is a flowchart diagram of a method 1100 for multiple discrete Fourier transforms for transmission and reception. The method 1100 may be performed by a network entity such as a base node, a gNB, and/or the network equipment apparatus 900. In some embodiments, the method 1100 may be performed by a processor executing program code, for example, a microcontroller, a microprocessor, a CPU, a GPU, an auxiliary processing unit, a FPGA, or the like. [0157] In one embodiment, the method 1100 includes determining 1105 a first configuration for applying multiple discrete Fourier transform (“DFT”)-based waveforms at a transmitter and/or at a receiver. In one embodiment, the method 1100 includes determining 1110 a second configuration for a physical channel, the second configuration comprising a number of DFTs to apply at the transmitter for transforming one or more time-domain signals and/or channels to a frequency domain, a size of each of the DFTs, and a mapping pattern for mapping the output of each of the DFTs onto subcarriers in the frequency domain for a time symbol. [0158] In one embodiment, the method 1100 includes determining 1115 a third configuration for determining an inverse-DFT (“IDFT”) configuration comprising a number of IDFTs to apply on the time symbol to receive one or more signals, a size of each of the IDFTs, and a de-mapping pattern from subcarriers to the IDFTs. In one embodiment, the method 1100 includes transmitting 1120 the determined first, second, and third configurations to a user equipment (“UE”) device. In one embodiment, the method 1100 includes transmitting 1125 a time-domain symbol to the UE where the UE performs multiple IDFT-based receptions of the time-domain symbol based on the IDFT configuration, and the method 1100 ends. [0159] A first apparatus is disclosed for multiple discrete Fourier transforms for transmission and reception. The first apparatus may include a UE as described herein, for example, the remote unit 105, the UE and/or the user equipment apparatus 800. In some embodiments, the first apparatus may include a processor executing program code, for example, a microcontroller, a microprocessor, a CPU, a GPU, an auxiliary processing unit, a FPGA, or the like. [0160] In one embodiment, the first apparatus includes a transceiver that receives a first configuration from a network to apply multiple discrete Fourier transform (“DFT”)-based waveforms at one or more of a transmitter and a receiver. In one embodiment, the transceiver receives a second configuration from the network for a physical channel, the second configuration comprising a number of DFTs to apply at the transmitter for transforming one or more time-domain signals and/or channels to a frequency domain, a size of each of the DFTs, and a mapping pattern for mapping the output of each of the DFTs onto subcarriers in the frequency domain for a time symbol. [0161] In one embodiment, the transceiver receives a third configuration from the network for determining, based on the second configuration, an inverse-DFT (“IDFT”) configuration comprising a number of IDFTs to apply on the time symbol to receive one or more signals, a size of each of the IDFTs, and a de-mapping pattern from subcarriers to the IDFTs. In one embodiment, the first apparatus includes a processor that performs multiple DFT-based transmissions on a time- domain symbol transmitted to the network based on the first and second configurations and performs multiple IDFT-based receptions of a time-domain symbol received from the network, based on the IDFT configuration. [0162] In one embodiment, the first, the second, and the third configurations each form a portion of a single configuration. In one embodiment, the one or more transformations performed on the physical channel time-domain symbol include at least one transformation selected from the group of: removing a cyclic prefix part of a signal corresponding to a transmitter side, passing the signal from a serial to a parallel converter, performing fast Fourier transform (“FFT”) to convert the signal into frequency domain subcarriers, and de-mapping subcarriers. [0163] In one embodiment, the transceiver receives a configuration for at least one control resource set (“CORESET”), the configuration comprising an indication of a number of DFTs used for generating control data and a corresponding demodulation reference signal (“DM-RS”), a length of each of the DFTs to determine a length of the CORESET in the frequency domain, and the mapping pattern for multiplexing the control data and/or the corresponding DM-RS on a time symbol. [0164] In one embodiment, the processor applies a first DFT to the CORESET for transforming time-domain control data to the frequency domain and applies a second DFT to the CORESET for transforming a time-domain DM-RS sequence to the frequency domain, wherein a total length of the CORESET in the frequency domain is equal to the sum length of the output of the first and second DFTs. [0165] In one embodiment, the processor multiplexes output of the first DFT applied to the time-domain control data with output of the second DFT applied to the DM-RS sequence onto the subcarriers in the frequency domain according to the mapping pattern. [0166] In one embodiment, the processor applies one DFT for transforming the time- domain control data to the frequency domain for a CORESET and applies no DFT to the corresponding DM-RS sequence wherein the DM-RS sequence is generated in the frequency domain and the total length of the CORESET in the frequency domain is equal to the sum of the length of the DFT output of the control data and the number of DM-RS frequency domain symbols. [0167] In one embodiment, the processor directly multiplexes the output of the DFT that is applied to the control data with the frequency domain DM-RS sequence onto the subcarriers in the frequency domain according to the mapping pattern. [0168] In one embodiment, the processor, in response to the CORESET duration being more than one symbol, applies different configurations for each of the symbols in terms of the number of DFTs, the length of each of the DFTs, and the mapping of DFT output to subcarriers in the frequency domain. [0169] In one embodiment, the processor configures the CORESET mapping in the frequency domain across different symbols to allow for frequency hopping on the different symbols. In one embodiment, the processor, in response to the CORESET duration being more than one symbol, applies the same configuration for each of the symbols. [0170] In one embodiment, the processor configures multiple CORESETs for a UE with independent configurations in terms of the number of DFTs, the length of each of the DFTs, and the mapping of DFT output to subcarriers in frequency domain. [0171] In one embodiment, the processor configures multiple CORESETs for a UE such that the multiple CORESETs are non-overlapping in the frequency domain. In one embodiment, the processor applies a single DFT for the CORESET in one symbol, and, in response to the CORESET duration being at least two symbols, applies time-domain multiplexing between the control data and the corresponding DM-RS for the CORESET. [0172] In one embodiment, the transceiver transmits a DM-RS symbol prior to the control data symbol for the CORESET. In one embodiment, the transceiver receives a configuration for a CORESET containing at least one selected from the group of: an indication for a number of DFTs used for generating the control data and/or corresponding DM-RS, the length of each of the DFTs to determine the length of the CORESET in the frequency domain, a configuration for a synchronization signal block (“SSB”) comprising a number of DFTs used for generating the corresponding signal, the length of each of the DFTs to determine the length of a signal in the frequency domain, and a frequency domain multiplexing pattern to multiplex the output of the DFTs for the CORESET and the output of the DFTs for the SSB. [0173] A first method is disclosed for multiple discrete Fourier transforms for transmission and reception. The first method may be performed by a UE as described herein, for example, the remote unit 105, the UE and/or the user equipment apparatus 800. In some embodiments, the first method may be performed by a processor executing program code, for example, a microcontroller, a microprocessor, a CPU, a GPU, an auxiliary processing unit, a FPGA, or the like. [0174] In one embodiment, the first method includes receiving a first configuration from a network to apply multiple discrete Fourier transform (“DFT”)-based waveforms at one or more of a transmitter and a receiver. In one embodiment, the first method includes receiving a second configuration from the network for a physical channel, the second configuration comprising a number of DFTs to apply at the transmitter for transforming one or more time-domain signals and/or channels to a frequency domain, a size of each of the DFTs, and a mapping pattern for mapping the output of each of the DFTs onto subcarriers in the frequency domain for a time symbol. [0175] In one embodiment, the first method includes receiving a third configuration from the network for determining, based on the second configuration, an inverse-DFT (“IDFT”) configuration comprising a number of IDFTs to apply on the time symbol to receive one or more signals, a size of each of the IDFTs, and a de-mapping pattern from subcarriers to the IDFTs. In one embodiment, the first method includes performing multiple DFT-based transmissions on a time-domain symbol transmitted to the network based on the first and second configurations and performing multiple IDFT-based receptions of a time-domain symbol received from the network, based on the IDFT configuration. [0176] In one embodiment, the first, the second, and the third configurations each form a portion of a single configuration. In one embodiment, the one or more transformations performed on the physical channel time-domain symbol include at least one transformation selected from the group of: removing a cyclic prefix part of a signal corresponding to a transmitter side, passing the signal from a serial to a parallel converter, performing fast Fourier transform (“FFT”) to convert the signal into frequency domain subcarriers, and de-mapping subcarriers. [0177] In one embodiment, the first method includes receiving a configuration for at least one control resource set (“CORESET”), the configuration comprising an indication of a number of DFTs used for generating control data and a corresponding demodulation reference signal (“DM-RS”), a length of each of the DFTs to determine a length of the CORESET in the frequency domain, and the mapping pattern for multiplexing the control data and/or the corresponding DM- RS on a time symbol. [0178] In one embodiment, the first method includes applying a first DFT to the CORESET for transforming time-domain control data to the frequency domain and applies a second DFT to the CORESET for transforming a time-domain DM-RS sequence to the frequency domain, wherein a total length of the CORESET in the frequency domain is equal to the sum length of the output of the first and second DFTs. [0179] In one embodiment, the first method includes multiplexing output of the first DFT applied to the time-domain control data with output of the second DFT applied to the DM-RS sequence onto the subcarriers in the frequency domain according to the mapping pattern. [0180] In one embodiment, the first method includes applying one DFT for transforming the time-domain control data to the frequency domain for a CORESET and applies no DFT to the corresponding DM-RS sequence wherein the DM-RS sequence is generated in the frequency domain and the total length of the CORESET in the frequency domain is equal to the sum of the length of the DFT output of the control data and the number of DM-RS frequency domain symbols. [0181] In one embodiment, the first method includes directly multiplexing the output of the DFT that is applied to the control data with the frequency domain DM-RS sequence onto the subcarriers in the frequency domain according to the mapping pattern. [0182] In one embodiment, the first method includes, in response to the CORESET duration being more than one symbol, applying different configurations for each of the symbols in terms of the number of DFTs, the length of each of the DFTs, and the mapping of DFT output to subcarriers in the frequency domain. [0183] In one embodiment, the first method includes configuring the CORESET mapping in the frequency domain across different symbols to allow for frequency hopping on the different symbols. In one embodiment, the first method includes, in response to the CORESET duration being more than one symbol, applying the same configuration for each of the symbols. [0184] In one embodiment, the first method includes configuring multiple CORESETs for a UE with independent configurations in terms of the number of DFTs, the length of each of the DFTs, and the mapping of DFT output to subcarriers in frequency domain. [0185] In one embodiment, the first method includes configuring multiple CORESETs for a UE such that the multiple CORESETs are non-overlapping in the frequency domain. In one embodiment, the first method includes applying a single DFT for the CORESET in one symbol, and, in response to the CORESET duration being at least two symbols, applies time-domain multiplexing between the control data and the corresponding DM-RS for the CORESET. [0186] In one embodiment, the first method includes transmitting a DM-RS symbol prior to the control data symbol for the CORESET. In one embodiment, the first method includes receiving a configuration for a CORESET containing at least one selected from the group of: an indication for a number of DFTs used for generating the control data and/or corresponding DM- RS, the length of each of the DFTs to determine the length of the CORESET in the frequency domain, a configuration for a synchronization signal block (“SSB”) comprising a number of DFTs used for generating the corresponding signal, the length of each of the DFTs to determine the length of a signal in the frequency domain, and a frequency domain multiplexing pattern to multiplex the output of the DFTs for the CORESET and the output of the DFTs for the SSB. [0187] A second apparatus is disclosed for multiple discrete Fourier transforms for transmission and reception. The second apparatus may include a network entity such as a base node, a gNB, and/or the network equipment apparatus 900. In some embodiments, the second apparatus includes a processor executing program code, for example, a microcontroller, a microprocessor, a CPU, a GPU, an auxiliary processing unit, a FPGA, or the like. [0188] The second apparatus, in one embodiment, includes a processor that determines a first configuration for applying multiple discrete Fourier transform (“DFT”)-based waveforms at a transmitter and/or at a receiver. In one embodiment, the processor determines a second configuration for a physical channel, the second configuration comprising a number of DFTs to apply at the transmitter for transforming one or more time-domain signals and/or channels to a frequency domain, a size of each of the DFTs, and a mapping pattern for mapping the output of each of the DFTs onto subcarriers in the frequency domain for a time symbol. [0189] In one embodiment, the processor determines a third configuration for determining an inverse-DFT (“IDFT”) configuration comprising a number of IDFTs to apply on the time symbol to receive one or more signals, a size of each of the IDFTs, and a de-mapping pattern from subcarriers to the IDFTs. In one embodiment, the second apparatus includes a transceiver that transmits the determined first, second, and third configurations to a user equipment (“UE”) device and transmits a time-domain symbol to the UE where the UE performs multiple IDFT-based receptions of the time-domain symbol based on the IDFT configuration. [0190] A second method is disclosed for multiple discrete Fourier transforms for transmission and reception. The second method may be performed by a network entity such as a base node, a gNB, and/or the network equipment apparatus 900. In some embodiments, the second method may be performed by a processor executing program code, for example, a microcontroller, a microprocessor, a CPU, a GPU, an auxiliary processing unit, a FPGA, or the like. [0191] The second method, in one embodiment, includes determining a first configuration for applying multiple discrete Fourier transform (“DFT”)-based waveforms at a transmitter and/or at a receiver. In one embodiment, the second method includes determining a second configuration for a physical channel, the second configuration comprising a number of DFTs to apply at the transmitter for transforming one or more time-domain signals and/or channels to a frequency domain, a size of each of the DFTs, and a mapping pattern for mapping the output of each of the DFTs onto subcarriers in the frequency domain for a time symbol. [0192] In one embodiment, the second method includes determining a third configuration for determining an inverse-DFT (“IDFT”) configuration comprising a number of IDFTs to apply on the time symbol to receive one or more signals, a size of each of the IDFTs, and a de-mapping pattern from subcarriers to the IDFTs. In one embodiment, the second method includes transmitting the determined first, second, and third configurations to a user equipment (“UE”) device and transmitting a time-domain symbol to the UE where the UE performs multiple IDFT- based receptions of the time-domain symbol based on the IDFT configuration. [0193] Embodiments may be practiced in other specific forms. The described embodiments are to be considered in all respects only as illustrative and not restrictive. The scope of the invention is, therefore, indicated by the appended claims rather than by the foregoing description. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.
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