Title:
MULTIPLEXER, HIGH FREQUENCY FRONT END CIRCUIT AND COMMUNICATION DEVICE
Document Type and Number:
WIPO Patent Application WO/2019/049545
Kind Code:
A1
Abstract:
This multiplexer (1) is provided with: a demultiplexing circuit (11) having a common terminal (110c) and individual terminals (111 and 112), and a filter (21) connected to the individual terminal (111) and a filter (22) connected to the individual terminal (112). The demultiplexing circuit (11) is also provided with: an impedance circuit (Z1) provided in series on a path (r1) connecting the common terminal (110c) and the individual terminal (111); an impedance circuit (Z2) provided in series on a path (r2) connecting the common terminal (110c) and the individual terminal (112); an impedance circuit (Z3); and a switching circuit (12). The switching circuit (12) connects only one of a node (N1) on the path (r1) between the impedance circuit (Z1) and the individual terminal (111) and a node (N2) on the path (r2) between the impedance circuit (Z2) and the individual terminal (112) to the ground through the impedance circuit (Z3).
Inventors:
MORI HIROTSUGU (JP)
Application Number:
PCT/JP2018/028010
Publication Date:
March 14, 2019
Filing Date:
July 26, 2018
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H03H7/46
Domestic Patent References:
WO2017138539A1 | 2017-08-17 | |||
WO2017138540A1 | 2017-08-17 |
Foreign References:
JP2004228666A | 2004-08-12 | |||
JP2005253019A | 2005-09-15 |
Attorney, Agent or Firm:
YOSHIKAWA, Shuichi et al. (JP)
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