Title:
MULTIPLIER-ACCUMULATOR
Document Type and Number:
WIPO Patent Application WO/2018/034163
Kind Code:
A1
Abstract:
A multiplier-accumulator 10, wherein, using an analog circuit 11: charges having dimensions that correspond to the values of positive loads and electrical signals constituting N + pairs are held in a first storage means 19; charges having dimensions that correspond to the values of absolute values of negative loads and electrical signals constituting (N-N+) pairs are held in a second storage means 27; the sum of N+ multiplication values derived by multiplying each of the positive loads corresponding to each of the values of N+ electrical signals is calculated when the voltage held in the first storage means 19 is detected to have reached a first threshold value; the sum of (N-N+) multiplication values derived by multiplying each of the absolute values of the negative loads corresponding to the values of each of (N-N+) electrical signals is calculated when the voltage held in the second storage means 27 is detected to have reached a second threshold value; and the sum of (N-N+) multiplication values is subtracted from the sum of N+ multiplication values to obtain the sum of N multiplication values.
Inventors:
MORIE TAKASHI (JP)
WANG QUAN (JP)
TAMUKOH HAKARU (JP)
WANG QUAN (JP)
TAMUKOH HAKARU (JP)
Application Number:
PCT/JP2017/028247
Publication Date:
February 22, 2018
Filing Date:
August 03, 2017
Export Citation:
Assignee:
KYUSHU INST TECH (JP)
International Classes:
G06G7/60; G06N3/063
Foreign References:
| JP2004110421A | 2004-04-08 | |||
| JP2016099707A | 2016-05-30 |
Other References:
T. TOHARA ET AL.: "Silicon nanodisk array with a fin field-effect transistor for time-domain weighted sum calculation toward massively parallel spiking neural networks", APPLIED PHYSICS EXPRESS, vol. 9, 034201, 12 February 2016 (2016-02-12), pages 1 - 4, XP055578682
T.MORIE ET AL.: "An Analog-Digital Merged Neural Circuit Using Pulse Width Modulation Technique", ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, vol. 25, no. 3, December 2000 (2000-12-01), pages 319 - 328, XP055468842, DOI: doi:10.1023/A:1008338200493
P.A.MEROLLA ET AL.: "A million spiking-neuron integrated circuit with a scalable communication network and interface", SCIENCE, vol. 345, no. 6179, 2014, pages 668 - 673, XP055463342, DOI: doi:10.1126/science.1254642
W.MAASS: "Fast sigmoidal networks via spiking neurons", NEURAL COMPUTATION, vol. 9, 1997, pages 279 - 304
T.TOHARA ET AL.: "Silicon nanodisk array with a fin field-effect transistor for time-domain weighted sum calculation toward massively parallel spiking neural networks", APPL.PHYS.EXPRESS, vol. 9, 2016, pages 034201 - 1,4
T.MORIE ET AL.: "An Analog-Digital Merged Neural Circuit Using Pulse Width Modulation Technique", ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, vol. 25, no. 3, December 2000 (2000-12-01), pages 319 - 328, XP055468842, DOI: doi:10.1023/A:1008338200493
P.A.MEROLLA ET AL.: "A million spiking-neuron integrated circuit with a scalable communication network and interface", SCIENCE, vol. 345, no. 6179, 2014, pages 668 - 673, XP055463342, DOI: doi:10.1126/science.1254642
W.MAASS: "Fast sigmoidal networks via spiking neurons", NEURAL COMPUTATION, vol. 9, 1997, pages 279 - 304
T.TOHARA ET AL.: "Silicon nanodisk array with a fin field-effect transistor for time-domain weighted sum calculation toward massively parallel spiking neural networks", APPL.PHYS.EXPRESS, vol. 9, 2016, pages 034201 - 1,4
Attorney, Agent or Firm:
NAKAMAE Fujio et al. (JP)
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