Title:
A MULTITHREADED PROCESSOR CAPABLE OF IMPLICIT MULTITHREADED EXECUTION OF A SINGLE-THREAD PROGRAM
Document Type and Number:
WIPO Patent Application WO2003003196
Kind Code:
A3
Abstract:
A device is presented including a first processor and a second processor. A number of memory devices are connected to the first processor and the second processor. A register buffer is connected to the first processor and the second processor. A trace buffer is connected to the first processor and the second processor. A number of memory instruction buffers are connected to the first processor and the second processor. The first processor and the second processor perform single threaded applications using multithreading resources. A method is also presented where a first thread is executed from a second processor. The first thread is also executed from a second processor as directed by the first processor. The second processor executes instructions ahead of the first processor.
Inventors:
AKKARY HAITHAM
HILY SEBASTIEN
HILY SEBASTIEN
Application Number:
PCT/US2002/019101
Publication Date:
May 01, 2003
Filing Date:
June 14, 2002
Export Citation:
Assignee:
INTEL CORP (US)
International Classes:
G06F12/08; G06F9/30; G06F9/38; G06F9/46; (IPC1-7): G06F9/38
Domestic Patent References:
| WO2000068781A2 | 2000-11-16 | |||
| WO2001033352A1 | 2001-05-10 |
Foreign References:
| EP0544822A1 | 1993-06-09 | |||
| US6233599B1 | 2001-05-15 | |||
| US6161167A | 2000-12-12 | |||
| US20010037447A1 | 2001-11-01 |
Other References:
"DEALER INSTRUCTION PROCESSING UNIT GOVERNOR - JOINT RECURSIVE BRANCH PREDICTION", IBM TECHNICAL DISCLOSURE BULLETIN, IBM CORP. NEW YORK, US, vol. 36, no. 6A, 1 June 1993 (1993-06-01), pages 137 - 140, XP000372381, ISSN: 0018-8689
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