Title:
NANOSHEET DEVICE WITH TRI-LAYER BOTTOM DIELECTRIC ISOLATION
Document Type and Number:
WIPO Patent Application WO/2023/045633
Kind Code:
A1
Abstract:
A nanosheet device includes a bottom dielectric isolation formed by a first portion of a high-k dielectric layer above a semiconductor substrate, a spacer material above the first portion of the high-k dielectric layer and a second portion of the high-k dielectric layer above the spacer material. A sequence of semiconductor channel layers are stacked perpendicularly to the semiconductor substrate above the bottom dielectric isolation and are separated by and vertically aligned with a metal gate stack. Source/drain regions extend laterally from opposite ends of the semiconductor channel layers with a bottom surface of the source/drain regions being in direct contact with the bottom dielectric isolation for electrically isolating the source/drain regions from the semiconductor substrate.
Inventors:
MIAO XIN (US)
ZHANG JINGYUN (US)
REZNICEK ALEXANDER (US)
LEE CHOONGHYUN (US)
ZHANG JINGYUN (US)
REZNICEK ALEXANDER (US)
LEE CHOONGHYUN (US)
Application Number:
PCT/CN2022/113044
Publication Date:
March 30, 2023
Filing Date:
August 17, 2022
Export Citation:
Assignee:
IBM (US)
IBM CHINA CO LTD (CN)
IBM CHINA CO LTD (CN)
International Classes:
H01L21/762; H01L29/78
Foreign References:
| US20200365687A1 | 2020-11-19 | |||
| US10032867B1 | 2018-07-24 | |||
| CN113053822A | 2021-06-29 | |||
| US20200052124A1 | 2020-02-13 | |||
| US20180301531A1 | 2018-10-18 |
Attorney, Agent or Firm:
LIU, SHEN & ASSOCIATES (CN)
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