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Patent Searching and Data

Document Type and Number:
WIPO Patent Application WO/2018/016176
Kind Code:
A neural network circuit according to an embodiment of the present invention includes a storage unit (2) comprising memristors (G11 through G33) serving as storage elements connected to each other in a grid pattern. When a control unit (4) controls a voltage application unit (3) to reduce the resistance value as data and thus write the data into a selected element in the storage unit, and increase the resistance value to delete and read the data, the control unit (4) causes the voltage application unit to change each bias voltage applied to the storage unit so as to minimize disturbance to non-selected elements.

OTSUKA, Shigeki (1-1 Showa-cho, Kariya-cit, Aichi 61, 〒4488661, JP)
AKITA, Hironobu (1-1 Showa-cho, Kariya-cit, Aichi 61, 〒4488661, JP)
KATAEVA, Irina (1-1 Showa-cho, Kariya-cit, Aichi 61, 〒4488661, JP)
Application Number:
Publication Date:
January 25, 2018
Filing Date:
May 24, 2017
Export Citation:
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DENSO CORPORATION (1-1 Showa-cho, Kariya-city Aichi, 61, 〒4488661, JP)
International Classes:
G11C11/54; G06N3/063; G11C13/00
Attorney, Agent or Firm:
SATO INTERNATIONAL PATENT FIRM (Fourteen Hills Center Building, 6-15 Sakae 4-chome, Naka-ku, Nagoya-sh, Aichi 08, 〒4600008, JP)
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