Title:
NITRIDE SEMICONDUCTOR STRUCTURE
Document Type and Number:
WIPO Patent Application WO/2014/041736
Kind Code:
A1
Abstract:
The present invention suppresses current collapse of a device manufactured using a nitride semiconductor structure. This nitride semiconductor structure is provided with a silicon substrate, and a plurality of layers formed of nitride semiconductor, said layers being formed on the silicon substrate. The silicon substrate has a surface region and an internal region in this order from the side of the layers formed of the nitride semiconductor. The resistivity of the surface region is equal to or higher than 0.1 Ωcm, and the resistivity of the internal region is equal to or higher than 1,000 Ωcm.
Inventors:
UMEDA HIDEKAZU
ISHIDA MASAHIRO
UEDA TETSUZO
UEDA DAISUKE
ISHIDA MASAHIRO
UEDA TETSUZO
UEDA DAISUKE
Application Number:
PCT/JP2013/004652
Publication Date:
March 20, 2014
Filing Date:
August 01, 2013
Export Citation:
Assignee:
PANASONIC CORP (JP)
International Classes:
H01L21/338; H01L21/20; H01L29/778; H01L29/812; H01L29/861; H01L29/868
Domestic Patent References:
| WO2007116517A1 | 2007-10-18 |
Foreign References:
| JP2003048799A | 2003-02-21 | |||
| JP2012502478A | 2012-01-26 | |||
| JP2010150133A | 2010-07-08 | |||
| JP2008251704A | 2008-10-16 | |||
| JP2012099706A | 2012-05-24 | |||
| JP2009081374A | 2009-04-16 | |||
| JP2011040766A | 2011-02-24 |
Attorney, Agent or Firm:
NAITO, Hiroki et al. (JP)
Hiroki Naito (JP)
Hiroki Naito (JP)
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