NON-CONFORMAL PROTECTIVE SIDEWALL LAYER FOR SLOPED MAGNETIC

TUNNEL JUNCTION DEVICES

TECHNICAL FIELD

Embodiments of the invention generally relate to magnetic tunnel junction devices with improved contact to the terminal electrodes thereof and more particularly relate to magnetic tunnel junctions devices having sloped sidewalls and related devices and manufacturing techniques.

BACKGROUND

In some implementations, magnetic memory devices such as spin transfer torque memory (STTM) include a magnetic tunnel junction (MTJ) for switching and detecting the state of the memory. For example, the magnetic tunnel junction may include fixed and free magnets separated by a barrier layer such that the fixed and free magnets have parallel or perpendicular magnetic anisotropy. In the detection of the memory state, a magnetic tunnel junction resistance of the memory is established by the relative magnetization of the fixed and free magnets. When the magnetization directions are parallel, the magnetic tunnel junction resistance is in a low state and, when the magnetization directions are anti-parallel, the magnetic tunnel junction resistance is in a high state. The relative magnetization directions are provided or written to the memory by varying the magnetization direction of the free magnet while the magnetization direction of the fixed magnet remains, as the name implies, fixed. The magnetization direction of the free magnet is changed by passing a driving current polarized by the fixed magnet through the free magnet.

In some process flows for fabricating magnetic tunnel junction devices, contacting the terminal electrodes of such devices may be difficult. In particular, shorting may occur when magnetic tunnel junctions devices are contacted such that device layers other than the terminal electrode are inadvertently contacted by a conductive contact.

As such, there is a continued need for improved magnetic tunnel junction devices, systems, and fabrication techniques. Such problems may become critical as devices such as memory devices utilizing magnetic memory for having increased speed, reduced drive current, and low power consumption are needed in various applications. BRIEF DESCRIPTION OF THE DRAWINGS

The material described herein is illustrated by way of example and not by way of limitation in the accompanying figures. For simplicity and clarity of illustration, elements illustrated in the figures are not necessarily drawn to scale. For example, the dimensions of some elements may be exaggerated relative to other elements for clarity. Furthermore, where considered appropriate, reference labels have been repeated among the figures to indicate corresponding or analogous elements. In the figures:

FIG. 1A is a cross-sectional view of an example magnetic tunnel junction device structure; FIG. IB is another cross-sectional view of the magnetic tunnel junction device structure of FIG. 1A;

FIG. 1C illustrates example relationships between components of the magnetic tunnel junction device structure of FIG. 1A;

FIG. ID is a cross-sectional view of an example magnetic tunnel junction device structure; FIG. 2 is a cross-sectional view of another example magnetic tunnel junction device structure;

FIG. 3 is a flow diagram illustrating an example process for fabricating magnetic tunnel junction device structures;

FIGS. 4A, 4B, and 4C are side views of example magnetic tunnel junction device structures as particular fabrication operations are performed;

FIGS. 5A, 5B, 5C, 5D, and 5E are side views of example magnetic tunnel junction device structures as particular fabrication operations are performed;

FIGS. 6A, 6B, 6C, 6D, 6E, 6F, and 6G are side views of example magnetic tunnel junction device structures as particular fabrication operations are performed;

FIG. 7 is a schematic of a non-volatile memory device including a magnetic tunnel junction device structure having a non-conformal sidewall layer;

FIG. 8 illustrates an example cross-sectional die layout including an example magnetic tunnel junction device structure;

FIG. 9 illustrates a system in which a mobile computing platform and/or a data server machine employs a magnetic tunnel junction device having a non-conformal sidewall layer; and FIG. 10 is a functional block diagram of a computing device, all arranged in accordance with at least some implementations of the present disclosure. DETAILED DESCRIPTION

One or more embodiments or implementations are now described with reference to the enclosed figures. While specific configurations and arrangements are discussed, it should be understood that this is done for illustrative purposes only. Persons skilled in the relevant art will recognize that other configurations and arrangements may be employed without departing from the spirit and scope of the description. It will be apparent to those skilled in the relevant art that techniques and/or arrangements described herein may also be employed in a variety of other systems and applications other than what is described herein.

Reference is made in the following detailed description to the accompanying drawings, which form a part hereof, wherein like numerals may designate like parts throughout to indicate corresponding or analogous elements. It will be appreciated that for simplicity and/or clarity of illustration, elements illustrated in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Further, it is to be understood that other embodiments may be utilized and structural and/or logical changes may be made without departing from the scope of claimed subject matter. It should also be noted that directions and references, for example, up, down, top, bottom, over, under, and so on, may be used to facilitate the discussion of the drawings and embodiments and are not intended to restrict the application of claimed subject matter. Therefore, the following detailed description is not to be taken in a limiting sense and the scope of claimed subject matter defined by the appended claims and their equivalents.

In the following description, numerous details are set forth, however, it will be apparent to one skilled in the art, that the present invention may be practiced without these specific details. In some instances, well-known methods and devices are shown in block diagram form, rather than in detail, to avoid obscuring the present invention. Reference throughout this specification to "an embodiment" or "in one embodiment" means that a particular feature, structure, function, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. Thus, the appearances of the phrase "in an embodiment" in various places throughout this specification are not necessarily referring to the same embodiment of the invention. Furthermore, the particular features, structures, functions, or characteristics may be combined in any suitable manner in one or more embodiments. For example, a first embodiment may be combined with a second embodiment anywhere the two embodiments are not specified to be mutually exclusive. The terms "coupled" and "connected," along with their derivatives, may be used herein to describe structural relationships between components. It should be understood that these terms are not intended as synonyms for each other. Rather, in particular embodiments, "connected" may be used to indicate that two or more elements are in direct physical or electrical contact with each other. "Coupled" may be used to indicated that two or more elements are in either direct or indirect (with other intervening elements between them) physical or electrical contact with each other, and/or that the two or more elements co-operate or interact with each other (e.g., as in a cause an effect relationship).

The terms "over," "under," "between," "on", and/or the like, as used herein refer to a relative position of one material layer or component with respect to other layers or components. For example, one layer disposed over or under another layer may be directly in contact with the other layer or may have one or more intervening layers. Moreover, one layer disposed between two layers may be directly in contact with the two layers or may have one or more intervening layers. In contrast, a first layer "on" a second layer is in direct contact with that second layer. Similarly, unless explicitly stated otherwise, one feature disposed between two features may be in direct contact with the adjacent features or may have one or more intervening features.

Furthermore, the terms "substantially," "close," "approximately," "near," and "about," generally refer to being within +/- 10% of a target value. The term layer as used herein may include a single material or multiple materials.

Magnetic tunnel junction apparatuses, devices, systems, computing platforms, and methods are described below related to magnetic tunnel junction devices having sloped sidewalls and non-conformal sidewall layers for improved landing of conductive contacts to terminal electrodes of the magnetic tunnel junction devices.

As described above, in fabricating magnetic tunnel junction devices, contacting the terminal electrodes of such devices may be difficult. In some embodiments discussed herein, a magnetic tunnel junction device includes a magnetic tunnel junction stack having a fixed magnet layer and a free magnet layer separated by a barrier layer and a terminal electrode over one of the fixed magnet layer or the free magnet layer such that a sidewall of the magnetic tunnel junction stack is sloped. The slope may be such that distal end (or top) of the terminal electrode (e.g., opposite the fixed magnet layer or the free magnet layer) is narrower than a proximal end (or bottom) of the terminal electrode (e.g., adjacent the fixed magnet layer or the free magnet layer) and the other layers of the stack have similarly sloped sidewalls. Such sloped sidewalls can cause difficulty when contacting the terminal electrode as shorts may easily occur due to undesirably contacting one or more other layers of the magnetic tunnel junction stack in addition to the terminal electrode.

In some embodiments discussed herein, a non-conformal sidewall spacer is disposed adj acent to the sloped sidewall (or sidewalls) of the magnetic tunnel junction stack. While the sloped sidewall of the magnetic tunnel junction stack slopes toward the interior of the magnetic tunnel junction stack at a particular angle, the non-conformal sidewall spacer has a sidewall that does not share the angle of the sidewall of the magnetic tunnel junction stack. Instead, the sidewall of the non-conformal sidewall spacer has an increased angle with respect to the angle of the sloped sidewall of the magnetic tunnel junction stack. Such a non-conformal sidewall spacer increases the reliability of contacting only the terminal electrode (e.g., by a conductive contact) and reduces the risk of undesirable shorting.

In particular, given the magnetic tunnel junction stack is oriented vertically such that the stack includes from bottom to top a fixed or free magnet layer, a barrier layer, the other of the fixed or free magnet layer, and a terminal electrode each extending in a lateral direction and stacked in a vertical direction, the sloped sidewall of the magnetic tunnel junction stack has an angle formed by the sidewall with respect to the lateral direction that is less than 90°. For example, the angle may be less than 80°, less than 70°, in the range of about 65-80°, or the like. The sidewall of the non-conformal sidewall spacer is provided at an angle (defined again as an angle formed by the sidewall with respect to the lateral direction) that is greater than the angle of the sloped sidewall of the magnetic tunnel junction stack. For example, the angle of the sidewall of the non-conformal sidewall spacer may be about 90°, greater than 90°, greater than the angle of the sloped sidewall of the magnetic tunnel junction stack by 5°, 10°, or 15°, or the like. As will be appreciated such sidewalls may not be perfectly flat or linear and such angles may be defined with respect to locations on the sidewalls as discussed further herein.

The non-conformal sidewall spacer may include a single layer or material or it may includes multiple layers or materials. In an embodiment, the composition of the non-conformal sidewall spacer is different and provides at least partial etch selectively with respect to an insulator material disposed adj acent to at least portions of the non-conformal sidewall spacer. For example, the insulator material may provide a field insulator and the conductive contact coupled to the terminal electrode of the magnetic tunnel junction stack may be disposed in an opening of the insulator material or layer.

In an embodiment, the non-conformal sidewall spacer includes two sidewall material layers. A first sidewall material layer may be disposed adj acent to the magnetic tunnel junction stack and may have a sidewall that provides the deviation in angle from the sloped sidewall of the magnetic tunnel junction stack as discussed above. The second sidewall material layer may be disposed on or over the first sidewall material layer such that the second sidewall material layer is conformal to the first sidewall material layer and has the discussed deviation in angle from the sloped sidewall of the magnetic tunnel junction stack due to being conformal to the first sidewall material layer. In other examples, the second sidewall material layer is also non- conformal and provides additional deviation from the sloped sidewall. The composition of the second sidewall material layer may be different than and provide at least partial etch selectively with respect to the insulator material disposed adjacent to at least portions of the non-conformal sidewall spacer as discussed above. In an embodiment, the first sidewall material layer has the same composition as and/or does not have substantial etch selectively with respect to the insulator material.

The magnetic tunnel junction stack having a sloped sidewall and the adjacent non- conformal sidewall spacer may be formed using any suitable technique or techniques. For example, the magnetic tunnel junction stack having the sloped sidewall be formed by patterning and etching an un-patterned magnetic tunnel junction layer stack including a fixed or free magnet layer over a substrate, a barrier layer over the fixed or free magnet layer, the other of the fixed or free magnet layer over the barrier layer, and a terminal electrode layer over other of the fixed or free magnet layer. In an embodiment, reactive ion etching of the un-patterned layer may provide the sloped sidewall of the magnetic tunnel junction stack. A non-conformal sidewall spacer layer is then formed over the magnetic tunnel junction stack. The non-conformal sidewall spacer layer may be formed using any reentrant spacer layer or bread loafing spacer layer techniques to form a non-conformal sidewall spacer layer with a sidewall that is more vertical with respect to the sloped sidewall of the magnetic tunnel junction stack. For example, the non-conformal sidewall spacer layer may be formed using chemical vapor deposition, plasma-enhanced chemical vapor deposition, or the like. For example, using such reentrant spacer layer or bread loafing spacer layer techniques as discussed further herein, the non-conformal sidewall spacer layer may have thickness variations based on the underlying topography such that the layer is thicker in regions adj acent to (e.g., over) underlying structures that are closer to vertical is greater than the thickness in regions adjacent to (e.g., over) underlying structures that are horizontal.

In some embodiments, the magnetic tunnel junction devices or apparatuses having a magnetic tunnel junction layer stack with a sloped sidewall along with a non-conformal sidewall layer adj acent to the sloped sidewall of the magnetic tunnel junction layer stack may be integrated into a non-volatile memory device. For example, the non-volatile memory device may include a bit line of a memory array coupled to the slope walled terminal electrode (e.g., the slope walled terminal electrode being coupled to one of a fixed or free magnet layer), a second electrode coupled to the other of the fixed or free magnet layer and coupled to select transistor of the memory array, the select transistor having a first terminal coupled to the second electrode, a second terminal coupled to a source line of the memory array, and a third terminal coupled to a word line of the memory array.

The magnetic tunnel junction devices, devices, systems, techniques, and the like discussed herein may provide for improved reliability in contacting only the terminal electrode by a conductive contact and reduced risk of undesirable shorting. In some embodiments, the discussed techniques provide an improved magnetic tunnel junction device process flow to facilitate the use of reactive ion etching in forming magnetic tunnel junction stacks. As discussed herein, bread loafing or reentrant spacer techniques may allow for reliably landing conductive contacts (e.g., for electrical contact and routing) to magnetic tunnel junction stacks.

These and additional embodiments are discussed further herein with respect to the figures. FIG. 1A is a cross-sectional view of an example magnetic tunnel junction device structure 100, FIG. IB is another cross-sectional view of magnetic tunnel junction device structure 100, and FIG. 1C illustrates example relationships between components of magnetic tunnel junction device structure 100, arranged in accordance with at least some implementations of the present disclosure. As shown, FIG. 1 A provides a cross-sectional view along an x-z plane, FIG. IB provides a cross-sectional view along the A-plane in FIG. 1A (e.g., along an x-y plane) and illustrates only a magnetic tunnel junctions stack (i.e., with other components removed for the sake of clarity of presentation), and FIG. 1C illustrates relationships along the x-z plane illustrated in FIG. 1A. As illustrated, the x-y plane may be in-plane, in-line, or the like with respect to a lateral direction of magnetic tunnel junction device structure 100 and the z-direction may be perpendicular with respect to the lateral direction of magnetic tunnel junction device structure 100.

As shown, magnetic tunnel junction device structure 100 may include a substrate 101, a magnetic tunnel junction stack 107 disposed over substrate 101, a non-conformal sidewall layer 108, a dielectric layer 109, and a conductive contact 110 within an opening or trench of dielectric layer 109. As discussed further herein, non-conformal sidewall layer 108 and a dielectric layer 109 may both include dielectric materials but may have different compositions with an etch selectively therebetween. As shown, magnetic tunnel junction stack 107 includes a fixed magnet layer 102, a barrier layer 103, a free magnet layer 104, and a terminal electrode 106. In the illustrated embodiment, fixed magnet layer 102 is over substrate 101, barrier layer 103 is over fixed magnet layer 102, free magnet layer 104 is over barrier layer 103, and terminal electrode 106 is over free magnet layer 104. In other embodiments, fixed magnet layer 102 and free magnet layer 104 may switch locations such that free magnet layer 104 is over substrate 101, barrier layer 103 is over free magnet layer 104, fixed magnet layer 102 is over barrier layer 103, and terminal electrode 106 is over fixed magnet layer 102. Also as shown, fixed magnet layer 102, barrier layer 103, and fixed magnet layer 104 may form a magnetic tunnel junction 105.

For example, magnetic tunnel junction 105 includes fixed magnet layer 102 and free magnet layer 104 separated by barrier layer 103. In the illustrated embodiment, magnetic tunnel junction stack 107 is disposed over substrate 101 such that magnetic tunnel junction stack 107 includes fixed magnet layer 102 and free magnet layer 104 separated by barrier layer 103 and terminal electrode 106 opposite substrate 101 and disposed over free magnet layer 104. In another embodiment (not shown), magnetic tunnel junction stack 107 is disposed over substrate 101 such that magnetic tunnel junction stack 107 includes fixed magnet layer 102 and free magnet layer 104 separated by barrier layer 103 and terminal electrode 106 opposite substrate 101 and disposed over fixed magnet layer 102 (e.g., in an embodiment where the locations of fixed magnet layer 102 and free magnet layer 104 are swapped).

As shown, magnetic tunnel junction device structure 100 includes substrate 101.

Substrate 101 may be any suitable material or materials. In some examples, substrate lOlmay include a semiconductor material such as monocrystalline silicon substrate, a silicon on insulator, or the like. In various examples, substrate 101 may include metallization interconnect layers for integrated circuits or electronic devices such as transistors, memories, capacitors, resistors, optoelectronic devices, switches, or any other active or passive electronic devices separated by an electrically insulating layer, for example, an interlay er dielectric, a trench insulation layer, or the like. In an embodiment, substrate 101 includes a terminal electrode (not shown in FIG. 1A, please refer to terminal electrode 401 of FIG. 4A) adjacent to and coupled to fixed magnet layer 102 (or free magnet layer 104 when the magnet layers are switched).

In some embodiments, magnetic tunnel junction 105 may be a parallel magnetic tunnel junction such that that fixed magnet layer 102 and free magnet layer 104 have parallel magnetic anisotropy (e.g., substantially parallel to the x-y plane). Such parallel magnetic anisotropy may also be characterized as in-plane magnetic anisotropy such that the direction of the parallel magnetic anisotropy is in-plane with respect to the planarity of the component layers of magnetic tunnel junction stack 107. In other embodiments, magnetic tunnel junction 105 may be a perpendicular magnetic tunnel junction such that that fixed magnet layer 102 and free magnet layer 104 have perpendicular magnetic anisotropy (e.g., substantially perpendicular to the x-y plane). Such parallel or perpendicular magnetic anisotropies may be controlled based on the selected materials, thicknesses, and surface interfaces of fixed magnet layer 102 and free magnet layer 104.

Fixed magnet layer 102 may include any suitable material or material stack, thickness, or other characteristics that provides the desired parallel or perpendicular magnetic anisotropy. Fixed magnet layer 102 may be characterized as a fixed magnet, a fixed magnetic layer, a reference layer, or the like. In an embodiment, fixed magnet layer 102 includes a ferromagnetic material. Fixed magnet layer 102 may be adjacent to and coupled to a terminal electrode (not shown in FIG. 1A). In an embodiment, the thickness of the ferromagnetic material of fixed magnet layer 102 and/or the interaction of fixed magnet layer 102 with barrier layer 103 may provide for perpendicular magnetic anisotropy.

For example, the thickness of a ferromagnetic layer (i.e., fixed or free magnetic layer) may determine its equilibrium magnetization direction. When the thickness of the ferromagnetic layer is above a certain threshold (depending on the material), the ferromagnetic layer exhibits a magnetization direction which is in-plane or parallel. When the thickness of the ferromagnetic layer is below a certain threshold (again depending on the material), the ferromagnetic layer exhibits a magnetization direction that is perpendicular to the plane of the magnetic layer. For example, a relatively thin ferromagnetic material may provide for perpendicular magnetic anisotropy while providing a relatively thicker ferromagnetic material may provide in-plane magnetic anisotropy. Other factors may also influence or determine the direction of

magnetization for a ferromagnetic layer. For example, factors such as surface anisotropy

(depending on the adjacent layers or a multi-layer composition of the ferromagnetic layer) and/or crystalline anisotropy (depending on stress and the crystal lattice structure modification) may also determine or contribute to the direction of magnetization.

In some embodiments, magnetic tunnel junction 105 may be a perpendicular magnetic tunnel junction such that fixed magnet layer 102 includes a ferromagnetic material having a thickness (i.e., in the z-direction) of not more than 2 nm. In an embodiment, fixed magnet layer 102 has a thickness in the range of not less than 0.7 nm to not more than 2 nm. In some embodiments, magnetic tunnel junction 105 may be a parallel magnetic tunnel junction such that fixed magnet layer 102 includes a ferromagnetic material having a thickness (i.e., in the z- direction) of greater than 2 nm. In an embodiment, fixed magnet layer 102 includes one or more of cobalt, iron, boron, and/or nickel. In an embodiment, fixed magnet layer 102 includes cobalt iron boron (CoFeB). In an embodiment, fixed magnet layer 102 is a single material while, in other embodiments, fixed magnet layer 102 includes a stack or layers of differing materials. Barrier layer 103 may include any suitable material or materials at any suitable thickness that provides a magnetic tunnel junction between fixed magnet layer 102 and free magnet layer 104. Barrier layer 103 may be characterized as a tunnel barrier, a tunnel barrier layer, a spin filter, or the like. In an embedment, barrier layer 103 includes magnesium oxide (MgO). Barrier layer 103 may also have any suitable thickness. For example, barrier layer 103 may have a thickness (i.e., in the z-direction) of about 1 nm. In an embodiment, barrier layer 103 is MgO having a thickness in the range of not less than 0.5 nm to not more than 2 nm. Furthermore, the interaction of fixed magnet layer 102 and barrier layer 103 and free magnet layer 104 and barrier layer 103 may aid and/or provide perpendicular magnetic anisotropy through the surface anisotropy therebetween. For example, although barrier layer 103 may be any suitable material, the selection of a magnesium oxide (MgO) may be advantageous in providing perpendicular magnetic anisotropy to the adjacent magnet layers.

Free magnet layer 104 may include any suitable material or material stack, thickness, or other characteristics that provides the desired magnetic anisotropy therein. Free magnet layer 104 may be characterized as a free magnet, a free magnetic layer, a free layer, or the like. In an embodiment, free magnet layer 104 includes a ferromagnetic material. In an embodiment, the thickness of the ferromagnetic material of free magnet layer 104 and/or the interaction of free magnet layer 104 with barrier layer 103 may determine magnetic anisotropy (e.g., perpendicular or parallel) of free magnet layer 104. For example, as discussed, a relatively thin ferromagnetic material may provide for perpendicular magnetic anisotropy while providing a relatively thick ferromagnetic material may provide in-plane magnetic anisotropy. In some embodiments, magnetic tunnel junction 105 may be a perpendicular magnetic tunnel junction such that free magnet layer 104 includes a ferromagnetic material having a thickness (i.e., in the z-direction) of not more than 2 nm. In an embodiment, free magnet layer 104 has a thickness in the range of not less than 0.7 nm to not more than 2 nm. In some embodiments, magnetic tunnel junction 105 may be a parallel magnetic tunnel junction such that free magnet layer 104 includes a ferromagnetic material having a thickness (i.e., in the z-direction) of greater than 2 nm. In an embodiment, free magnet layer 104 includes one or more of cobalt, iron, boron, and/or nickel. In an embodiment, free magnet layer 104 includes cobalt iron boron (CoFeB). In an embodiment, free magnet layer 104 is a single material while, in other embodiments, free magnet layer 104 includes a stack or layers of differing materials.

As discussed with respect to fixed magnet layer 102, the interactions of free magnet layer 104 with barrier layer 103 and an optional cap layer (not shown) between free magnet layer 104 and terminal electrode 106 may aid and/or provide the perpendicular magnetic anisotropy (if desired) of free magnet layer 104 through surface anisotropy between the adjacent layers. In an embodiment, the optional cap layer comprises an oxide such as magnesium oxide, aluminum oxide (AI2O3), or the like.

Terminal electrode 106 and a terminal electrode adjacent to fixed layer 102 (e.g., within substrate 101 , not shown in FIG. 1A, please refer to FIG. 4A) may be any suitable material or materials that provide coupling to magnetic tunnel junction device structure 100. In some embodiments, the terminal electrodes include one or more of tantalum (Ta), tungsten (W), platinum (Pt), copper (Cu), ruthenium (Ru), tantalum nitride (TaN), titanium nitride (TiN), or the like. The terminal electrodes may also have any suitable thicknesses. For example, the terminal electrodes may have thicknesses in the range of about 25 to 100 nm. Terminal electrode 106 may also be characterized as an electrode, a terminal electrode layer, an electrode layer, or the like.

Component layers 102, 103, 104, 106 of magnetic tunnel junction stack 107 may include individual layers having a single material, multiple material layer stacks, or a combination thereof. Furthermore, layers 102, 103, 104, 106 of magnetic tunnel junction stack 107 may include any suitable intervening layers therebetween.

In operation as part of a memory device, a tunnel magnetoresistance (TMR) of magnetic tunnel junction device structure 100 may be sensed (e.g., via terminal electrodes). In a parallel state (e.g., with fixed magnet layer 102 and free magnet layer 104 having aligned magnetic anisotropies), the TMR may be relatively low while in an anti-parallel state (i.e., with fixed magnet layer 102 and free magnet layer 104 having misaligned magnetic anisotropies) the TMR may be relatively high. Furthermore, to change the state of the memory device, a polarized drive current may be provided (e.g., via terminal electrodes) to switch the magnetic moment of free magnet layer 104. For example, switching free magnet layer 104 between parallel and anti- parallel magnetic moments or vice versa may be provided by a drive current polarized by fixed magnet layer 102 such that providing a positive or negative voltage across the terminal electrodes provides the switching of free magnet layer 104.

Furthermore, as illustrated, magnetic tunnel junction stack 107 has sloped sidewalls including sloped sidewall 1 11. Sloped sidewall 1 11 has a distal end 1 13 thereof distal to substrate 101 that is toward an interior of magnetic tunnel junction stack 107 with respect to a proximal end 114 of sloped sidewall 1 11 that is proximal to substrate 101. For example, distal end 1 13 is in a direction 1 15 toward an interior of magnetic tunnel junction stack 107 with respect to proximal end 1 14 of sloped sidewall 1 11. As shown, the distal end of magnetic tunnel junction stack 107 (e.g., at distal end 1 13) is narrower (e.g., has a smaller width in the x-y plane) than the proximal end of magnetic tunnel junction stack 107 (e.g., at proximal end 1 14). Each component layer 102, 103, 104, 106 of magnetic tunnel junction stack 107 may also have a distal end that is narrower than a proximal end thereof (with proximal and distal being relative to substrate 101).

Also as shown, an angle between direction 115 (e.g., a direction in line with a lateral surface 1 18 of substrate 101 and lateral surfaces of other components of magnetic tunnel junction device structure 100; and parallel to the x-y plane) and a surface or line along sloped sidewall 1 11 is an acute angle. The surface or line along sloped sidewall 11 1 may be defined using any suitable features of magnetic tunnel junction stack 107 such as: a location or point at distal end 113 (e.g., maximum z point and exterior edge of terminal electrode 106) and a location or point at proximal end 1 14; a location or point at distal end 1 13 and a location 117 or point adjacent to free magnet layer 104 or a bottom of terminal electrode 106); a location or point at distal end 1 13 and a bottom most and outside most location or point (e.g., minimum z point and most exterior x point) of terminal electrode 106; a location or point at distal end 1 13 and a most exterior edge of any of fixed magnet layer 102, barrier layer 103, or free magnet layer 104; or the like.

In an embodiment, the angle between direction 1 15 and sloped sidewall 1 1 1 may be defined between direction 1 15 and a line including distal end 1 13 and proximal and 1 14 of magnetic tunnel junction stack 107 as shown by angle d in FIG. 1C. However, angle d may be defined using any suitable features of magnetic tunnel junction stack 107. Angle d may be any suitable value less than 90°. In an embodiment, angle d is not more than 80°. In an embodiment, angle d is not more than 70°. In an embodiment, angle d is not more than 60°. In an embodiment, angle d is in the range of 70-80°. As discussed, angle d may be defined with respect to a line including distal end 1 13 and proximal and 114 of magnetic tunnel junction stack 107.

Magnetic tunnel junction stack 107 may have any suitable shape such that magnetic tunnel junction stack 107 includes sloped sidewall 11 1 as discussed herein. As shown with respect to FIG. IB, in an embodiment, magnetic tunnel junction stack 107 has layers (e.g., fixed magnet layer 102, barrier layer 103, free magnet layer 104, and terminal electrode 106) having substantially circular cross sections and magnetic tunnel junction stack 107 has a substantially conical shape (please refer to FIG. 1 A) such that the conical shape has a substantially flat surface at a distal end of terminal electrode 106. In such embodiments, magnetic tunnel junction stack 107 (or terminal electrode 106 of magnetic tunnel junction stack 107) may be characterized as a dot or the like. However, magnetic tunnel junction stack 107 may have layers with any suitable cross sectional shapes such as oval, square, rectangular, regular polygon, or the like.

Correspondingly, sloped sidewall 1 1 1 may be flat or rounded in the x-y plane. As used herein, the term sloped sidewall 1 1 1 includes any suitable shape and is not restricted to having a flat surface. Returning to FIG. 1A, in an embodiment, non-conformal sidewall layer 108 includes a sidewall portion 121 having a top surface 116 and a sidewall 112 (or sidewall surface), and a planar portion 120. As shown, planar portion 120 has a thickness c (e.g., a depth or distance in the z dimension). Planar portion 120 of non-conformal sidewall layer 108 may extend between sidewalls of non-conformal sidewall layer 108 (and corresponding magnetic tunnel junctions stacks). In some embodiments, planar portion 120 may be removed and sidewall 112 of sidewall portion 121 may extend to substrate 101.

Furthermore, non-conformal sidewall layer 108 (which also may be characterized as a sidewall layer or the like) includes sidewall portion 121 (e.g., a non-conformal sidewall) having sidewall 112 such that sidewall portion 121 is adjacent to sloped sidewall 111 of magnetic tunnel junction stack 107. Sidewall portion 121 may be in contact with sloped sidewall 111 of magnetic tunnel junction stack 107 or one or more intervening layers may be therebetween. As shown, sidewall 112 of sidewall portion 121 is at a first lateral distance a (e.g., width) from sloped sidewall 111 at top surface 116 of sidewall portion 121 and a second lateral distance b (e.g., width) from sloped sidewall 111 of magnetic tunnel junction stack 107 at a location 117 between top surface 116 and substrate 101 such that the first lateral distance a exceeds the second lateral distance b. For example, lateral distances a and b may be taken in a direction parallel to direction 115, along the x-y plane, and lateral with respect to substrate 101 and the layers of magnetic tunnel junction stack 107. Second lateral distance b may be determined at any location between top surface 116 and substrate 101 such as adjacent to a bottom surface of terminal electrode 106, adjacent to free magnet layer 104 (as shown), adjacent to barrier layer 103, adjacent to fixed magnet layer 102, or the like. As shown, at such locations, second lateral distance b is less than first lateral distance a (e.g., first lateral distance a exceeds second lateral distance b).

Furthermore, an angle between direction 115 (e.g., a direction in line with a lateral surface 118 of substrate 101 and lateral surfaces of other components of magnetic tunnel junction device structure 100; and parallel to the x-y plane) and a surface or line along sidewall 112 is at a greater angle than the angle between direction 115 and a surface or line along sloped sidewall 111. In the embodiment illustrated in FIG. 1 A, the angle between direction 115 and a surface or line along sidewall 112 is about 90° (e.g., sidewall 112 and direction 115 are substantially perpendicular). However, the angle between direction 115 and a surface or line along sidewall 112 may be any suitable angle that is greater than the angle between direction 115 and a surface or line along sloped sidewall 111.

The surface or line along sidewall 112 may be defined using any suitable features of non- conformal sidewall layer 108 such as: a location or point at the far exterior end of sidewall portion 121 at top surface 116 (e.g., maximum z point and exterior edge of sidewall portion 121) and a location or point at an inflection 122 between sidewall portion 121 and planar portion 120; the location or point at the far exterior end of sidewall portion 121 at top surface 116 and an interface of sidewall 112 of sidewall portion 121 and substrate 101 (e.g., in embodiments where planar portion 120 is removed and sidewall 112 of sidewall portion 121 extends to substrate

101); two locations or points along sidewall 112 between the far exterior end of sidewall portion 121 at top surface 116 and inflection 122 (or the sidewall 112 and substrate 101 interface); or the like.

In an embodiment, the angle between direction 115 and sidewall 112 may be about 90° as shown by angle e in FIG. 1C. However, angle e may be any suitable value greater than angle d. In an embodiment, angle e is not less than 10° greater than angle d. In an embodiment, angle e is not less than 20° greater than angle d. In an embodiment, angle e is not less than 30° greater than angle d. In an embodiment, angle e is not less than 40° greater than angle d. Furthermore, although illustrated with respect to angle e being about 90° in FIG. 1C (and FIG. 1A), angle e may be any suitable value. In an embodiment, angle e is in the range of 80° to 90°. In an embodiment, angle e is in the range of 85° to 90°. Furthermore, angle e may be greater than 90° in some embodiments. For example, angle e may be in the range of 80° to 100°, 90° to 120°, or the like. In an embodiment, angle e is not less than 100°. An embodiment having angle e greater than 90° is illustrated with respect to FIG. ID.

FIG. ID is a cross-sectional view of an example magnetic tunnel junction device structure

150, arranged in accordance with at least some implementations of the present disclosure.

Magnetic tunnel junction device structure 150 may include any materials, configurations, characteristics, or the like discussed with respect to magnetic tunnel junction device structure 100 where like components are labeled with the same reference numbers. As shown, sidewall portion 131 of magnetic tunnel junction device structure 150 has a sidewall surface 132 that extends vertically at an angle away from the interior of magnetic tunnel junction stack 107 (as shown by direction 115). In such embodiments, first lateral distance a is substantially lager than second lateral distance b. Furthermore, with reference to FIG. 1C, angle e of sidewall surface 132 may be greater than 90° as discussed. As shown in FIG. ID, in some embodiments, sloped sidewall 111 angles toward the interior of magnetic tunnel junction stack 107 while sidewall surface 132 of sidewall portion angles away from the interior of magnetic tunnel junction stack 107 (e.g., toward an exterior of magnetic tunnel junction stack 107). As discussed above, in the context of FIG. ID and with reference to FIG. 1C, angle e of sidewall surface 132 may be in the range of 90° to 100°, in the range of 100° to 110°, in the range of 110° to 120°, or the like. Furthermore, the difference between angle e and angle d (defined as discussed above) may be not less than 60°, not less than 40°, not less than 20° or the like. For example, the difference between angle e and angle d may be in the range of 20° to 30°, in the range of 30° to 40°, in the range of 40° to 60°, or the like.

With reference to FIGS. 1A and ID, first lateral distance a, second lateral distance b, and thickness c may be any suitable values such that first lateral distance a exceeds second lateral distance b. In an embodiment, second lateral distance b (e.g., adjacent to free magnet layer 104 or a bottom of terminal electrode 106) is in the range of about 3 to 7 nm with 5 nm being particularly advantageous. Furthermore, a critical dimension or lateral distance of magnetic tunnel junction stack 107 may be taken at fixed magnet layer 102 such that a width or lateral distance of fixed magnet layer 102 is in the range of 15 to 50 nm. In an embodiment, first lateral distance a is in the range of about 9 to 15 nm. In an embodiment, first lateral distance a is in the range of about 15 to 25 nm. In an embodiment, first lateral distance a is in the range of about 20 to 35 nm. As discussed, first lateral distance a exceeds second lateral distance b. First lateral distance a may exceed second lateral distance b by any suitable distance such as a distance in the range of 4 to 6 nm, a distance in the range of 6 to 20 nm, a distance in the range of 20 to 36 nm, a distance in the range of 36 to 80 nm, or the like. Thickness c may be any suitable value such as 5 to 10 nm. As discussed, in some embodiments, planar portion 120 may not be provided.

Furthermore, conductive contact 110 within dielectric layer 109 may contact an exposed portion 119 of terminal electrode 106. Conductive contact 110 may be any suitable material or materials such as copper, aluminum, or the like and conductive contact 110 may provide routing from terminal electrode 106 to external circuitry. As discussed further herein, non-conformal sidewall layer 108 may eliminate or reduce undesirable shorting of conductive contact 110 (e.g., conductive contact 110 contacting one or more of free magnet layer 104, barrier layer 103, or fixed magnet layer 102). Furthermore, a conductive contact (not shown) may contact a second terminal electrode (not shown) of magnetic tunnel junction device structure 100 (or any other magnetic tunnel junction device structure discussed herein) to provide coupling to fixed magnet layer 102 from external circuitry for operation of magnetic tunnel junction device structure 100 as discussed herein.

Non-conformal sidewall layer 108 may include any suitable material or materials. In an embodiment, non-conformal sidewall layer 108 is a dielectric material having relative permittivity of not greater than 8. In an embodiment, non-conformal sidewall layer 108 is a silicon nitride or a doped silicon nitride. In an embodiment, non-conformal sidewall layer 108 is a silicon oxide or a doped silicon oxide. In an embodiment, non-conformal sidewall layer 108 has a different composition than dielectric layer 109. In an embodiment, there is an etch selectivity between non-conformal sidewall layer 108 and dielectric layer 109 as is discussed further herein. In an embodiment, non-conformal sidewall layer 108 is a silicon nitride or a doped silicon nitride and dielectric layer 109 is a silicon oxide or a doped silicon oxide. In an embodiment, dielectric layer 109 and non-conformal sidewall layer 108 are both silicon compounds or silicon based compounds such that dielectric layer 109 has a greater percentage of oxygen than non-conformal sidewall layer 108 and non-conformal sidewall layer 108 has a greater percentage of nitrogen than dielectric layer 109. For example, dielectric layer 109 and non-conformal sidewall layer 108 may both be silicon compounds or silicon based compounds such that dielectric layer 109 has a higher concentration of oxygen than non-conformal sidewall layer 108 and non-conformal sidewall layer 108 has a higher concentration of nitrogen than dielectric layer 109.

As discussed, non-conformal sidewall layer 108 may include a single material layer or multiple material layers.

FIG. 2 is a cross-sectional view of an example magnetic tunnel junction device structure 200, arranged in accordance with at least some implementations of the present disclosure.

Magnetic tunnel junction device structure 200 may include any materials, configurations, characteristics, or the like discussed with respect to magnetic tunnel junction device structure 100 where like components are labeled with the same reference numbers. As shown, a non-conformal sidewall layer 215 of magnetic tunnel junction device structure 200 includes a first sidewall material layer 201 and a second sidewall material layer 202. First sidewall material layer 201 includes or provides a sidewall portion 231 that is non-conforming with sloped sidewall 111 as discussed with respect to sidewall portion 131. Second sidewall material layer 202 includes a sidewall portion 212 and a planar portion 220. As shown, in some embodiments second sidewall material layer 202 is conformal to first sidewall material layer 201 and in such embodiments, second sidewall material layer 202 may be characterized as a conformal sidewall portion.

As shown, sidewall portion 231 and sidewall portion 212 provide a top surface 216. Sidewall portions 231, 212 of first sidewall material layer 201 and second sidewall material layer 202 provide a first lateral distance a and a second lateral distance b between sloped sidewall 111 and a sidewall 232 (or sidewall surface) of second sidewall material layer 202 in analogy to the lateral distances discussed with respect to FIGS. 1A and ID. As shown, planar portion 220 has a thickness c (e.g., a depth or distance in the z dimension). Planar portion 220 of second sidewall material layer 202 may extend between sidewalls of second sidewall material layer 202 (and corresponding magnetic tunnel junctions stacks). In some embodiments, planar portion 220 may be removed and sidewall 232 of sidewall portion 212 may extend to substrate 101. As shown, sidewall portion 231 of first sidewall material layer 201 is adjacent to sloped sidewall 111 of magnetic tunnel junction stack 107. As discussed above, an angle between direction 115 (e.g., a direction in line with a lateral surface 118 of substrate 101 and lateral surfaces of other components of magnetic tunnel junction device structure 200; and parallel to the x-y plane) and a surface or line along sidewall 213 (or sidewall surface) is at a greater angle than the angle between direction 115 and a surface or line along sloped sidewall 111. In the embodiment illustrated in FIG. 2, the angle between direction 115 and a surface or line along sidewall 213 is about 90° (e.g., sidewall 213 and direction 115 are substantially perpendicular). However, the angle between direction 115 and a surface or line along sidewall 213 may be any suitable angle that is greater than the angle between direction 115 and a surface or line along sloped sidewall 111.

The surface or line along sidewall 213 may be defined using any suitable features of sidewall portion 231 such as: a location or point at the far exterior end of sidewall portion 231 at top surface 216 (e.g., maximum z point and exterior edge of sidewall portion 231) and a location or point at an the far exterior end of sidewall portion 231 at substrate 101 ; two locations or points along sidewall 213 between the far exterior end of sidewall portion 231 at top surface 216 and far exterior end of sidewall portion 231 at substrate 101; or the like. In an embodiment, the angle between direction 115 and sidewall 213 may be about 90° as shown in FIG. 2 (in analogy to angle e discussed with respect to FIG. 1C). However, the angle between direction 115 and sidewall 213 may be any suitable value greater than angle d (please refer to FIG. 1C). In an embodiment, the angle between direction 115 and sidewall 213 is not less than 10° greater than angle d. In an embodiment, the angle between direction 115 and sidewall 213 is not less than 20° greater than angle d. In an embodiment, the angle between direction 115 and sidewall 213 is not less than 30° greater than angle d. In an embodiment, the angle between direction 115 and sidewall 213 is not less than 40° greater than angle d.

Furthermore, although illustrated with respect to the angle between direction 115 and sidewall 213 being about 90° in FIG. 2, the angle between direction 115 and sidewall 213 may be any suitable value. In an embodiment, the angle between direction 115 and sidewall 213 is in the range of 80° to 90°. In an embodiment, the angle between direction 115 and sidewall 213 is in the range of 85° to 90°. Furthermore, the angle between direction 115 and sidewall 213 may be greater than 90° in some embodiments (as discussed with respect to FIG. ID). For example, the angle between direction 115 and sidewall 213 may be in the range of 80° to 100°, 90° to 120°, or the like. In an embodiment, the angle between direction 115 and sidewall 213 is not less than 100°. As shown, sidewall portion 212 of second sidewall material layer 202 may be

substantially conformal to sidewall portion 231 in some embodiments. In other embodiments, sidewall portion 212 of second sidewall material layer 202 extends a greater distance from sidewall portion 231 at top surface 216 than at inflection 222. In some embodiments, based on sidewall portion 212 substantially conforming to sidewall portion 231, the angle between direction 115 and sidewall 232 be substantially the same or similar to those characteristics discussed above with respect to the angle between direction 115 and sidewall 213. For example, a surface or line along sidewall 232 may be defined using any suitable features of sidewall portion 212 such as: a location or point at the far exterior end of sidewall portion 212 at top surface 216 (e.g., maximum z point and exterior edge of sidewall portion 212) and inflection

222; the location or point at the far exterior end of sidewall portion 232 at top surface 216 and an interface sidewall surface 232 of sidewall portion 212 and substrate 101 (e.g., in embodiments where planar portion 220 is removed and sidewall 232 of sidewall portion 212 extends to substrate 101); two locations or points along sidewall 232 between the far exterior end of sidewall portion 212 at top surface 216 and inflection 222; or the like.

In an embodiment, the angle between direction 115 and sidewall 232 may be about 90°. However, the angle between direction 115 and sidewall 232 may be any suitable value greater than angle d (please refer to FIG. 1C). In an embodiment, the angle between direction 115 and sidewall 232 is not less than 10° greater than angle d. In an embodiment, the angle between direction 115 and sidewall 232 is not less than 20° greater than angle d. In an embodiment, the angle between direction 115 and sidewall 232 is not less than 30° greater than angle d. In an embodiment, the angle between direction 115 and sidewall 232 is not less than 40° greater than angle d. Furthermore, the angle between direction 115 and sidewall 232 may be any suitable value. In an embodiment, the angle between direction 115 and sidewall 232 is in the range of 80° to 90°. In an embodiment, the angle between direction 115 and sidewall 232 is in the range of 85° to 90°. Furthermore, the angle between direction 115 and sidewall 232 (as discussed with respect to FIG. ID) may be greater than 90° in some embodiments. For example, the angle between direction 115 and sidewall 232 may be in the range of 80° to 100°, 90° to 120°, or the like. In an embodiment, the angle between direction 115 and sidewall 232 is not less than 100°.

Furthermore, with reference to FIG. 2, first lateral distance a, second lateral distance b, and thickness c may be any suitable values such that first lateral distance a exceeds second lateral distance b. In an embodiment, second lateral distance b (e.g., adjacent to free magnet layer 104 or a bottom of terminal electrode 106) is in the range of about 5 to 10 nm with 8 nm being particularly advantageous (e.g., with about 4 nm of lateral distance for both first sidewall material layer 201 and second sidewall material layer 202). Furthermore, as discussed, the lateral distance of magnetic tunnel junction stack 107 may be taken at fixed magnet layer 102 such that a width or lateral distance of fixed magnet layer 102 is in the range of 15 to 50 nm. In an embodiment, first lateral distance a is in the range of about 12 to 20 nm. In an embodiment, first lateral distance a is in the range of about 20 to 35 nm. In an embodiment, first lateral distance a is in the range of about 35 to 50 nm. As discussed, first lateral distance a exceeds second lateral distance b. First lateral distance a may exceed second lateral distance b by any suitable distance such as a distance in the range of 4 to 6 nm, a distance in the range of 6 to 20 nm, a distance in the range of 20 to 36 nm, a distance in the range of 36 to 80 nm, or the like. Thickness c may be any suitable value such as 5 to 10 nm. As discussed, in some embodiments, planar portion 220 may not be provided.

First sidewall material layer 201 may include any suitable material or materials. In an embodiment, first sidewall material layer 201 is a dielectric material having relative permittivity of not greater than 8. In an embodiment, first sidewall material layer 201 is a silicon nitride or a doped silicon nitride. In an embodiment, first sidewall material layer 201 is a silicon oxide or a doped silicon oxide. Similarly, second sidewall material layer 202 may include any suitable material or materials. In an embodiment, second sidewall material layer 202 is a dielectric material having relative permittivity of not greater than 8. In an embodiment, second sidewall material layer 202 is a silicon nitride or a doped silicon nitride. In an embodiment, second sidewall material layer 202 is a silicon oxide or a doped silicon oxide. In an embodiment, first sidewall material layer 201 has a different composition than second sidewall material layer 202 and the same or similar composition of dielectric layer 109. In an embodiment, there is an etch selectivity first sidewall material layer 201 and second sidewall material layer 202 but not between first sidewall material layer 201 and dielectric layer 109 as is discussed further herein. In an embodiment, second sidewall material layer 202 is a silicon nitride or a doped silicon nitride and first sidewall material layer 201 and dielectric layer 109 are silicon oxide or doped silicon oxides.

In an embodiment, first sidewall material layer 201 and second sidewall material layer 202 are both silicon compounds or silicon based compounds such that first sidewall material layer 201 has a greater percentage of oxygen than second sidewall material layer 202 and second sidewall material layer 202 has a greater percentage of nitrogen than first sidewall material layer 201. For example, first sidewall material layer 201 and second sidewall material layer 202 may both be silicon compounds or silicon based compounds such that first sidewall material layer 201 has a higher concentration of oxygen than second sidewall material layer 202 and second sidewall material layer 202 has a higher concentration of nitrogen than first sidewall material layer 201. In an embodiment, first sidewall material layer 201, second sidewall material layer 202, and dielectric layer 109 are all silicon compounds or silicon based compounds such that first sidewall material layer 201 and dielectric layer 109 both have a greater percentage of oxygen than second sidewall material layer 202 and second sidewall material layer 202 has a greater percentage of nitrogen than both first sidewall material layer 201 and dielectric layer 109. For example, first sidewall material layer 201, second sidewall material layer 202, and dielectric layer 109 may all be silicon compounds or silicon based compounds such that first sidewall material layer 201 and dielectric layer 109 both have a higher concentration of oxygen than second sidewall material layer 202 and second sidewall material layer 202 has a higher concentration of nitrogen than both first sidewall material layer 201 and dielectric layer 109.

FIG. 3 is a flow diagram illustrating an example process 300 for fabricating magnetic tunnel junction device structures, arranged in accordance with at least some implementations of the present disclosure. For example, process 300 may be implemented to fabricate magnetic tunnel junction device structures 100, 150, 200 or any other fabricate magnetic tunnel junction device structure discussed herein. In the illustrated implementation, process 300 may include one or more operations as illustrated by operations 301-306. However, embodiments herein may include additional operations, certain operations being omitted, or operations being performed out of the order provided. In an embodiment, process 300 may fabricate magnetic tunnel junction device structure 407 (i.e., via operations 301-303) as discussed further herein with respect to FIGS. 4A-4C, magnetic tunnel junction device structure 511 as discussed further herein with respect to FIGS. 5A-5E, and/or magnetic tunnel junction device structure 619 as discussed further herein with respect to FIGS. 6A-6G.

Process 300 may begin at operation 301, where a substrate may be received for processing. The substrate may include any suitable substrate such as a silicon wafer or the like. In some embodiments, the substrate includes underlying devices or electrical interconnects or the like. For example, the substrate may include a terminal electrode for coupling to a fixed magnet layer as discussed with respect to FIG. 4A. In an embodiment, substrate 101 may be received for processing as discussed with respect to FIG. 4A.

Processing may continue at operation 302, where an un-patterned fixed magnet layer (or free magnet layer), an un-patterned barrier magnet layer, an un-patterned free magnet layer (or fixed magnet layer), and an un-patterned terminal electrode layer may be disposed over the substrate. In an embodiment, such un-patterned layers may be disposed over substrate 101 as discussed with respect to FIG. 4B. As discussed, at operations 302, multiple layers are disposed. Such operations may be characterized as disposition or deposition operations, which may be performed separately or together.

Each of the indicated layers may be disposed using any suitable technique or techniques such as deposition techniques. In an embodiment, one, some or all of the layers are deposited using physical vapor deposition techniques. As will be appreciated, such layers may be deposited on the layer disposed previously or an intervening layer or layers may be between the layer being disposed currently operation and the layer previously disposed. In an embodiment, a cap layer is disposed between the free magnet layer and the terminal electrode. In an embodiment, the layers disposed at operations 302 are deposited in situ such that the depositions are performed in place without the substrate being moved or altered between layer depositions and without exposing the layers to an atmospheric environment between such depositions. For example, the layers disposed at operation 302 may be deposited using sequential in situ physical vapor depositions.

For example, at operation 302, a fixed magnet layer may be disposed on or over the substrate using any suitable technique or techniques such as deposition techniques (e.g., physical vapor deposition). The fixed magnet layer may have any characteristics discussed herein with respect to fixed magnet layer 102. Furthermore, at operation 302, a barrier layer may be disposed on or over the fixed magnet layer using any suitable technique or techniques such as deposition techniques (e.g., physical vapor deposition). The barrier layer may have any characteristics discussed herein with respect to barrier layer 103. A free magnet layer may be disposed on or over the barrier layer using any suitable technique or techniques such as deposition techniques (e.g., physical vapor deposition). The free magnet layer may have any characteristics discussed herein with respect to free magnet layer 104. An optional cap layer may be disposed on or over the free magnet layer using any suitable technique or techniques such as deposition techniques (e.g., physical vapor deposition). The cap layer may be any suitable oxide as discussed herein. A terminal electrode layer may be disposed over the free magnet layer (e.g., or over the optional cap layer) using any suitable technique or techniques such as deposition techniques (e.g., physical vapor deposition). The terminal electrode layer may have any characteristics discussed herein with respect to terminal electrode 106.

Although discussed with respect to depositions in the order of: fixed magnet layer, barrier layer, free magnet layer, and terminal electrode layer, in some embodiments, the order of the fixed and free magnet layer may be reversed. In such embodiments, the depositions are in the order of: free magnet layer, barrier layer, fixed magnet layer, and terminal electrode layer.

Processing may continue from operation 302 at operation 303, where the layers deposited at operation 302 may be patterned. The layers received at operation 302 may be patterned using any suitable technique or techniques such as photolithography and etch operations or the like. In an embodiment, a photoresist pattern is provided, and the terminal electrode layer disposed at operation 302 is patterned and used as a hard mask to partem the underlying layers. In an embodiment, reactive ion etching is used to pattern the fixed magnet layer, barrier layer, free magnet layer, and terminal electrode layer. Such reactive ion etching may provide the sloped sidewalls in a magnetic tunnel junction stack as discussed herein. For example, operation 302 may generate patterned layers including a patterned fixed magnet layer, a patterned barrier layer, a patterned free magnet layer, and a patterned terminal electrode layer. In an embodiment, operation 302 may generate magnetic tunnel junction stack 107 over substrate 101 as discussed with respect to FIG. 4C. Furthermore, as shown, operations 302 and 303 may collectively provide a magnetic tunnel junction stack generation operation 308. A magnetic tunnel junction device structure generated by magnetic tunnel junction stack generation operation 308 may be processed as discussed herein with respect to FIGS. 5A-5E or as discussed herein with respect to FIGS. 6A-6G to generate a magnetic tunnel junction device structure having a non-conformal sidewall structure.

For example, operations 302 and 303 provide for disposing a magnetic tunnel junction stack may over a substrate such that the magnetic tunnel junction stack includes a fixed magnet layer and a free magnet layer separated by a barrier layer and a first electrode opposite the substrate and coupled to the free magnet layer. Furthermore, a sidewall of the magnetic tunnel junction stack is sloped such that a first end of the first sidewall distal to the substrate is toward an interior of the magnetic tunnel junction stack with respect to a second end of the first sidewall proximal to the substrate as discussed herein.

Processing may continue at operation 304, where a non-conformal layer may be disposed or formed over the magnetic tunnel junction stack. The non-conformal layer may be formed using any suitable technique or techniques. In an embodiment, the non-conformal layer or a non- conformal layer of a non-conformal layer stack may be formed using chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), low pressure chemical vapor deposition (LPCVD), or the like under conditions where non-conformal deposition occurs. For example, the thickness of the non-conformal layer may vary with variations in the underlying topography to produce lesser thicknesses on lateral or planar surfaces while producing greater thicknesses on substantially vertical surfaces and/or adjacent to substantially vertical surfaces. Processing conditions for generating such topographic effects are known to those of skill in the art. For example, such processing conditions may be those that produce "bread loafing" effects, those that produce reentrant spacer material layers, or the like. For example, when formed of a silicon oxide or doped silicon oxide, the non-conformal layer may be deposited via PECVD using silane as a silicon source and nitrous oxide as an oxygen source. In an embodiment, such a PECVD may be performed at a near vacuum pressure at a temperature of about 400°C. However, as discussed, any suitable non-conformal layer disposition techniques may be used.

As discussed herein, a non-conformal sidewall layer may include a single layer or multiple layers such as two layers. In embodiments where the non-conformal sidewall layer includes a single layer, the non-conformal layer formed at operation 304 also includes a single layer. In such embodiments, the non-conformal layer may be formed as discussed above as a single layer. For example, in an embodiment, operation 304 may generate magnetic tunnel junction device structure 501 as discussed with respect to FIG. 5A.

In embodiments where the non-conformal sidewall layer includes multiple layers such as two layers the non-conformal layer formed at operation 304 may be formed by disposing a non- conformal layer as discussed, etching back the non-conformal layer to expose a portion of the terminal electrode of the magnetic tunnel junction stack, and disposing a second layer (either conformal or non-conformal to provide the multiple material non-conformal sidewall layer. For example, in an embodiment, operation 304 may generate magnetic tunnel junction device structure 608 as discussed with respect to FIGS. 6A-6C.

Processing may continue at operation 305, where a dielectric layer may be disposed over the non-conformal layer disposed at operation 304. The dielectric layer may include any suitable dielectric material discussed herein and the dielectric layer may be disposed using any suitable technique or techniques. For example, the dielectric layer may be disposed using CVD techniques, PECVD techniques, LPCVD techniques, or the like. Furthermore, in an embodiment, the dielectric layer has an etch selectivity with respect to the non-conformal sidewall layer or at least a portion of the non-conformal sidewall layer disposed at operation 303. In an embodiment, operation 305 may generate magnetic tunnel junction device structure 503 as discussed with respect to FIG. 5B. In an embodiment, operation 304 may generate magnetic tunnel junction device structure 611 as discussed with respect to FIG. 6D.

Processing may continue at operation 306, where an opening may be formed in the dielectric layer and a portion of the terminal electrode of the magnetic tunnel junction stack formed at operation 303 may be exposed. The processing at operation 306 may form any non- conformal sidewall layer as discussed herein. The processing at operation 306 may be performed using any suitable technique or techniques. In an embodiment, a resist pattern is formed over the dielectric layer using photolithography techniques and the opening is formed and the portion of the terminal electrode is exposed using etch techniques. As discussed, an etch selectivity may be provided between the dielectric layer and the non-conformal layer or a portion of the non- conformal layer. In an embodiment, an etchant selective to the dielectric layer may be used. As will be appreciated, such etching may also etch a portion of the non-conformal layer due to the etch selectivity being imperfect between the dielectric layer and the non-conformal layer.

Thereby the portion of the terminal electrode is exposed. In an embodiment, operation 306 may generate magnetic tunnel junction device structure 509 as discussed with respect to FIG. 5D. In an embodiment, operation 304 may generate magnetic tunnel junction device structure 617 as discussed with respect to FIG. 6F.

Processing may continue at operation 307, where a conductive contact may be disposed within the opening of the dielectric layer and coupled to the exposed portion of the terminal electrode. The conductive contact may be disposed within the opening of the dielectric layer and coupled to the exposed portion of the terminal electrode using any suitable technique or techniques. In an embodiment, the conductive contact is disposed using deposition, patterning, and optional polishing techniques. In an embodiment, the conductive contact is disposed using deposition and polishing techniques. In an embodiment, operation 307 may generate magnetic tunnel junction device structure 511 as discussed with respect to FIG. 5E. In an embodiment, operation 304 may generate magnetic tunnel junction device structure 619 as discussed with respect to FIG. 6G.

After operation 306, optional annealing may be performed and an optional magnetic field may be applied to the magnetic tunnel junction device structure. For example, the component layers may be annealed and a magnetic field may be applied to the patterned layers to generate a magnetic tunnel junction device structure such as magnetic tunnel junction device structure 100, 150, 200 or the like. The discussed optional annealing may be performed at any suitable temperature(s) and duration(s) to, for example, set the crystalline structure of the barrier layer and/or to drive boron from one or both of the free magnet layer and the fixed magnet layer. In an embodiment, the anneal operation(s) have a maximum temperature in the range of about 350 to 400°C. Furthermore, the applied magnetic field may be at any suitable field strength such as 1 to 5 Teslas for any suitable duration. Such magnetic field application may establish the magnetism of one or both layers of the free magnet layer and the fixed magnet layer. The anneal and magnetic field application may be performed separately or at lest partially simultaneously.

FIGS. 4A, 4B, and 4C are side views of example magnetic tunnel junction device structures as particular fabrication operations are performed, arranged in accordance with at least some implementations of the present disclosure. FIGS. 4A, 4B, and 4C illustrate side views of magnetic tunnel junction device structures along the x-z plane as discussed with respect to FIGS. 1A-1D and 2.

As shown in FIG. 4A, magnetic tunnel junction device structure 400 includes substrate 101. For example, substrate 101 may be any substrate such as a substrate wafer received at operation 101. In some examples, substrate 101 may include a semiconductor material such as monocrystalline silicon substrate, a silicon on insulator, or the like. In various examples, substrate 101 may include metallization interconnect layers for integrated circuits or electronic devices such as transistors, memories, capacitors, resistors, optoelectronic devices, switches, or any other active or passive electronic devices separated by an electrically insulating layer, for example, an interlay er dielectric, a trench insulation layer, or the like. As shown, in some embodiments, substrate 101 includes a terminal electrode 401 for coupling to a fixed or free magnet layer as discussed below. Terminal electrode 401 may include any suitable material or material such as tantalum (Ta), tungsten (W), platinum (Pt), copper (Cu), ruthenium (Ru), tantalum nitride (TaN), titanium nitride (TiN), or the like and terminal electrode 401 may be formed within substrate 101 using any suitable technique or techniques such as patterning and etch techniques or the like. Terminal electrode is not illustrated in FIGS. 4C, 5A-5E, and 6A-6G for the sake of clarity of presentation.

FIG. 4B illustrates a magnetic tunnel junction device structure 402 similar to magnetic tunnel junction device structure 400, after the disposition of a fixed magnet layer 403, a barrier layer 404, a free magnet layer 405, and a terminal electrode layer 406. For example, fixed magnet layer 403, barrier layer 404, free magnet layer 405, and terminal electrode layer 406 may be characterized as un-patterned layers. Fixed magnet layer 403, barrier layer 404, free magnet layer 405, and terminal electrode layer 406 may be formed in a bulk manner over substrate 101 (and terminal electrode 401). The illustrated layers may be formed using any suitable technique or techniques such as deposition techniques including physical vapor deposition or any other operations discussed with respect to operation 302 or elsewhere herein. As shown, the illustrated layers may be formed in a horizontal or planar manner (e.g., along the x-y plane or lateral surface 118 of substrate 101). Furthermore, fixed magnet layer 403, barrier layer 404, free magnet layer 405, and terminal electrode layer 406 may include any characteristics discussed herein with respect to fixed magnet layer 102, barrier layer 103, free magnet layer 104, and terminal electrode 106 (e.g., materials, thicknesses, etc.).

FIG. 4C illustrates a magnetic tunnel junction device structure 407 similar to magnetic tunnel junction device structure 402, after the patterning of fixed magnet layer 403, barrier layer

404, free magnet layer 405, and terminal electrode layer 406 to provide fixed magnet layer 102, barrier layer 103, free magnet layer 104, and terminal electrode 106. For example, fixed magnet layer 102, barrier layer 103, free magnet layer 104, and terminal electrode 106 may be characterized as patterned layers. The illustrated layers may be patterned using any suitable technique or techniques. In an embodiment, photolithography techniques may be used to provide a patterned resist layer (not shown) over terminal electrode layer 406 and etch techniques may be used to pattern fixed magnet layer 403, barrier layer 404, free magnet layer 405, and terminal electrode layer 406 to provide fixed magnet layer 102, barrier layer 103, free magnet layer 104, and terminal electrode 106. In an embodiment, the pattern of the resist layer may be transferred to terminal electrode layer 406/106, which may be used as a hardmask to pattern the other layers. As shown, after such processing (e.g., reactive ion etch processing), magnetic tunnel junction stack 107 including fixed magnet layer 102, barrier layer 103, free magnet layer 104, and terminal electrode 106 includes sloped sidewall 111 as discussed herein.

After such patterning, fixed magnet layer 102 adjacent to substrate 101 (or a free magnet layer adjacent to substrate 101 when the locations of such layers are swapped) may have a width or lateral distance /in the range of about 15 to 50 nm. Furthermore at the distal end of magnetic tunnel junction stack 107, the top or distal surface of terminal electrode 106 may have a width or lateral distance g that is in the range of about 30% of lateral distance f to about 80% of lateral distance For example, lateral distance g may be in the range of about 5 nm to about 40 nm.

As discussed, magnetic tunnel junction device structure 407 may be further processed to provide a non-conformal sidewall layer, a dielectric layer, and a conductive contact coupled to an exposed portion of terminal electrode 106. Such processing may be performed as shown with respect to FIGS. 5A-5E or FIGS. 6A-6G as discussed below.

FIGS. 5A, 5B, 5C, 5D, and 5E are side views of example magnetic tunnel junction device structures as particular fabrication operations are performed, arranged in accordance with at least some implementations of the present disclosure. FIGS. 5A, 5B, 5C, 5D, and 5E illustrate side views of magnetic tunnel junction device structures along the x-z plane as discussed herein.

FIG. 5A illustrates a magnetic tunnel junction device structure 501 similar to magnetic tunnel junction device structure 407 illustrated in FIG. 4C, after the disposition of a non- conformal layer 502. For example, non-conformal layer 502 may be characterized as non- conformal layer due to the layer having a lesser thickness over underlying planar topography regions (e.g., under planar portion 120 of non-conformal layer 502) and a greater thickness over or adjacent to non-planar or substantially vertical surfaces such as over sloped sidewall 111 of magnetic tunnel junction stack 107. Non-conformal layer 502 may be formed using any suitable technique or techniques such as the CVD, PECVD, or LPCVD techniques discussed with respect to operation 304. As shown, non-conformal layer 502 has a lesser thickness over underlying planar topography and a greater thickness over or adjacent to non-planar or substantially vertical surfaces. Such a topography of non-conformal layer 502 may provide first lateral distance a, second lateral distance b, and thickness c in planar portion 120, which may have any values discussed herein, as well as sidewall 112 having any suitable characteristics (e.g., angles and the like) as discussed herein. Furthermore, non-conformal layer 502 may have a thickness h over the distal end of magnetic tunnel junction stack 107 (i.e., over the distal end of terminal electrode 106). The thickness h may be any suitable thickness such as a thickness of about such as 5 to 10 nm or a thickness of about 8 to 15 nm. In some embodiments, thickness h exceeds thickness c.

FIGS. 5A, 5B, 5C, 5D, and 5E illustrate example embodiments corresponding to magnetic tunnel junction device structure 100 as shown in FIG. 1A. However, substantially similar fabrication operations may be employed to generate magnetic tunnel junction device structure 150 as shown in FIG. ID. For example, at operation 304, a non-conformal layer in analogy to non-conformal layer 502 may be generated such that the non-conformal layer has the characteristic profile and dimensions (e.g., first lateral distance a, second lateral distance b, thickness c, and sidewall angles) discussed with respect to magnetic tunnel junction device structure 150 of FIG. ID.

FIG. 5B illustrates a magnetic tunnel junction device structure 503 similar to magnetic tunnel junction device structure 501, after the disposition of a dielectric layer 504. For example, dielectric layer 504 may be characterized as an un-patterned dielectric layer. Dielectric layer 504 may be formed using any suitable technique or techniques such as those discussed with respect to operation 305. For example, dielectric layer 504 may be formed using CVD techniques, PECVD techniques, LPCVD techniques, or the like followed by optional planarization techniques. As shown, dielectric layer 504 may have a substantially planar top surface 505. Dielectric layer 504 may include any materials and/or characteristics discussed herein with respect to dielectric layer 109.

FIG. 5C illustrates a magnetic tunnel junction device structure 506 similar to magnetic tunnel junction device structure 503, after the formation of a pattemed layer 507. Patterned layer 507 may include any suitable material or materials such as a photoresist and patterned layer 507 may formed using any suitable technique or techniques such as photolithography techniques. As shown, patterned layer 507 includes an opening 508 to transfer a pattern to dielectric layer 504 and to expose a portion of terminal electrode 106 for conductive contact to terminal electrode 106. FIG. 5D illustrates a magnetic tunnel junction device structure 509 similar to magnetic tunnel junction device structure 506, after the formation of dielectric layer 109 and exposure of exposed portion 119 by the removal of a portion of non-conformal layer 502 to form non- conformal sidewall layer 108. For example, dielectric layer 109 may be characterized as a patterned dielectric layer. Such formation of dielectric layer 109 and exposure of exposed portion 119 by the removal of a portion of non-conformal layer 502 may be performed using any suitable technique or techniques such as those discussed with respect to operation 306 or elsewhere herein. In an embodiment, the formation of dielectric layer 109 and exposure of exposed portion 119 by the removal of a portion of non-conformal layer 502 to form non-conformal sidewall layer 108 includes an etch of the exposed portion of dielectric layer 504 and the exposed portion of non-conformal layer 502 (i.e., as exposed by patterned layer 507). As discussed, an etch selectivity may be provided between dielectric layer 504 and non-conformal layer 502 or a portion of the non-conformal layer. In an embodiment, an etchant selective to dielectric layer 504 may be used and such etching (although selective) may also etch a portion of non-conformal layer 502 to expose exposed portion 119 of terminal electrode 106.

In an embodiment, such etch selectivity may be provided by dielectric layer 504 and non- conformal layer 502 having different compositions. In an embodiment, dielectric layer 504 and non-conformal layer 502 are both silicon compounds or silicon based compounds such that dielectric layer 504 has a greater percentage of oxygen than non-conformal layer 502 and non- conformal layer 502 has a greater percentage of nitrogen than dielectric layer 504. For example, dielectric layer 504 and non-conformal layer 502 may have any compositions as discussed with respect to dielectric layer 109 and non-conformal sidewall layer 108. Also as shown in FIG. 5D, top surface 116 of sidewall portion 121 may be formed such that top surface 1 16 of sidewall portion 121 is recessed with respect to a top surface of exposed portion 1 19 of terminal electrode 106.

FIG. 5E illustrates a magnetic tunnel junction device structure 511 similar to magnetic tunnel junction device structure 509, after the formation of conductive contact 1 10 within opening 510 of dielectric layer 109 such that conductive contact 1 10 is coupled to exposed portion 119 of terminal electrode 106. For example, magnetic tunnel junction device structure 511 may match magnetic tunnel junction device structure 100 as discussed with respect to FIG. 1A. Conductive contact 110 may be formed within opening 510 using any suitable technique or techniques such as those techniques discussed with respect to operation 307. For example, conductive contact 110 may be disposed within opening 510 of dielectric layer 109 and coupled to exposed portion 119 of terminal electrode 106 using metal deposition, patterning, and polishing techniques.

FIGS. 6A, 6B, 6C, 6D, 6E, 6F, and 6G are side views of example magnetic tunnel junction device structures as particular fabrication operations are performed, arranged in accordance with at least some implementations of the present disclosure. FIGS. 6A, 6B, 6C, 6D, 6E, 6F, and 6G illustrate side views of magnetic tunnel junction device structures along the x-z plane as discussed herein.

FIG. 6A illustrates a magnetic tunnel junction device structure 601 similar to magnetic tunnel junction device structure 407 illustrated in FIG. 4C, after the disposition of a non- conformal layer 602. Non-conformal layer 602 may be formed using any suitable technique or techniques such as the CVD, PECVD, or LPCVD techniques discussed with respect to operation 304. For example, non-conformal layer 602 may be characterized as non-conformal layer due to the layer having a lesser thickness over underlying planar topography regions (e.g., under a planar portion 603 of non-conformal layer 602) and a greater thickness over or adjacent to non- planar or substantially vertical surfaces such as over sloped sidewall 111 of magnetic tunnel junction stack 107 (e.g., in a sidewall portion 604 of non-conformal layer 602). Such a topography of non-conformal layer 602 may provide first lateral distance j, second lateral distance k, and thickness n in planar portion 120, which may have any values discussed herein with respect to first lateral distance a, second lateral distance b, and thickness c, as well as sidewall 213 having any suitable characteristics (e.g., angles and the like) as discussed herein. Furthermore, non-conformal layer 602 may have a thickness m over the distal end of magnetic tunnel junction stack 107 (i.e., over the distal end of terminal electrode 106). The thickness m may be any suitable thickness such as a thickness of about such as 5 to 10 nm or a thickness of about 8 to 15 nm. In some embodiments, thickness m exceeds thickness n.

FIG. 6B illustrates a magnetic tunnel junction device structure 605 similar to magnetic tunnel junction device structure 601, after the removal of portions of non-conformal layer 602 to form first sidewall material layer 201. The removal of portions of non-conformal layer 602 to form first sidewall material layer 201 having sidewall 213 may be performed using any suitable technique or techniques such as anisotropic etch techniques. As shown, the portions removed from non-conformal layer 602 may include planar portion 603 and a top portion of non- conformal layer 602 over first sidewall material layer 201. In the illustrated embodiment, the removal exposes a portion of terminal electrode 106 such that a top surface 606 of first sidewall material layer 201 is substantially planar with respect to a top surface 607 of terminal electrode 106. In other embodiments, a portion of first sidewall material layer 201 may cover top surface 607 of terminal electrode 106 (such that the portion is removed in the operation discussed with respect to FIG. 6F). In yet other embodiments, top surface 606 of first sidewall material layer 201 may be below top surface 607 of terminal electrode 106.

FIG. 6C illustrates a magnetic tunnel junction device structure 608 similar to magnetic tunnel junction device structure 605, after the disposition of a layer 609. Layer 609 may be conformal (e.g., such that a thickness of layer 609 is substantially uniform over the underlying topology of layer 609) as illustrated in FIG. 6C or non-conformal (e.g., such that layer 609 has a lesser thickness over underlying planar topography regions and a greater thickness over or adjacent to non-planar or substantially vertical surfaces). Layer 609 may be formed using any suitable technique or techniques such as the CVD, PECVD, LPCVD, or the like. As shown, first sidewall material layer 201 and layer 609 may provide first lateral distance a, second lateral distance b, and thickness c having any suitable dimensions as discussed herein. First sidewall material layer 201 and layer 609 may be provided such that they have different compositions and such that there is an etch selectivity therebetween. Layer 609 may include any suitable material as discussed herein with respect to second sidewall material layer 202.

As shown, in an embodiment, layer 609 may be characterized as conformal layer due to the layer having a the same or substantially the same thickness over the underlying topography of layer 609. For example, a planar portion 220 of layer 609 may have substantially the same thickness c (e.g., in the z-dimension) as a thickness (e.g., in the x-dimension) over sidewall 232 and over a top of terminal electrode 107. In other embodiments, layer 609 may be non-conformal and may have a lesser thickness c than the thickness over sidewall 323 such that layer 609 extends in directions 610, 611 away from corner of first sidewall material layer 201 in analogy to the sidewalls illustrated in FIG. ID of sidewall portion 131.

FIG. 6D illustrates a magnetic tunnel junction device structure 611 similar to magnetic tunnel junction device structure 608, after the disposition of a dielectric layer 612. For example, dielectric layer 612 may be characterized as an un-patterned dielectric layer. Dielectric layer 612 may be formed using any suitable technique or techniques such as those discussed with respect to operation 305. For example, dielectric layer 612 may be formed using CVD techniques, PECVD techniques, LPCVD techniques, or the like followed by optional planarization techniques. As shown, dielectric layer 504 may have a substantially planar top surface 613. Dielectric layer 612 may include any materials and/or characteristics discussed herein with respect to dielectric layer 109.

FIG. 6E illustrates a magnetic tunnel junction device structure 614 similar to magnetic tunnel junction device structure 611, after the formation of a patterned layer 615. Patterned layer 615 may include any suitable material or materials such as a photoresist and patterned layer 615 may formed using any suitable technique or techniques such as photolithography techniques. As shown, patterned layer 615 includes an opening 616 to transfer a pattern to dielectric layer 612 and to expose a portion of terminal electrode 106 for conductive contact to terminal electrode 106.

FIG. 6F illustrates a magnetic tunnel junction device structure 617 similar to magnetic tunnel junction device structure 614, after the formation of dielectric layer 109 and exposure of exposed portion 119 by the removal of a portion of layer 609 to form a non-conformal sidewall layer including first sidewall material layer 201 and second sidewall material layer 202. For example, dielectric layer 109 may be characterized as a patterned dielectric layer. Such formation of dielectric layer 109 and exposure of exposed portion 1 19 by the removal of a portion of layer 609 may be performed using any suitable technique or techniques such as those discussed with respect to operation 306 or elsewhere herein. In an embodiment, the formation of dielectric layer 109 and exposure of exposed portion 119 by the removal of a portion of layer 609 includes an etch of the exposed portion of dielectric layer 612 and the exposed portion of layer 609 (i.e., as exposed by patterned layer 615). As discussed, an etch selectivity may be provided between dielectric layer 612 and layer 609. In an embodiment, an etchant selective to dielectric layer 612 may be used and such etching (although selective) may also etch a portion of layer 609 to expose exposed portion 119 of terminal electrode 106. In some embodiments, as discussed, prior to such etching, a portion of first sidewall material layer 201 may also cover exposed portion 119. In such embodiments, the etch operation also removes the portion of first sidewall material layer 201 may covering exposed portion 1 19 to expose exposed portion 119 of terminal electrode 106.

In an embodiment, the etch selectivity between dielectric layer 612 and layer 609 may be provided by the layers having different materials (e.g., dielectric layer 612 being silicon oxide or a doped silicon oxide and layer 609 being silicon nitride or a doped silicon nitride). Such etch selectively may protect first sidewall material layer 201 during the etch such that undesirable shorting (as discussed) by contacting layers of magnetic tunnel junction stack 107 other than terminal electrode 106 does not occur. The dual material non-conformal sidewall layer (e.g., including first sidewall material layer 201 and second sidewall material layer 202) may provide the advantage of allowing a silicon oxide or doped silicon oxide to be used to provide the discussed non-conformal topography as such topographies may be more readily attained using silicon oxide. In such embodiments, second sidewall material layer 202 including silicon nitride may then provide the discussed etch selectivity with respect to dielectric layer 612 to avoid shorting of magnetic tunnel junction stack 107 during an etch that is substantially selective to dielectric layer 612. Also as shown in FIG. 6F, top surface 216 of sidewall portion 231 and sidewall portion 212 may be formed such that top surface 216 of sidewall portion 231 and sidewall portion 212 is recessed with respect to a top surface of exposed portion 1 19 of terminal electrode 106.

FIG. 6G illustrates a magnetic tunnel junction device structure 619 similar to magnetic tunnel junction device structure 617, after the formation of conductive contact 110 within opening 618 of dielectric layer 109 such that conductive contact 1 10 is coupled to exposed portion 119 of terminal electrode 106. For example, magnetic tunnel junction device structure 619 may match magnetic tunnel junction device structure 200 as discussed with respect to FIG. 2. Conductive contact 1 10 may be formed within opening 618 using any suitable technique or techniques such as those techniques discussed with respect to operation 307. For example, conductive contact 110 may be disposed within opening 618 of dielectric layer 109 and coupled to exposed portion 1 19 of terminal electrode 106 using metal deposition, patterning, and polishing techniques.

The magnetic tunnel junction device structures discussed herein may be integrated into any suitable devices such as non-volatile memory devices or the like. Furthermore, such devices having the discussed magnetic tunnel junction device structures may be implemented in any suitable form factor device such as mobile devices or the like.

FIG. 7 is a schematic of a non-volatile memory device 701 including a magnetic tunnel junction device structure having non-conformal sidewall layer, arranged in accordance with at least some implementations of the present disclosure. For example, non-volatile memory device 701 may provide a spin transfer torque memory (STTM) bit cell of a spin transfer torque random access memory (STTRAM). Non-volatile memory device 701 may be implemented in any suitable component or device or the like such as any component discussed with respect to FIGS. 9 and 10. In an embodiment, non-volatile memory device 701 is implemented in a non-volatile memory that is coupled to a processor. For example, the non-volatile memory and processor may be implemented by a system having any suitable form factor. In an embodiment, the system further includes an antenna and a battery such that each of the antenna and the battery are coupled to the processor.

As shown, non-volatile memory device 701 includes magnetic tunnel junction device structure 100. As shown, magnetic tunnel junction device structure 100 includes substrate 101, terminal electrode 106, magnetic tunnel junction 105 (i.e., including fixed magnet layer 102, barrier layer 103, and free magnet layer 104), non-conformal sidewall layer 108, and terminal electrode 401. Magnetic tunnel junction device structure 710 may also include dielectric layer 109 and conductive contact 1 10 (which are not shown for the sake of clarity) as discussed herein. For example, conductive contact 110 may provide routing to any metal interconnect discussed with respect to FIG. 7. Non-volatile memory device 701 is illustrated with magnetic tunnel junction device structure 100. However, non-volatile memory device 701 may include any suitable magnetic tunnel junction device structure discussed herein such as magnetic tunnel junction device structure 150 or magnetic tunnel junction device structure 200. As discussed herein, magnetic tunnel junction 105 may include fixed and free magnet layers with parallel or perpendicular magnetic anisotropy such that magnetic tunnel junction 105 is provided in the illustrated orientation or with fixed magnet layer 102 and free magnet layer 104 swapped with respect to barrier layer 103.

Furthermore, as discussed herein, non-volatile memory device 701 includes magnetic tunnel junction stack 107 over substrate 101 such that magnetic tunnel junction stack 107 includes magnetic tunnel junction 105 (e.g., having fixed magnet layer 102 and free magnet layer 104 separated by barrier layer 103) and terminal electrode 106 opposite substrate 101 and coupled to the free or fixed magnet layer (e.g., free magnet layer 104 in the illustrated example) of magnetic tunnel junction 105. As shown, sloped sidewall 1 11 of magnetic tunnel junction stack 107 is sloped such that a first end of sloped sidewall 11 1 distal to the substrate is toward an interior of magnetic tunnel junction stack 107 with respect to a second end of sloped sidewall 1 11 proximal to substrate 101. Furthermore, sloped sidewall 11 1 provides for a narrower distal end of each of terminal electrode 106, free magnet layer 104, barrier layer 103, and fixed magnet layer 102 with respect to the proximal end of such layers (where proximal and distal are with respect to substrate 101). Also as shown, magnetic tunnel junction device structure 100 includes terminal electrode 401.

Furthermore, non-volatile memory device 701 includes a first metal interconnect 792 (e.g., a bit line), a second metal interconnect 791 (e.g., source line), a transistor 715 (e.g., a select transistor) having a first terminal 716, a second terminal 717, and a third terminal 718, and a third metal interconnect 793 (e.g., a word line). Terminal electrode 106 of magnetic tunnel junction device structure 100 is coupled to first metal interconnect 792 (optionally via conductive contact 110, not shown) and terminal electrode 401 of magnetic tunnel junction device structure 100 is coupled to second terminal 717 of transistor 715. Furthermore, first terminal 716 (e.g., a gate terminal) of transistor 715 is coupled to third metal interconnect 793 and third terminal 718 of transistor 715 is coupled to second metal interconnect 791. Such connections may be made in any manner conventional in the art. In Spin Hall Effect (SHE) implementations, terminal electrode 106 is further coupled to a fourth metal interconnect 794 (e.g., maintained at a reference potential relative to first metal interconnect 792). Non-volatile memory device 701 may further include additional read and write circuitry (not shown), a sense amplifier (not shown), a bit line reference (not shown), and the like, as understood by those skilled in the art of nonvolatile memory devices. A plurality of non-volatile memory devices 701 may be operably connected to one another to form a memory array (not shown) such that the memory array may be incorporated into a non-volatile memory device.

In operation, non-volatile memory device 701 uses magnetic tunnel junction 105 for switching and detection of the memory state of magnetic tunnel junction 105. For example, nonvolatile memory device 701 is read by accessing or sensing the memory state as implemented by a parallel or non-parallel magnetic direction of free magnet layer 104 of magnetic tunnel junction 105. More specifically, the magnetoresistance of magnetic tunnel junction 105 is established by the magnetic direction stored by free magnet layer 104. When the magnetic direction of free magnet layer 104 is parallel with respect to the magnetic direction of fixed magnet layer 102, magnetic tunnel junction 105 has a low resistance state and, when the magnetic direction of free magnet layer 104 is anti-parallel with respect to the magnetic direction of fixed magnet layer

102, magnetic tunnel junction 105 has a high resistance state. Such a low or high resistance state may be detected via the circuitry of non-volatile memory device 701. For write operations, the magnetic direction of free magnet layer 104 is optionally switched between parallel and anti- parallel directions by passing, again via the circuitry of non-volatile memory device 701 , a driving current polarized by fixed magnet layer 102 through free magnet layer 104 such that, for example, a positive voltage applied to free magnet layer 104 switches the magnetization direction of free magnet layer 104 to anti-parallel and a negative voltage switches the magnetization direction of free magnet layer 104 to parallel.

The magnetic tunnel junction device structures discussed herein may be provided in any suitable device (e.g., STTM, STTRAM, etc.) or platform (e.g., computing, mobile, automotive, internet of things, etc.) using any suitable die layout, architecture or the like. Furthermore, nonvolatile memory device 701 or any magnetic tunnel junction device structures may be located on a substrate such as a bulk semiconductor material as part of a wafer. In an embodiment, the substrate is a bulk semiconductor material as part of a chip that has been separated from a wafer. One or more layers of interconnects and/or devices may be between the magnetic tunnel junction device structures and the substrate and/or one or more layers of interconnects and/or devices may be between the magnetic tunnel junction device structures and interconnects above the magnetic tunnel junction device structures. FIG. 8 illustrates an example cross-sectional die layout 800 including example magnetic tunnel junction device structure 100, arranged in accordance with at least some implementations of the present disclosure. For example, cross-sectional die layout 800 illustrates magnetic tunnel junction device structure 100 formed in metal 3 (M3) and metal 2 (M2) layer regions thereof. Although illustrated with respect to magnetic tunnel junction device structure 100, any magnetic tunnel junction device structure discussed herein such as magnetic tunnel junction device structure 150 or magnetic tunnel junction device structure 200 may be implemented in the die layout of FIG. 8. As shown in FIG. 8, cross-sectional die layout 800 illustrates an active region having a transistor MN including diffusion region 801, a gate terminal 802, a drain terminal 804, and a source terminal 803. For example, transistor MN may implement transistor 715 (with gate terminal 802 being first terminal 716, drain terminal 804 being second terminal 717, and source terminal 803 being third terminal 718), the source line (SL) may implement second metal interconnect 791, and the bit-line may implement first metal interconnect 792.

As shown, source terminal 803 is coupled to SL (source line) via poly or via, where the SL is formed in metal 0 (M0). In some embodiments, drain terminal 804 is coupled to MOa (also in metal 0) through a via 805. Drain terminal 804 is coupled to magnetic tunnel junction device structure 710 through via 0-1 (e.g., a via layer that connects metal 0 to metal 1 layers), metal 1 (Ml), via 1-2 (e.g., a via layer that connects metal 1 to metal 2 layers), and metal 2 (M2).

Magnetic tunnel junction device structure 710 is coupled to a bit-line in metal 4 (M4). In some embodiments, magnetic tunnel junction device structure 710 is formed in the metal 3 (M3) region. In some embodiments, transistor MN is formed in or on the front side of a die while magnetic tunnel junction device structure 710 is located in or the back end of the die. In some embodiments, magnetic tunnel junction device structure 710 is located in the back end metal layers or via layers for example in Via 3.

Although illustrated with magnetic tunnel junction device structure 100 formed in metal 3

(M3), magnetic tunnel junction device structure 100 (or any other magnetic tunnel junction device structure discussed herein) may be formed in any suitable layer of cross-sectional die layout 800. In some embodiments, magnetic tunnel junction device structure 100 is formed in metal 2 and/or metal 1 layer regions. In such embodiments, magnetic tunnel junction device structure 100 may directly connect to MOa and the bit-line may be formed in metal 3 or metal 4.

FIG. 9 illustrates a system 900 in which a mobile computing platform 905 and/or a data server machine 906 employs a magnetic tunnel junction device having a non-conformal sidewall layer, arranged in accordance with at least some implementations of the present disclosure. Data server machine 906 may be any commercial server, for example, including any number of high- performance computing platforms disposed within a rack and networked together for electronic data processing, which in the exemplary embodiment includes a packaged device 950. For example, device 950 (e.g., a memory or processor) may include a magnetic tunnel junction device having a non-conformal sidewall layer. In an embodiment, device 950 includes a non- volatile memory including a magnetic tunnel junction device having an in-plane magnet layer such as any magnetic tunnel junction device structure discussed herein. As discussed below, in some examples, device 950 may include a system on a chip (SOC) such as SOC 960, which is illustrated with respect to mobile computing platform 905. The magnetic tunnel junction device having a non-conformal sidewall layer implemented in system 900 may include any

characteristic(s) discussed herein. For example, any of magnetic tunnel junction device structures 100, 150, 200 may be implemented in system 900.

Mobile computing platform 905 may be any portable device configured for each of electronic data display, electronic data processing, wireless electronic data transmission, or the like. For example, mobile computing platform 905 may be any of a tablet, a smart phone, a laptop computer, etc., and may include a display screen (e.g., a capacitive, inductive, resistive, or optical touchscreen), a chip-level or package-level integrated system 910, and a battery 915. Although illustrated with respect to mobile computing platform 905, in other examples, chip- level or package-level integrated system 910 and a battery 915 may be implemented in a desktop computing platform, an automotive computing platform, an internet of things platform, or the like.

Whether disposed within integrated system 910 illustrated in expanded view 920 or as a stand-alone packaged device within data server machine 906, SOC 960 may include memory circuitry and/or processor circuitry 940 (e.g., RAM, a microprocessor, a multi-core

microprocessor, graphics processor, etc.), a PMIC 930, a controller 935, and a radio frequency integrated circuit (RFIC) 925 (e.g., including a wideband RF transmitter and/or receiver (TX/RX)). As shown, one or more magnetic tunnel junction devices having non-conformal sidewall layers such as any magnetic tunnel junction device structure discussed herein may be employed via memory circuitry and/or processor circuitry 940. In some embodiments, RFIC 925 includes a digital baseband and an analog front end module further comprising a power amplifier on a transmit path and a low noise amplifier on a receive path). Functionally, PMIC 930 may perform battery power regulation, DC-to-DC conversion, etc., and so has an input coupled to battery 915, and an output providing a current supply to other functional modules. Battery 915 provides power to mobile computing platform 905. As further illustrated in FIG. 9, in the exemplary embodiment, RFIC 925 has an output coupled to an antenna (not shown) to implement any of a number of wireless standards or protocols, including but not limited to Wi-Fi (IEEE 802.11 family), WiMAX (IEEE 802.16 family), IEEE 802.20, long term evolution (LTE), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPRS, CDMA, TDMA, DECT, Bluetooth, derivatives thereof, as well as any other wireless protocols that are designated as 3G, 4G, 5G, and beyond. Memory circuitry and/or processor circuitry 940 may provide memory functionality for SOC 960, high level control, data processing and the like for SOC 960. In alternative

implementations, each of the SOC modules may be integrated onto separate ICs coupled to a package substrate, interposer, or board.

FIG. 10 is a functional block diagram of a computing device 1000, arranged in accordance with at least some implementations of the present disclosure. Computing device 1000 or portions thereof may be implemented via one or both of data server machine 906 or mobile computing platform 905, for example, and further includes a motherboard 1002 hosting a number of components, such as but not limited to a processor 1001 (e.g., an applications processor) and one or more communications chips 1004, 1005. Processor 1001 may be physically and/or electrically coupled to motherboard 1002. In some examples, processor 1001 includes an integrated circuit die packaged within the processor 1001. In general, the term "processor" may refer to any device or portion of a device that processes electronic data from registers and/or memory to transform that electronic data into other electronic data that may be stored in registers and/or memory.

In various examples, one or more communication chips 1004, 1005 may also be physically and/or electrically coupled to the motherboard 1002. In further implementations, communication chips 1004 may be part of processor 1001. Depending on its applications, computing device 1000 may include other components that may or may not be physically and electrically coupled to motherboard 1002. These other components may include, but are not limited to, volatile memory (e.g., DRAM) 1007, 1008, non-volatile memory (e.g., ROM) 1010, a graphics processor 1012, flash memory, global positioning system (GPS) device 1013, compass 1014, a chipset 1006, an antenna 1016, a power amplifier 1009, a touchscreen controller 1011, a touchscreen display 1017, a speaker 1015, a camera 1003, and a battery 1018, as illustrated, and other components such as a digital signal processor, a crypto processor, an audio codec, a video codec, an accelerometer, a gyroscope, and a mass storage device (such as hard disk drive, solid state drive (SSD), compact disk (CD), digital versatile disk (DVD), and so forth), or the like.

Communication chips 1004, 1005 may enable wireless communications for the transfer of data to and from the computing device 1000. The term "wireless" and its derivatives may be used to describe circuits, devices, systems, methods, techniques, communications channels, etc., that may communicate data through the use of modulated electromagnetic radiation through a non- solid medium. The term does not imply that the associated devices do not contain any wires, although in some embodiments they might not. Communication chips 1004, 1005 may implement any of a number of wireless standards or protocols, including but not limited to those described elsewhere herein. As discussed, computing device 1000 may include a plurality of communication chips 1004, 1005. For example, a first communication chip may be dedicated to shorter range wireless communications such as Wi-Fi and Bluetooth and a second

communication chip may be dedicated to longer range wireless communications such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, Ev-DO, and others. For example, any component of computing device 1000 may include or utilize one or more magnetic tunnel junction devices having a non-conformal sidewall layers such as any magnetic tunnel junction device structure(s) discussed herein.

As used in any implementation described herein, the term "module" refers to any combination of software, firmware and/or hardware configured to provide the functionality described herein. The software may be embodied as a software package, code and/or instruction set or instructions, and "hardware", as used in any implementation described herein, may include, for example, singly or in any combination, hardwired circuitry, programmable circuitry, state machine circuitry, and/or firmware that stores instructions executed by programmable circuitry. The modules may, collectively or individually, be embodied as circuitry that forms part of a larger system, for example, an integrated circuit (IC), system on-chip (SoC), and so forth.

While certain features set forth herein have been described with reference to various implementations, this description is not intended to be construed in a limiting sense. Hence, various modifications of the implementations described herein, as well as other implementations, which are apparent to persons skilled in the art to which the present disclosure pertains are deemed to lie within the spirit and scope of the present disclosure.

The following examples pertain to further embodiments.

In one or more first embodiments, a magnetic tunnel junction device comprises a magnetic tunnel junction stack over a substrate, the magnetic tunnel junction stack including a fixed magnet layer and a free magnet layer separated by a barrier layer and a terminal electrode opposite the substrate and over one of the fixed magnet layer or the free magnet layer such that a first sidewall of the magnetic tunnel junction stack is sloped such that a first end of the first sidewall distal to the substrate is toward an interior of the magnetic tunnel junction stack with respect to a second end of the first sidewall proximal to the substrate, a non-conformal sidewall layer adjacent to the first sidewall of the magnetic tunnel junction stack, the non-conformal sidewall layer having a second sidewall at a first lateral distance from the first sidewall at a top surface of the non-conformal sidewall layer and a second lateral distance from the sidewall of the magnetic tunnel junction stack at a location between the top surface and the substrate such that the first lateral distance exceeds the second lateral distance, and a conductive contact coupled to a portion of the terminal electrode exposed by the non-conformal sidewall layer.

In one or more second embodiments, for any of the first embodiments, the first sidewall is sloped at an angle of not more than 80 degrees with respect to a lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack.

In one or more third embodiments, for any of the first or second embodiments, the first sidewall is sloped at an angle of not more than 80 degrees with respect to a lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack and the second sidewall is sloped at an angle of not less than 90 degrees with respect to the lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack.

In one or more fourth embodiments, for any of the first through third embodiments, the first sidewall is sloped at an angle of not more than 80 degrees with respect to a lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack and the second sidewall is sloped at an angle of not less than 100 degrees with respect to the lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack.

In one or more fifth embodiments, for any of the first through fourth embodiments, the non-conformal sidewall layer comprises a first sidewall material layer in contact with the first sidewall and a second sidewall material layer having a different composition than the first sidewall material layer and the second sidewall comprises the second sidewall material.

In one or more sixth embodiments, for any of the first through fifth embodiments, the non-conformal sidewall layer comprises a first sidewall material layer in contact with the first sidewall and a second sidewall material layer having a different composition than the first sidewall material, and the second sidewall comprises the second sidewall material, the first sidewall is sloped at an angle of not more than 80 degrees with respect to a lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack, the first sidewall material layer has a third sidewall that is sloped at an angle of not less than 90 degrees with respect to the lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack, and the second sidewall material is conformal to the first sidewall material layer.

In one or more seventh embodiments, for any of the first through sixth embodiments, the non-conformal sidewall layer comprises a first sidewall material layer in contact with the first sidewall and a second sidewall material layer having a different composition than the first sidewall material, and the second sidewall comprises the second sidewall material, the first sidewall material layer and the second sidewall material layer comprise silicon compounds, the first sidewall material layer has a greater percentage of oxygen than the second sidewall material layer and the second sidewall material layer has a greater percentage of nitrogen than the first sidewall material layer.

In one or more eighth embodiments, for any of the first through seventh embodiments, the non-conformal sidewall layer comprises a first sidewall material layer in contact with the first sidewall and a second sidewall material layer having a different composition than the first sidewall material, and the second sidewall comprises the second sidewall material, the first sidewall is sloped at an angle of not more than 80 degrees with respect to a lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack, the first sidewall material layer has a third sidewall that is sloped at an angle of not less than 90 degrees with respect to the lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack, and the second sidewall material is conformal to the first sidewall material layer and/or the first sidewall material layer and the second sidewall material layer comprise silicon compounds, the first sidewall material layer has a greater percentage of oxygen than the second sidewall material layer and the second sidewall material layer has a greater percentage of nitrogen than the first sidewall material layer.

In one or more ninth embodiments, for any of the first through eighth embodiments, the conductive contact is within an opening of a dielectric layer having a different composition than the non-conformal sidewall layer and the dielectric layer is in contact with a portion of the second sidewall.

In one or more tenth embodiments, for any of the first through ninth embodiments, the conductive contact is within an opening of a dielectric layer having a different composition than the non-conformal sidewall layer and the dielectric layer is in contact with a portion of the second sidewall, the dielectric layer and the non-conformal sidewall layer comprise silicon compounds, the dielectric layer has a greater percentage of oxygen than the non-conformal sidewall layer and the non-conformal sidewall layer has a greater percentage of nitrogen than the dielectric layer.

In one or more eleventh embodiments, for any of the first through tenth embodiments, the top surface of the non-conformal sidewall layer is between a top surface of the terminal electrode and a bottom surface of the terminal electrode and the location between the top surface and the substrate is laterally adjacent to one of the free layer, the barrier layer, or the fixed layer.

In one or more twelfth embodiments, for any of the first through eleventh embodiments, the fixed and free magnet layers comprise cobalt, iron, and boron and the barrier layer comprises magnesium oxide.

In one or more thirteenth embodiments, for any of the first through twelfth embodiments, the fixed and free magnet layers have perpendicular magnetic anisotropy.

In one or more fourteenth embodiments, a system includes a processor and a non-volatile memory coupled to the processor, the non-volatile memory including a magnetic tunnel junction device according to any of the first through thirteenth embodiments.

In one or more fifteenth embodiments, for any of the fourteenth embodiments, the system further includes an antenna coupled to the processor and a battery coupled to the processor.

In one or more sixteenth embodiments, a system includes a means for storing data including a magnetic tunnel junction device according to any of the first through thirteenth embodiments and a means for processing the stored data coupled to the means for storing data.

In one or more seventeenth embodiments, for any of the sixteenth embodiments, the system further includes a means for transmitting wireless data coupled to the means for processing the stored data.

In one or more eighteenth embodiments, a non-volatile memory device comprises a magnetic tunnel junction stack over a substrate, the magnetic tunnel junction stack including a fixed magnet layer and a free magnet layer separated by a barrier layer and a first electrode opposite the substrate and coupled to the free magnet layer such that a first sidewall of the magnetic tunnel junction stack is sloped such that a first end of the first sidewall distal to the substrate is toward an interior of the magnetic tunnel junction stack with respect to a second end of the first sidewall proximal to the substrate, a bit line of a memory array coupled to the first electrode, a non-conformal sidewall layer adjacent to the first sidewall of the magnetic tunnel junction stack, the non-conformal sidewall layer having a second sidewall at a first lateral distance from the first sidewall at a top surface of the non-conformal sidewall layer and a second lateral distance from the sidewall of the magnetic tunnel junction stack at a location between the top surface and the substrate such that the first lateral distance exceeds the second lateral distance, and a second electrode coupled to the fixed magnet layer and a transistor of the memory array, such that the transistor comprises a first terminal coupled to the second electrode, a second terminal coupled to a source line of the memory array, and a third terminal coupled to a word line of the memory array.

In one or more nineteenth embodiments, for any of the eighteenth embodiments, the first sidewall is sloped at an angle of not more than 80 degrees with respect to a lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack and the second sidewall is sloped at an angle of not less than 90 degrees with respect to the lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack.

In one or more twentieth embodiments, for any of the eighteenth or nineteenth embodiments, the non-conformal sidewall layer comprises a first sidewall material layer in contact with the first sidewall and a second sidewall material layer having a different composition than the first sidewall material layer, the second sidewall comprises the second sidewall material, the first sidewall is sloped at an angle of not more than 80 degrees with respect to a lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack, the first sidewall material layer has a third sidewall that is sloped at an angle of not less than 90 degrees with respect to the lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack, and the second sidewall material is conformal to the first sidewall material layer.

In one or more twenty-first embodiments, for any of the eighteenth through twentieth embodiments, the conductive contact is within an opening of a dielectric layer having a different composition than the non-conformal sidewall layer and the dielectric layer is in contact with a portion of the second sidewall.

In one or more twenty-second embodiments, for any of the eighteenth through twenty- first embodiments, the top surface of the non-conformal sidewall layer is between a top surface of the terminal electrode and a bottom surface of the terminal electrode and the location between the top surface and the substrate is laterally adjacent to one of the free layer, the barrier layer, or the fixed layer.

In one or more twenty -third embodiments, a system comprises a means for storing data including a magnetic tunnel junction stack over a substrate, the magnetic tunnel junction stack including a fixed magnet layer and a free magnet layer separated by a barrier layer and a terminal electrode opposite the substrate and over one of the fixed magnet layer or the free magnet layer such that a first sidewall of the magnetic tunnel junction stack is sloped such that a first end of the first sidewall distal to the substrate is toward an interior of the magnetic tunnel junction stack with respect to a second end of the first sidewall proximal to the substrate, a non-conformal sidewall layer adjacent to the first sidewall of the magnetic tunnel junction stack, the non- conformal sidewall layer having a second sidewall at a first lateral distance from the first sidewall at a top surface of the non-conformal sidewall layer and a second lateral distance from the sidewall of the magnetic tunnel junction stack at a location between the top surface and the substrate such that the first lateral distance exceeds the second lateral distance, and a conductive contact coupled to a portion of the terminal electrode exposed by the non-conformal sidewall layer, and a means for processing the stored data coupled to the means for storing data.

In one or more twenty -fourth embodiments, for any of the twent -third embodiments, the first sidewall is sloped at an angle of not more than 80 degrees with respect to a lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack and the second sidewall is sloped at an angle of not less than 90 degrees with respect to the lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack.

In one or more twenty-fifth embodiments, for any of the twenty -third or twenty-fourth embodiments, the non-conformal sidewall layer comprises a first sidewall material layer in contact with the first sidewall and a second sidewall material layer having a different composition than the first sidewall material layer such that the second sidewall comprises the second sidewall material, the first sidewall is sloped at an angle of not more than 80 degrees with respect to a lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack, the first sidewall material layer has a third sidewall that is sloped at an angle of not less than 90 degrees with respect to the lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack, and the second sidewall material is conformal to the first sidewall material layer.

In one or more twenty-sixth embodiments, for any of the twenty -third through twenty- fifth embodiments, the conductive contact is within an opening of a dielectric layer having a different composition than the non-conformal sidewall layer and the dielectric layer is in contact with a portion of the second sidewall.

In one or more twenty-seventh embodiments, for any of the twenty -third through twenty- sixth embodiments, the top surface of the non-conformal sidewall layer is between a top surface of the terminal electrode and a bottom surface of the terminal electrode and the location between the top surface and the substrate is laterally adjacent to one of the free layer, the barrier layer, or the fixed layer.

In one or more twenty-eighth embodiments, a method comprises disposing a magnetic tunnel junction stack over a substrate, the magnetic tunnel junction stack including a fixed magnet layer and a free magnet layer separated by a barrier layer and a terminal electrode opposite the substrate and over one of the fixed magnet layer or the free magnet layer such that a first sidewall of the magnetic tunnel junction stack is sloped such that a first end of the first sidewall distal to the substrate is toward an interior of the magnetic tunnel junction stack with respect to a second end of the first sidewall proximal to the substrate, disposing a non-conformal layer over the magnetic tunnel junction stack, disposing a dielectric layer over the non-conformal layer, performing an etch to create an opening within the dielectric layer, to expose a portion of the terminal electrode, and to form a non-conformal sidewall layer having a second sidewall at a first lateral distance from the first sidewall at a top surface of the non-conformal sidewall layer and a second lateral distance from the sidewall of the magnetic tunnel junction stack at a location between the top surface and the substrate such that the first lateral distance exceeds the second lateral distance, and forming a conductive contact within the opening and coupled to the exposed portion of the terminal electrode.

In one or more twenty -ninth embodiments, for any of the twenty-eighth embodiments, depositing the non-conformal layer over the magnetic tunnel junction stack comprises depositing a first non-conformal material layer over the magnetic tunnel junction stack, etching the first non-conformal material layer to expose a second portion of the terminal electrode, and depositing a conformal material layer having a different composition than the first non-conformal material layer over the etched first non-conformal material layer and the exposed second portion of the terminal electrode such that the non-conformal sidewall layer comprises a portion of the first non-conformal material layer in contact with the first sidewall and a portion of the conformal material layer, and the second sidewall comprises the second sidewall material.

In one or more thirtieth embodiments, for any of the twenty-eighth or twenty -ninth embodiments, depositing the non-conformal layer over the magnetic tunnel junction stack comprises depositing a first non-conformal material layer over the magnetic tunnel junction stack, etching the first non-conformal material layer to expose a second portion of the terminal electrode, and depositing a conformal material layer having a different composition than the first non-conformal material layer over the etched first non-conformal material layer and the exposed second portion of the terminal electrode such that the non-conformal sidewall layer comprises a portion of the first non-conformal material layer in contact with the first sidewall and a portion of the conformal material layer, and the second sidewall comprises the second sidewall material, such that the first sidewall material layer, the second sidewall material layer, and the dielectric layer comprise silicon compounds, and the second sidewall material layer and the second sidewall material layer has a greater percentage of nitrogen than the first sidewall material layer and the dielectric layer.

In one or more thirty-first embodiments, for any of the twenty-eighth through thirtieth embodiments, disposing the magnetic tunnel junction stack over the substrate comprises reactive ion etching an un-patterned magnetic tunnel junction layer stack comprising an un-patterned fixed magnet layer, an un-patterned barrier layer, an un-patterned free magnet layer, and an un- patterned terminal electrode layer to form the magnetic tunnel junction stack having the first sidewall.

In one or more thirty-second embodiments, for any of the twenty-eighth through thirty- first embodiments, the first sidewall is sloped at an angle of not more than 80 degrees with respect to a lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack and the second sidewall is sloped at an angle of not less than 90 degrees with respect to the lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack.

In one or more thirty -third embodiments, for any of the twenty-eighth through thirty - second embodiments, the first sidewall is sloped at an angle of not more than 80 degrees with respect to a lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack and the second sidewall is sloped at an angle of not less than 100 degrees with respect to the lateral surface of the substrate extending away from the second end of the first sidewall toward the interior of the magnetic tunnel junction stack.

It will be recognized that the invention is not limited to the embodiments so described, but can be practiced with modification and alteration without departing from the scope of the appended claims. For example, the above embodiments may include specific combination of features. However, the above embodiments are not limited in this regard and, in various implementations, the above embodiments may include the undertaking only a subset of such features, undertaking a different order of such features, undertaking a different combination of such features, and/or undertaking additional features than those features explicitly listed. The scope of the invention should, therefore, be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.