Title:
NON-VOLATILE MEMORY DEVICE AND DRIVE METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2012/001944
Kind Code:
A1
Abstract:
Disclosed is a drive method for a non-volatile memory device, which includes: a step (S101) for detecting a surplus low resistance cell in a plurality of memory cells (11); a step (S103) for changing the resistance value of a load resistance (121) to a second resistance value which is lower than a first resistance value; and a step (S104) for setting a variable resistance element (105) included in the surplus low resistance cell to a second high resistance state in which the resistance value is higher than that of a first low resistance state, by applying a voltage pulse to a series circuit constructed from the surplus low resistance cell and the load resistance (121) having the second resistance value.
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Inventors:
IIJIMA, Mitsuteru (())
飯島 光輝 (())
TAKAGI, Takeshi (())
飯島 光輝 (())
TAKAGI, Takeshi (())
Application Number:
JP2011/003670
Publication Date:
January 05, 2012
Filing Date:
June 28, 2011
Export Citation:
Assignee:
PANASONIC CORPORATION (1006, Oaza Kadoma Kadoma-sh, Osaka 01, 〒5718501, JP)
パナソニック株式会社 (〒01 大阪府門真市大字門真１００６番地 Osaka, 〒5718501, JP)
IIJIMA, Mitsuteru (())
飯島 光輝 (())
パナソニック株式会社 (〒01 大阪府門真市大字門真１００６番地 Osaka, 〒5718501, JP)
IIJIMA, Mitsuteru (())
飯島 光輝 (())
International Classes:
G11C13/00; H01L27/10; H01L27/105; H01L45/00; H01L49/00
Attorney, Agent or Firm:
NII, Hiromori (6F Tanaka Ito Pia Shin-Osaka Bldg.,3-10, Nishi Nakajima 5-chome, Yodogawa-ku, Osaka-cit, Osaka 11, 〒5320011, JP)
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Claims:
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