BACKGROUND

[0001 ] Non-volatile memory is computer memory that can store information even when not powered. Types of non-volatile memory may include resistive RAM (random access memory) (RRAM or ReRAM), phase change RAM (PCRAM), conductive bridge RAM (CBRAM), ferroelectric RAM (F-RAM), etc.

[0002] Resistance memory elements, such as resistive RAM, or ReRAM, can be programmed to different resistance states by applying programming energy. After programming, the state of the resistive memory elements can be read and remains stable over a specified time period. Large arrays of resistive memory elements can be used to create a variety of resistive memory devices, including non-volatile solid state memory, programmable logic, signal processing, control systems, pattern recognition devices, and other applications. Examples of resistive memory devices include valence change memory and electrochemical metallization memory, both of which involve ionic motion during electrical switching and belong to the category of memristors. [0003] Memristors are devices that can be programmed to different resistive states by applying a programming energy, for example, a voltage or current pulse. This energy generates a combination of electric field and thermal effects that can modulate the conductivity of both non-volatile switch and nonlinear select functions in a memristive element. After programming, the state of the memristor can be read and remains stable over a specified time period.

BRIEF DESCRIPTION OF THE DRAWINGS

[0004] FIGS. 1 A-1 B depict, in perspective, a memristor crossbar and a selector-memristor crossbar, respectively, according to an example.

[0005] FIG. 2 depicts a half V scheme with selector, according to an example.

[0006] FIG. 3 is a cross-sectional view, depicting a device structure for a selector, according to an example.

[0007] FIGS. 3A-3C give examples of different configurations of the structure shown in FIG. 3, according to an example.

[0008] FIG. 4, in cross-sectional view, illustrates a nonvolatile memory cell that may include a volatile selector electrically coupled in series with a nonvolatile resistance memory device, according to an example.

[0009] FIG. 5 depicts a method of manufacturing a memory array with nonvolatile resistance memory devices and volatile selectors, according to an example.

[0010] FIGS. 6A-6B two consecutive l-V scan results in a semi- logarithmic plot for a selector having a Si0 ₂ selector oxide matrix sandwiched between a (Cu, Ni) solid solution bottom electrode and a Cu top electrode, using a first DC scan from 0 to +1 .4 V (FIG. 6A) and a second DC scan from 0 to 1 .6 V (FIG. 6B), according to an example. DETAILED DESCRIPTION

[001 1 ] Memristors are nano-scale devices that may be used as a component in a wide range of electronic circuits, such as memories, switches, radio frequency circuits, and logic circuits and systems. In a memory structure, a crossbar array of memristor devices may be used. When used as a basis for memories, memristors may be used to store bits of information, 1 or 0. When used as a logic circuit, a memristor may be employed as configuration bits and switches in a logic circuit that resembles a Field Programmable Gate Array, or may be the basis for a wired-logic Programmable Logic Array. It is also possible to use memristors capable of multi-state or analog behavior for these and other applications. While specific examples to memristors are provided herein, it is appreciated that many other types of non-volatile memory may beneficially employ the teachings herein. Examples of such other types of non-volatile memory may include resistive RAM (random access memory) (RRAM or ReRAM), phase change RAM (PCRAM), conductive bridge RAM (CBRAM), ferroelectric RAM (F-RAM), etc.

[0012] The resistance of a memristor may be changed by applying a voltage across or a current through the memristor. Generally, at least one channel may be formed that is capable of being switched between two states— one in which the channel forms an electrically conductive path ("ON") and one in which the channel forms a less conductive path ("OFF"). In some cases, conducting channels may be formed by metal ions and/or oxygen vacancies. Some memristors exhibit bipolar switching, where applying a voltage of one polarity may switch the state of the memristor and where applying a voltage of the opposite polarity may switch back to the original state. Alternatively, memristors may exhibit unipolar switching, where switching is performed, for example, by applying different voltages of the same polarity. [0013] Using memhstors in crossbar arrays may lead to read and/or write failure due to sneak currents passing through the cells that are not selected, for example, cells on the same row or column as a targeted cell. Failure may arise when there is insufficient current through the targeted memristor due to current sneaking through untargeted neighboring cells. As a result, effort has been spent on minimizing sneak currents. Using a transistor with each memristor has been proposed to isolate each cell and overcome the sneak current. However, using a transistor with each memristor in a crossbar array limits array density and increases cost, which may impact the commercialization of memristor devices.

[0014] When used as a switch, the memristor may either be in a low resistance (ON) or high resistance (OFF) state in a crosspoint memory. During the last few years, researchers have made great progress in finding ways to make the switching function of these memhstors behave efficiently. For example, tantalum oxide (TaO _x )-based memhstors have been demonstrated to have superior endurance over other nano-scale devices capable of electronic switching. In lab settings, tantalum oxide-based memristors are capable of over 10 billion switching cycles.

[0015] A memristor may use a switching material, such as TiO _x , HfO _x or TaOx, sandwiched between two electrodes. Memristive behavior is achieved by the movement of ionic species (e.g., oxygen ions or vacancies) within the switching material to create localized changes in conductivity via modulation of a conductive filament between two electrodes, which results in a low resistance "ON" state, a high resistance "OFF" state, or intermediate states. Initially, when the memristor is first fabricated, the entire switching material may be noncon- ductive. As such, a forming process may be required to form the conductive channel in the switching material between the two electrodes. A known forming process, often called "electroforming", includes applying a sufficiently high (threshold) voltage across the electrodes for a sufficient length of time to cause a nucleation and formation of a localized conductive channel (or active region) in the switching material. The threshold voltage and the length of time required for the forming process may depend upon the type of material used for the switching material, the first electrode, and the second electrode, and the device geometry.

[0016] Metal or semiconductor oxides may be employed in memristive devices; examples include either transition metal oxides, such as tantalum oxide, titanium oxide, yttrium oxide, hafnium oxide, niobium oxide, zirconium oxide, or other like oxides, or non-transition metal oxides, such as aluminum oxide, calcium oxide, magnesium oxide, dysprosium oxide, lanthanum oxide, silicon dioxide, or other like oxides. Further examples include transition metal nitrides, such as aluminum nitride, gallium nitride, boron nitride, and silicon nitride.

[0017] TaOx and HfO _x based memristors have demonstrated the most promising results. However, both of these oxide systems have a linear current- voltage relation in the ON state, which is not desired due to the sneak path current issue, described above. For applications in high density crossbar arrays, a nonlinear selector may be in series with each memristor to form a 1 S1 R (one selector - one resistor) structure. A bipolar nonlinear selector to suppress the sneak current in the crossbar array has been fabricated using a simple metal- oxide-metal structure realized by the Schottky emission over the metal/oxide barriers or the resistance change associated with insulator-metal-transition (IMT) or other methods. Some IMT materials can be used for the selectors (e.g., V0 ₂ , Ti ₂ 0 ₃ , Nb0 ₂ , etc.). The metal for the bottom electrode and the top electrode can be TiN, TaN, etc. As an example, both TaN/Nb0 ₂ /TaN and TiN/Nb0 ₂ /TiN have shown good performance.

[0018] However for practical applications, the selectors presently under development may not be able to meet the requirement for both high nonlinearity (>1000), low leakage current (less than 1 nA at below threshold voltage), and high current density requirement at above threshold voltage (on the order of 10 ⁶ A/cm ² ). As used herein, "high nonlinearity" is based on a comparison of the current density level at two different voltages, here, V and V/2, where V is the selected cell voltage and V/2 is the half-selected cell voltage. The selector's threshold voltage is between V/2 and V. The ratio of the two current densities should be at least 10 ³ to be considered a useful nonlinearity. In some cases, the ratio may approach or even exceed 10 ⁶ for improved nonlinearity.

[0019] Herein, a selector is described, which can satisfy both requirements of high nonlinearity and be able to conduct current at a level of a few tens of μΑ for a nano device size such as 30 nm x 30 nm, or have a current density of at least 10 ⁶ A/cm ² . The selector may enable the final production of memris- tors for large crossbar applications. The selector is based on a Cu-Si0 ₂ -Cu configuration. While this configuration is highly nonlinear (exceeding 10 ⁷ ), the copper electrodes do not adhere well to silicon dioxide.

[0020] In accordance with the teachings herein, a volatile, nonlinear selector may be made with a matrix oxide (e.g., Si0 ₂ ) and two electrodes sandwiching the matrix oxide, both electrodes based on a fast diffusing cation metal, such as Cu, with at least one of two electrodes also containing a metal that promotes adhesion to the matrix oxide, such as Ni. The combination may be considered to be a volatile conducting bridge (VCB) selector. By "volatile", in reference to memory, is meant computer memory that requires power to maintain the stored information; it retains its contents while powered on but when the power is interrupted, the stored data is immediately lost or decays with time, which is characterized by a relaxation time. By "fast-diffusing" is meant that the rate of diffusion should be faster than the rate of diffusion of oxygen vacancies in a memristor oxide (or nitrogen vacancies in a memristor nitride). Specifically, interstitial diffusion is much fast than substitutional diffusion. There are two main lattice point defects: interstitial and substitutional. Interstitial diffusion has a lower activation energy, and a higher jump frequency (neighboring interstitial sites are always vacant). Substitutional diffusion has a higher activation energy, and a lower jump frequency (neighboring substitutional site may not be vacant). Cu, Ag, and Au are some examples of fast diffusers.

[0021 ] In thin film technology, the adhesion between a thin film and a substrate and between thin films may be a factor in determining the quality and reliability of device performance. The adhesion depends on the interface surface condition and the interaction at the interface. Some examples of interface interaction are chemical reaction and lattice match (i.e. epitaxy). Although thin film adhesion may be important to device performance, there is no generally acceptable method of measurement. A scratch test or a peel test (with adhesive tape) or other methods may be used to empirically evaluate the adhesion. If adhesion needs be improved, various methods may be used for adhesion engineering, for example, interfacial adhesion, inter-diffusion adhesion, intermediate layer adhesion, and mechanical interlocking, etc. An adhesion promoter is a material that is used to enhance adhesion of one film to another. An example may include titanium, chromium, tantalum or aluminum that may form a reaction product which may chemically bond the substrate and film.

[0022] The following discussion is presented in terms of a selector matrix oxide of Si0 ₂ with electrodes that include Cu as a fast diffusing metal cation in both electrodes and also include Ni as an adhesion promoter in at least one electrode in the form of a (Cu, Ni) solid solution. Copper has been used in CMOS interconnects and is known to have poor adhesion on Si0 ₂ . This may be partly due to the phase equilibrium between Cu and Si0 ₂ that interface chemical reaction may not occur. Intermediate layer adhesion between Cu and Si0 ₂ may also be ruled out, since the contact between Cu and Si0 ₂ needs be maintained. In this disclosure, copper-nickel alloys may be used as one or both electrodes for the selector. Another Cu alloy that may improve adhesion on Si0 ₂ is (Cu, Al) where Al solubility in Cu is up to about 20 at%, and Al is also known to have good adhesion on Si0 ₂ . Yet another Cu alloy that my improve adhesion on Si0 ₂ is (Cu, Si) where Si solubility in Cu is up to about 9 at%. In addition to the Cu alloy solid solution, Cu-aluminide or Cu-silicide may also be used as electrode materials. It is appreciated that other fast diffusing metal cations, such as Ag and Au, may be employed, together with other adhesion promoting metals in the form of solid solutions or in the form of alloys with metals having a suitable solubility for the fast diffusing metal cations. For example, in case of Ag as fast diffusing ion, suitable amount of Al or Ti can be alloyed into Ag to improve ad- hesion. In case of Au as fast diffusing ion, suitable amount of Cr, Ta, Nb, or V can be alloyed into Au to improve adhesion. Here, suitable solubility is a relative term, which can range from a few atomic percent to over tens of atomic percent, providing that the electrodes can function as a Cu source and have adequate adhesion at the interface. Other examples of suitable binary alloys that combine (1 ) at least one fast diffusing cation metal and (2) at least one adhesion promoter, in which the alloy is either a solid solution or the adhesion promoter has a suitable solubility for the fast diffusing cation metal may include, besides Cu-Ni, Cu-AI and Cu-Si: Ag-AI, Ag-Ti, Au-Cr, Au-Ta, Au-Nb, and Au-V. Other alloys, such as Al-Si-Cu, or Al-Ta-Cu may also be contemplated for use.

[0023] An examination of the Cu-Ni binary phase diagram (not shown) reveals that (Cu, Ni) forms a solid solution, with a miscibility gap of less than 354°C, as predicted from the thermodynamic model. It is worth noting that for (Cu, Ni) alloys, the atomic percent and weight percent are approximately the same due to the fact that Cu and Ni have close atomic weight and density. An examination of the Cu-Si-0 ternary phase diagram (not shown) reveals that Cu ₂ 0 and Si0 ₂ are in equilibrium with each other and also in equilibrium with metallic Cu (suggesting that the three phases of Cu, Cu ₂ 0, and Si0 ₂ are in equilibrium). Since Cu and Si0 ₂ are in equilibrium, Cu can enter and exit Si0 ₂ without reaction with Si0 ₂ . Here, (Cu, Ni) alloy may be used to replace a Cu electrode, based on the facts that (1 ) Ni has a reasonable adhesion on Si0 ₂ and (2) (Cu, Ni) forms a continuous solid solution from pure Cu to pure Ni. Without subscribing to any particular theory, it appears that the (Cu, Ni) solid solution can serve as both a Cu source and Cu sink for volatile switching, while the Ni in the solid solution can improve adhesion between the (Cu, Ni) electrode and the Si0 ₂ dielectric.

[0024] It appears that the Cu volatile switch involves ionic conduction followed by electronic conduction. Cu ions form in the Cu electrode or (Cu, Ni) alloy electrode and drift through Si0 ₂ under an applied field, and form a conductive path. Once a conductive channel is formed, electrons rapidly flow through the conductive channel to bring the device to the ON state. When the external voltage decreases or disappears, the surface tension between the Cu channel and the Si0 ₂ matrix may cause the channel to shrink until it disappears (Cu being expelled from S1O2 or changes from cylindrical to spherical to reduce its surface area), and thus stop the flow of electrons (OFF state).

[0025] In some examples, (Cu, Ni) may be used as both the bottom electrode and the top electrode, providing a (Cu, Ni)/Si0 ₂ /(Cu, Ni) structure. In other examples, (Cu, Ni) may be used as one of the electrodes and Cu as the other electrode. The Cu in both electrodes may function as a VCB ion source or sink. Threshold switching with this configuration has demonstrated a high ON/OFF selector ratio of about 4 to 5 orders of magnitude and low leakage current of about 100 pA (10 ^"1 ° A). It should be noted that the above demonstration was from un-optimized devices whose performance may be improved through focused development in materials and process.

[0026] The selector may be configured in series with a nonvolatile element, such as a memristor. The term "in series" means that the components are electrically connected along a single path so that the same current flows through all of the components. While the components may be in series, they may or may not be in direct contact with one another, and the order of the components may vary.

[0027] In an example, the nonvolatile element may be linear, or, if nonlinear, then only slightly. The selector formed with the materials mentioned (fast- diffusing cation metal particles) evidences high nonlinearity and volatile characterizations. The terms "linear" and "nonlinear" refer to the nature of the current- voltage (l-V) curve; that is, whether the curve is linear or nonlinear, respectively. As used in the present specification and in the appended claims, the term "nonlinear" may refer to a property of the selector or memristor wherein a change in voltage applied across the selector or memristor results in a disproportionate change in current flowing through the selector or memristor, respectively.

[0028] The sneak-path issue is inherent for crossbar (or crosspoint) architectures, regardless of the memory element employed. FIG. 1A depicts a crossbar 100 containing a plurality of memory elements 102. Each memory element 102 may include a switching material, such as a switching oxide or switching nitride, sandwiched between a bottom electrode and a top electrode (not visible in FIG. 1 , but depicted in FIG. 4). Each memory element 102 is sandwiched between a bottom electrically conducting trace 106 and a top electrically conducting trace 108. The crossbar 100 is made of a lower layer 1 10 of electrically conducting traces formed by a plurality of bottom conducting traces 106 and an upper layer 1 12 of electrically conducting traces formed by a plurality of top conducting traces 108, with the memory element 102 at each intersection junction 1 14 formed by a bottom trace 106 and a top trace 108. The bottom conductive traces 106 may be referred to as row, or bit, lines, while the top conductive traces 108 may be referred to as column, or word, lines. However, it is immaterial whether the row (bit) lines are above or below the column (word) lines.

[0029] FIG. 1 A depicts the situation that while trying to read the high resistive element 102a, a current sneak path exists due to three low resistive elements 102b. The thin line 1 16 with arrow head shows the desired current path. The dashed line 1 18 with arrow head shows a sneak path current path.

[0030] The solution, illustrated in FIG. 1 B, may be to increase the nonlin- earity or asymmetry of the l-V characteristic of the memristor elements 102, which may ensure that the memristor, or other nonlinear memory device, can be used in large crossbar arrays 150. Increasing the nonlinearity of the memristor cells 102 may result in reduction or even elimination of the sneak path current path 1 18. As noted above, a nonlinear, nonvolatile memristor cell 102' may include a selector 300 (discussed below in connection with FIG. 3) and a memristor element 102. The selector 300 may be nonlinear and volatile; the memristor 102 may be linear and nonvolatile. While these are the ideal states of the selector 300 and memristor 102, respectively, it is understood that there may be slight variations from the ideal state. In any event, the net intent is to provide a memory cell 102' that is both nonlinear and nonvolatile. [0031 ] The selector 300 may be used to mitigate the sneak path current issue by suppressing the total current passing through the non-selected devices in the array at the given voltage. Nonlinearity may depend on the operating voltage range, which in turn depends on the materials used and structure of the device stack (memristor plus selector). For memristors having a certain operating voltage, there may be a need to tune the threshold of selector 300, such as by adjusting the species, film thickness, concentration, etc., as described in greater detail below.

[0032] The concept for a selector associated with a popular reading scheme for a 1 S1 R cell is shown in FIG. 2. The selected low resistance cell is denoted 102'a and the half selected cells having high resistance are denoted 102'b. The high resistance cells 102'b are in the same row or column as the selected cell 102'a. It is the high resistance cells 102'b that may suppress sneak path currents. V is the selected cell voltage, V/2 is half selected cell voltage, and G is ground.

[0033] The selector 300, shown in FIG. 3, may include a bottom electrode 302, a top electrode 304, and a selector oxide matrix 306 disposed between the two electrodes. The bottom electrode 302 and top electrode 304 may be symmetrical or asymmetrical. If symmetrical, both electrodes 302 and 304 may be made of the same copper-nickel alloy. If asymmetrical, there are two possibilities: (1 ) one of the two electrodes 302, 304 may be copper and the other of the two electrodes may be a copper-nickel alloy, and (2) both electrodes may be of a copper-nickel alloy, but of different compositions. The thickness of the electrodes 302, 304 may be in the range of 0.3 to 20 nm. In some examples, the minimum thickness may be 0.6 nm. The copper-nickel alloy may help improve adhesion of the electrode to an underlying layer and/or to the selector oxide matrix 306. In addition to providing increased adhesion, Ni can also change the amount of Cu moving into Si0 ₂ under the same electric pulse. Essentially, the presence of nickel can reduce the amount of Cu available to diffuse into the oxide, since nickel has been reported to diffuse much slower than copper in Si0 ₂ . Actually, nickel may be used as one of the diffusion barrier materials between copper and Si0 ₂ .

[0034] FIGS. 3A-3C depict three different possible electrode structures.

FIG. 3A depicts a structure 300a in which the bottom electrode 302 is made of a copper-nickel alloy and the top electrode 304 is copper. Of course, the situation could be reversed, with the bottom electrode 302 being copper and the top electrode 304 being the copper-nickel alloy. This is an example of an asymmetrical case.

[0035] FIG. 3B depicts a structure 300b in which both bottom electrode

302 and top electrode 304 are the same copper-nickel alloy. This is an example of the symmetrical case.

[0036] FIG. 3C depicts a structure 300c in which the bottom electrode

302 is made of a first copper-nickel alloy, (Cu, Ni)i , and the top electrode 304 is made of a second copper-nickel alloy, (Cu,Ni) ₂ , of a different composition than the first copper-nickel alloy. Of course, the situation can be reversed, with the bottom electrode 302 being the second copper-nickel alloy and the top electrode 304 being the first copper-nickel alloy. Since the alloys have different compositions, this may be considered to be an asymmetric case.

[0037] The concentration range of the (Cu, Ni) solid solution may range from greater than zero Cu and from greater than zero Ni. The composition may have enough Ni to provide desirable adhesion, but not so much Ni that there is little to no Cu to move into the Si0 ₂ dielectric. On the Cu side, the composition may have enough Cu to provide the desired nonlinearity, but not so much as to adversely affect the adhesion. Within these considerations, the (Cu, Ni) alloy may range from about (Cu 95 at%, Ni 5 at%) to (Cu 5 at%, Ni 95 at%), in terms of atomic percent (at%). In some examples, the composition range may be from (Cu 75 at%, Ni 25 at%) to (Cu 25 at%, Ni 75 at%).

[0038] The selector oxide matrix 306 may be silicon dioxide. In particular, the silicon dioxide may be Si0 ₂ . In an example, the silicon dioxide can be an oxide mixture. Examples of secondary oxides that may be mixed with Si0 ₂ in- elude aluminum oxide (AI ₂ O ₃ ), hafnium oxide (Hf0 ₂ ), zirconium oxide (Zr0 ₂ ), tantalum oxide (Ta ₂ 05), and titanium oxide (Ti0 ₂ ). Up to about 10 at% (atomic percent) of the secondary oxide in terms of the metal cation (Al, Hf, Ta, or Ti) may be employed. The addition of aluminum oxide, hafnium oxide, tantalum oxide or titanium oxide may further reduce leakage current. In another example, the silicon dioxide can include a dispersion of copper atoms or copper oxide, in the form of Cu ₂ 0 or CuO. For example, the silicon dioxide may include up to about 5 at% Cu atoms or ions. The thickness of the selector oxide matrix 306 may range from about 3 to 100 nm.

[0039] As indicated above and as shown in FIG. 4, an example nonvolatile memory cell 102' may include the volatile selector 300 electrically coupled in series with the nonvolatile resistance memory device, such as memristor 102. The nonvolatile resistance memory device 102 may include a switching layer 406 composed of an oxide or nitride sandwiched between a first bottom electrode 402 and a first top electrode 404. The volatile selector 300 may include the selector oxide matrix 306 sandwiched between a second bottom electrode 302 and a second top electrode 304. In a crossbar configuration (FIG. 1 B, 150), each memory cell 102' may be disposed at the intersection 1 14 formed by one of the bottom conducting traces 106 and one of the top conducting traces 108.

[0040] The electrodes 402, 404 for the memristor 102 may include aluminum (Al), platinum (Pt), tungsten (W), gold (Au), titanium (Ti), ruthenium dioxide (Ru0 ₂ ), titanium nitride (TiN), tungsten nitride (WN ₂ ), tantalum (Ta), hafnium nitride (HfN), niobium nitride (NbN), tantalum nitride (TaN), and the like. The thickness of the electrodes 402, 404 may be in the same range as for electrodes 302, 304.

[0041 ] The teachings herein may be employed with a crossbar that is fabricated with resistance memory devices, or resistance random access memory devices, denoted RRAM or ReRAM, such as phase change RAM (PCRAM), spin transfer torque RAM (STTRAM), conductive bridge RAM (CBRAM), and others. In some examples, the nonvolatile resistance memory device 102 may be a memristor.

[0042] In some examples, the nonvolatile memory cell 102' may include an optional interface layer 408 sandwiched between the first top electrode 404 of the nonvolatile resistance memory device 102 and the second bottom electrode 302 of the selector 300. The interface layer 408 may serve as a buffer layer to separate the memristor and selector so that they do not chemically and/or physically interfere with each other. The interface layer 408 may be a good electrical conductor over the temperature range from room temperature (approximately 20° to 26°C) to about 1 10°C and a good diffusion barrier, which may be used to prevent the fast diffusion specie Cu from diffusing from the selector 300 to the memristor 102. In some examples, the interface layer 408 may be a metal, such as tantalum or tungsten. The choice of a material for the interface layer may depend on layers below and above it. Additional non-limiting examples of the interface layer 408 may include TiN, Ti ₄ 0 ₇ , TaN, NbN, Ru, and W. The interface layer 408 is optional, in that it may be omitted, since the nonvolatile memory cell 102' may operate fine without it. Alternatively, it may be used for an improved device 102', but accepting the costs associated with providing the extra layer.

[0043] A memory array, or crossbar, 150 (in FIG. 1 B) having nonvolatile resistance memory devices may include a set 1 10 of electrically conducting row traces 106 intersecting a set 1 12 of electrically conducting column traces 108 to form intersections 1 14, with a memory cell 102' disposed at each intersection between one of the row lines and one of the column lines. As shown in FIG. 4, the memory cell 102' may be a combination of a volatile selector 300 electrically coupled in series with the nonvolatile resistance memory device 102, as described above. The first bottom electrode 402 may be electrically coupled to a row trace 106 or to a column trace 108 and wherein the second top electrode 304 may be electrically coupled to the other of the row trace 106 or the column trace 108. In some examples, one or both of the first bottom electrode 402 and the second top electrode 304 may be omitted, and the switching material 406 and selector oxide matrix 306 layers may be coupled directly to the electrically conducting row trace 106 and the electrically conducting column trace 108, respectively.

[0044] A method of manufacturing a memory array with nonvolatile resistance memory devices and selectors is depicted in FIG. 5. The method 500 includes providing 505 a set 1 10 of electrically conducting row traces 106. The electrically conducting row traces 106 may be formed by any of a number of processes, including electroplating, sputtering, evaporation, ALD (atomic layer deposition), co-deposition, chemical vapor deposition, IBAD (ion beam assisted deposition), oxidation of pre-deposited materials, or any other film deposition technology.

[0045] The method 500 further includes providing 510 memory cells 102' disposed at a plurality of locations along the set 1 10 of row traces 106. The memory cell 102' may include the nonvolatile resistance memory device 102 electrically coupled in series with the volatile selector 300 or 300', as described above.

[0046] Taking FIG. 4 as an example, deposition of the metal layers 402, 404, 302, and 304 may be performed by such processes as electroplating, sputtering, evaporation, ALD (atomic layer deposition), co-deposition, chemical vapor deposition, IBAD (ion beam assisted deposition), oxidation of pre-deposited materials, or any other film deposition technology. The switching material layer 406, the optional interface layer 408, and the selector oxide matrix 406 may be formed by e-beam deposition, sputter deposition, atomic layer deposition (ALD), and the like. The layers 402, 406, 404, 408 (if used), 302, 306, and 304 may be deposited sequentially. It is appreciated that in FIG. 4, the selector 300 is shown on "top" and the memristor 102 is shown on the "bottom" of the cell 102'. However, in some examples, the memristor 102 may be on "top" and the selector 300 on the "bottom".

[0047] The method 500 concludes with providing 515 a set 1 12 of electrically conducting column traces 108 to contact the memory cells 102' at unique intersections 1 14. The electrically conducting column traces 1 12 may be formed by any of a number of processes, including electroplating, sputtering, evaporation, ALD (atomic layer deposition), co-deposition, chemical vapor deposition, IBAD (ion beam assisted deposition), oxidation of pre-deposited materials, or any other film deposition technology. The process used may be the same as or different than the process used to form the electrically conducting row traces 1 10. The order of the steps of method 500 may be reversed, so that the column traces 108 are formed first and the row traces 106 are formed last.

[0048] In some examples, the new selector 300, 300' may have a nonlin- earity of >10 ⁶ with large current density. The higher the current ratio (nonlineari- ty), the larger the potential crossbar array size. For example, a nonlinearity of >10 ⁶ may allow a crossbar array of 1000 rows by 1000 columns, or 10 ⁶ memris- tors to populate the 10 ⁶ crosspoints. On the other hand, a nonlinearity on the order of 10 ³ could lead to a smaller array.

[0049] To prove the concept, a VCB crossbar device was fabricated having the structure as shown in FIG. 3A. The bottom electrode 302 was (Cu, Ni) solid solution of 52 at% Cu and 48 at% Ni in 15 nm thickness evaporated through a shadow mask. Ti was used as an adhesion layer between the Si substrate (covered with thermally grown Si0 ₂ ) and the (Cu, Ni) alloy. The selector oxide matrix 306 Si0 ₂ 15 nm was a blanket film sputtered from a Si0 ₂ target. The top electrode 304 was Cu 5 nm/Pt 20 nm evaporated through a shadow mask. The effective device stack was (Cu, Ni)/Si0 ₂ /Cu.

[0050] The electric characterizations of the device are shown in FIGS. 6A-6B. Specifically, FIGS. 6A-6B show two consecutive l-V scans on a semi- logarithmic plot. FIG. 6A depicts the first l-V scan. FIG. 6B depicts the second l-V scan. The first scan started with current at about 10 ^"12 A (OFF state) as voltage increased from zero and switched to ON state at about 0.9 V, and returned to about 10 ^"8 A as voltage returned to zero. At this point, it is difficult to judge from the first scan whether the device is volatile or non-volatile. If the first scan is volatile, then the device should return to the OFF state with a current about 10 ^"12 A as a starting point for next scan. If the first scan is non-volatile, then the device should retain its ON state with a current about 10 ^"8 A as a starting point for next scan. In this case, the starting point of 10 ^"12 A on the second scan indicates the volatility of the first scan.

[0051 ] It is appreciated that, in the foregoing description, numerous specific details are set forth to provide a thorough understanding of the examples. However, it is appreciated that the examples may be practiced without limitation to these specific details. In other instances, well-known methods and structures may not be described in detail to avoid unnecessarily obscuring the description of the examples. Also, the examples may be used in combination with each other.

[0052] While a limited number of examples have been disclosed, it should be understood that there are numerous modifications and variations therefrom. Similar or equal elements in the Figures may be indicated using the same numeral.

[0053] It is be noted that, as used in this specification and the appended claims, the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise.

[0054] It is appreciated that, in the following description, numerous specific details are set forth to provide a thorough understanding of the

pies. However, it is appreciated that the examples may be practiced without limitation to these specific details. In other instances, well-known methods and structures may not be described in detail to avoid unnecessarily obscuring the description of the examples. Also, the examples may be used in combination with each other.

[0055] While a limited number of examples have been disclosed, it should be understood that there are numerous modifications and variations therefrom. Similar or equal elements in the Figures may be indicated using the same numeral.