Title:
NONVOLATILE LATCH CIRCUIT AND NONVOLATILE FLIP-FLOP CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2012/098897
Kind Code:
A1
Abstract:
A nonvolatile latch circuit (100) according to the present invention has an oxygen-deficient oxide layer interposed between a first and a second electrodes, and is provided with a resistance variable element (1), which is turned into a low resistance mode by applying a first writing voltage in the direction of currents flowing from a first electrode to a second electrode and is turned into a high resistance mode by applying a second writing voltage in the direction of currents flowing from the second electrode to the first electrode, wherein a first terminal of a transistor (6) is connected to the abovementioned first electrode, a first terminal of a transistor (7) is connected to the abovementioned second electrode, an output terminal of an inverter circuit (20) is connected to a second terminal of the transistor (6), and an output terminal of an inverter circuit (21) is connected to a second terminal of the transistor (7), wherein the absolute value of the first currents flowing through the resistance variable element (1) when the high resistance mode is turned into the low resistance mode is smaller than the absolute value of the second currents flowing through the resistance variable element (1) when the low resistance mode is turned into the high resistance mode.
Inventors:
KATOH YOSHIKAZU
Application Number:
PCT/JP2012/000328
Publication Date:
July 26, 2012
Filing Date:
January 19, 2012
Export Citation:
Assignee:
PANASONIC CORP (JP)
KATOH YOSHIKAZU
KATOH YOSHIKAZU
International Classes:
H03K3/356; H03K3/037
Domestic Patent References:
| WO2004040582A1 | 2004-05-13 |
Foreign References:
| JP2004273099A | 2004-09-30 | |||
| JP2003067260A | 2003-03-07 | |||
| JP2009282923A | 2009-12-03 |
Attorney, Agent or Firm:
NII, Hiromori (JP)
New house Extensive 守 (JP)
New house Extensive 守 (JP)
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