Title:
NONVOLATILE MEMORY CELL, NONVOLATILE MEMORY CELL ARRAY, AND METHOD FOR MANUFACTURING THE NONVOLATILE MEMORY CELL ARRAY
Document Type and Number:
WIPO Patent Application WO/2012/001960
Kind Code:
A1
Abstract:
Disclosed is a nonvolatile memory cell array which is provided with: a laminated structure wherein interlayer insulating films (16) and laminated bodies (21), each of which is composed of a first conductive layer (13), a semiconductor layer (17) and a second conductive layer (18), are alternately laminated in parallel to a substrtate; a plurality of columnar electrodes (12) which are disposed by penetrating the laminated structure in the laminating direction; and variable resistance layers (14), each of which is provided between each columnar electrode (12) and each first conductive layer (13), and which has a resistance value reversibly changed on the basis of application of electrical signals. The variable resistance layer (14) is formed by oxidizing a part of the first conductive layer (13). In one oxidizing step, the variable resistance layer (14) is formed, and at the same time, an insulating film for electrically isolating the semiconductor layer (17) and the second conducive layer (18) from the columnar electrode (12) is formed.
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Inventors:
WEI, Zhiqiang (())
魏 志強 (())
TAKAGI, Takeshi (())
魏 志強 (())
TAKAGI, Takeshi (())
Application Number:
JP2011/003697
Publication Date:
January 05, 2012
Filing Date:
June 29, 2011
Export Citation:
Assignee:
PANASONIC CORPORATION (1006, Oaza Kadoma Kadoma-sh, Osaka 01, 〒5718501, JP)
パナソニック株式会社 (〒01 大阪府門真市大字門真１００６番地 Osaka, 〒5718501, JP)
WEI, Zhiqiang (())
魏 志強 (())
パナソニック株式会社 (〒01 大阪府門真市大字門真１００６番地 Osaka, 〒5718501, JP)
WEI, Zhiqiang (())
魏 志強 (())
International Classes:
H01L27/105; G11C13/00; H01L45/00; H01L49/00
Attorney, Agent or Firm:
NII, Hiromori (6F Tanaka Ito Pia Shin-Osaka Bldg.,3-10, Nishi Nakajima 5-chome,Yodogawa-ku, Osaka-city, Osaka 11, 〒5320011, JP)
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Claims:
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