NONVOLATILE MEMORY DEVICE

WIPO Patent Application WO/2012/102025

A1

A nonvolatile memory device (100) comprises the following: a nonvolatile memory element (101) having a first electrode, a second electrode, and a resistance change layer that is disposed between the first electrode and the second electrode and changes from a high resistance state to a low resistance state when a voltage pulse of a first polarity is applied between the first electrode and the second electrode, and that changes from a low resistance state to a high resistance state when a voltage pulse of a second polarity that is different from the first polarity is applied; a variable load resistor (102) that by being electrically connected in series with the nonvolatile memory element (101) constitutes an electrical circuit (108); and a control circuit that, when a write voltage pulse which applies the second polarity voltage pulse to the nonvolatile memory element (101) is applied to the electrical circuit (108), sets the resistance value of the variable load resistor (102) to any one of a plurality of load resistance values each corresponding to the respective high resistance states in which the resistance values of the resistance change layer are mutually different.

TAKAGI TAKESHI
KATAYAMA KOJI

PCT/JP2012/000433

August 02, 2012

January 24, 2012

Click for automatic bibliography generation  

PANASONIC CORP (JP)
TAKAGI TAKESHI
KATAYAMA KOJI

G11C13/00; H01L27/10; H01L27/105; H01L45/00; H01L49/00

WO2008096674A1	2008-08-14
WO2010116754A1	2010-10-14
WO2009107370A1	2009-09-03

JP2005025914A	2005-01-27
JP2005235360A	2005-09-02

NII, Hiromori (JP)
New house Extensive 守 (JP)

View/Download PDF      PDF Help

Previous Patent: VIDEO IMAGE ENCODING METHOD, VIDEO IMAGE ENCODING DEVICE, VIDEO IMAGE DECODING METHOD, VIDEO IMAGE D...

Next Patent: INPUT DEVICE