Title:
NONVOLATILE SEMICONDUCTOR MEMORY
Document Type and Number:
WIPO Patent Application WO/2016/143155
Kind Code:
A1
Abstract:
According to an embodiment of the present invention, nonvolatile semiconductor memory is provided with: a substrate region (Sub(m-1)); a cell unit (CU-L) in the substrate region (Sub(m-1)), said cell unit including a memory cell (MC), and an access transistor (AT), which has a control terminal that is connected to a word line (WL(i-1)), and the substrate region (Sub(m-1)) as a channel, and which supplies a readout current or a write current to the memory cell (MC); and a substrate potential setting circuit, which sets the substrate region (Sub(m-1)) to a first substrate potential when supplying the readout current to the memory cell (MC), and sets the substrate region (Sub(m-1) to a second substrate potential that is different from the first substrate potential when supplying the write current to the memory cell (MC).
Inventors:
NOGUCHI HIROKI (JP)
TAKAYA SATOSHI (JP)
FUJITA SHINOBU (JP)
TAKAYA SATOSHI (JP)
FUJITA SHINOBU (JP)
Application Number:
PCT/JP2015/069035
Publication Date:
September 15, 2016
Filing Date:
July 01, 2015
Export Citation:
Assignee:
TOSHIBA KK (JP)
International Classes:
G11C11/15; G11C13/00; H01L21/8246; H01L27/10; H01L27/105
Domestic Patent References:
| WO2010070895A1 | 2010-06-24 |
Foreign References:
| JP2008269712A | 2008-11-06 |
Attorney, Agent or Firm:
S & S International PPC (JP)
Patent business corporation スズエ international patent firm (JP)
Patent business corporation スズエ international patent firm (JP)
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