NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD FOR PRODUCING SAME

WIPO Patent Application WO/2011/114503

A1

Provided is a nonvolatile semiconductor storage device, comprising: a first insulating layer (2); a first semiconductor layer (3a)...nth insulating layer (4b), nth semiconductor layer (3c), (n+1)th insulating layer (5) (where n is a natural number of 2 or more) stacked in that order in a first direction; and a fin-shaped laminated structure (9) that extends in a second direction. The first to nth semiconductor layers (3a to 3c) are bonded together by a bonding semiconductor layer (14) at one end in a second direction of the first to nth memory strings (NANDa, NANDb, NANDc). The drain electrode (7) side edge of the ith insulating layer (where i is a number from 2 to n) of the first to (n+1)th insulating layers (2, 4a, 4b, 5) is positioned at the same position as the first to nth memory string (NANDa, NANDb, NANDc) side edge of the (i-1)th select gate electrode, or further towards the drain electrode (7) side. The jth layer selection transistor of the first to nth layer selector transistors (where j is a number from 1 to n), is in an always-ON state in the jth semiconductor layer.

FUJII, Shosuke (())
藤井　章輔 (())
HAGISHIMA, Daisuke (())

JP2010/054772

September 22, 2011

March 19, 2010

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KABUSHIKI KAISHA TOSHIBA (1-1 Shibaura 1-chome, Minato-ku Tokyo, 01, 〒1058001, JP)
株式会社　東芝 (〒01 東京都港区芝浦一丁目１番１号 Tokyo, 〒1058001, JP)
FUJII, Shosuke (())
藤井　章輔 (())

H01L21/8247; G11C16/04; H01L27/115; H01L29/788; H01L29/792

SUZUYE, Takehiko et al. (1-12-9 Toranomon, Minato-k, Tokyo 01, 〒1050001, JP)

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