Title:
NONVOLATILE SEMICONDUCTOR STORAGE DEVICE
Document Type and Number:
WIPO Patent Application WO/2006/087796
Kind Code:
A1
Abstract:
A nonvolatile semiconductor storage device having a small memory cell area and can perform highly accurate high-speed operation. Diffusion layers (2a, 2b) are formed in honeycomb shape and are arranged by being shifted by a quarter pitch, and at a section where ODD&lowbar WL0 and WL1 intersect the diffusion layer (2a) and a section where EVEN&lowbar WL0 and WL1 intersect the diffusion layer (2b), a memory transistor (MemoryTr) and a select transistor (SelectTr) are formed. At that time, the memory transistor and the select transistor are arranged so that memory cells (E1, E2) are formed between ODD&lowbar BL0 and BL1 connected to each of the diffusion layers (2a, 2b), and memory cells (E3, E4) are formed between EVEN&lowbar BL0 and BL1. Thus, even when the select transistor is provided, a multitude of memory cells can be arranged in array in a small layout area.
Inventors:
MAWATARI HIROSHI (JP)
Application Number:
PCT/JP2005/002550
Publication Date:
August 24, 2006
Filing Date:
February 18, 2005
Export Citation:
Assignee:
FUJITSU LTD (JP)
MAWATARI HIROSHI (JP)
MAWATARI HIROSHI (JP)
International Classes:
H01L21/8247; H01L27/115; H01L29/788; H01L29/792
Foreign References:
| JPH1093057A | 1998-04-10 | |||
| JPH05174583A | 1993-07-13 |
Attorney, Agent or Firm:
Hattori, Kiyoshi (GE EDISON Bldg. Hachioji 9-8, Azuma-cho, Hachioji-sh, Tokyo 82, JP)
Download PDF: