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Title:
ORTHOGONAL FREQUENCY DIVISION MULTIPLE SIGNAL RECEPTION APPARATUS, RECEPTION APPARATUS, ORTHOGONAL FREQUENCY DIVISION MULTIPLE SIGNAL RECEPTION METHOD, AND RECEPTION METHOD
Document Type and Number:
WIPO Patent Application WO/2003/001713
Kind Code:
A1
Abstract:
Reception timing of a signal consisting of a valid symbol section and a guard interval section is controlled properly. According to a result of self−correlation calculation performed by a guard correlation processor (6), a timing adjustment block (7) generates a control voltage for adjusting the reception timing of the valid symbol section. A first and a second loop filter (8, 9) filter the control voltage signal generated by the timing adjustment block (7) and sends it to a switch (11). An inter−symbol interference judgment block (10) decides whether an inter−symbol interference is generated according to the result of the self−correlation calculation performed by the guard correlation processor (6), and controls the switch (11) according to the decision result. Here, in the first loop filter (8), a comparatively large gain is set while in the second loop filter (9), a comparatively small gain is set.

Inventors:
SHINODA ATSUSHI (JP)
OKUHATA YASUHIDE (JP)
Application Number:
PCT/JP2002/005892
Publication Date:
January 03, 2003
Filing Date:
June 13, 2002
Export Citation:
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Assignee:
KENWOOD CORP (JP)
SHINODA ATSUSHI (JP)
OKUHATA YASUHIDE (JP)
International Classes:
H04J11/00; H04B1/10; H04L7/00; H04L27/26; (IPC1-7): H04J11/00
Foreign References:
JP2001103033A2001-04-13
JPH10322303A1998-12-04
JP2001333042A2001-11-30
Other References:
See also references of EP 1406404A4
Attorney, Agent or Firm:
Okabe, Masao (Fuji Bidg 2-3, Marunouchi 3-chom, Chiyoda-ku Tokyo, JP)
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