Title:
OSCILLATION CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2009/041304
Kind Code:
A1
Abstract:
A first wiring layer, and a plurality of second wiring layers thinner than the first wiring layer are formed in lamination on a semiconductor substrate. An inductor is constituted of the plurality of second wiring layers. The inductor oscillates at such a frequency that the inductor and a parasitic capacitor of an inverter circuit resonate. An n-type MISFET and a p-type MISFET of the inverter circuit have drains connected mutually, and the output of the inductor is connected to the connection point of the drains.
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Inventors:
TANABE, Akira (7-1 Shiba 5-chome, Minato-k, Tokyo 01, 1088001, JP)
田辺昭 (〒01 東京都港区芝五丁目７番１号日本電気株式会社内 Tokyo, 1088001, JP)
田辺昭 (〒01 東京都港区芝五丁目７番１号日本電気株式会社内 Tokyo, 1088001, JP)
Application Number:
JP2008/066622
Publication Date:
April 02, 2009
Filing Date:
September 09, 2008
Export Citation:
Assignee:
NEC Corporation (7-1 Shiba 5-chome, Minato-ku Tokyo, 01, 1088001, JP)
日本電気株式会社 (〒01 東京都港区芝五丁目７番１号 Tokyo, 1088001, JP)
TANABE, Akira (7-1 Shiba 5-chome, Minato-k, Tokyo 01, 1088001, JP)
日本電気株式会社 (〒01 東京都港区芝五丁目７番１号 Tokyo, 1088001, JP)
TANABE, Akira (7-1 Shiba 5-chome, Minato-k, Tokyo 01, 1088001, JP)
International Classes:
H03B5/12; H01F17/00; H01F27/00; H01G4/40; H01L21/82; H01L21/822; H01L27/04
Attorney, Agent or Firm:
IKEDA, Noriyasu et al. (Hibiya Daibiru Bldg, 2-2 Uchisaiwaicho 1-chome,Chiyoda-k, Tokyo 11, 1000011, JP)
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