Title:
OUTPUT DEVICE AND OUTPUT METHOD
Document Type and Number:
WIPO Patent Application WO/2019/229959
Kind Code:
A1
Abstract:
An output device (10) that comprises a plurality of output terminals (11, 12) and a plurality of n-type MOS transistors (101, 102). The output terminals (11, 12) output current to external load apparatuses (21, 22). The n-type MOS transistors (101, 102) have source terminals that are connected to the output terminals (11, 12), drain terminals to which a reference voltage is applied, and gate terminals. Voltage that has been boosted from the reference voltage by a boosting circuit (110) is applied to the gate terminals of the n-type MOS transistors (101, 102).
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| JPS61120524 | DIGITAL INPUT AND OUTPUT CIRCUIT |
Inventors:
SAKURAI DAISUKE (JP)
Application Number:
PCT/JP2018/021049
Publication Date:
December 05, 2019
Filing Date:
May 31, 2018
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP (JP)
International Classes:
H03K17/78
Foreign References:
| JP2001177387A | 2001-06-29 | |||
| JPH08162931A | 1996-06-21 |
Attorney, Agent or Firm:
KIMURA Mitsuru (JP)
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