Title:
OVERBOOST SUPPRESSING CIRCUIT OF BOOSTER CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2017/081997
Kind Code:
A1
Abstract:
The present invention relates to an overboost suppressing circuit of a booster circuit 3 which is controlled by a control circuit 5 to boost an input voltage to a target prescribed voltage, the overboost suppressing circuit being provided with: a detecting portion 1 which detects an overboost in which the voltage is boosted in excess of the prescribed voltage of the booster circuit 3; and a boost shut-down portion 2 which, if an overboost is detected by the detecting portion 1, acts on the control circuit 5 to shut down the boosting operation of the booster circuit 3, and clamps the output voltage of the booster circuit 3 to a voltage that is higher than the prescribed voltage and at most equal to the withstand voltage of a peripheral circuit element which serves as a load.
Inventors:
TAKAGI RYOTA (JP)
Application Number:
PCT/JP2016/080809
Publication Date:
May 18, 2017
Filing Date:
October 18, 2016
Export Citation:
Assignee:
HITACHI AUTOMOTIVE SYSTEMS LTD (JP)
International Classes:
H02M3/155
Foreign References:
| JPH1098565A | 1998-04-14 | |||
| JP2009273252A | 2009-11-19 | |||
| JPH05168230A | 1993-07-02 | |||
| JPH04138020A | 1992-05-12 | |||
| JP2016167918A | 2016-09-15 |
Attorney, Agent or Firm:
OGAWA, Moriaki et al. (JP)
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