PACKAGING METHOD AND SEMICONDUCTOR DEVICE

WIPO Patent Application WO/2016/086716

A1

Provided are a packaging method and a semiconductor device. The packaging method comprises: depositing a first sacrificial layer (4) on a substrate (1), to cover a semiconductor element (3) formed on the substrate (1); covering a first dielectric layer (5) on an upper surface and a sidewall of the first sacrificial layer (4), the first dielectric layer (5) being provided with a first groove that enables a part of the first sacrificial layer (4) to be exposed; covering a second sacrificial layer (6) on the surface of the exposed first sacrificial layer (4); covering a second dielectric layer (7) on the second sacrificial layer (6) and the surface of the exposed first dielectric layer (5), the second dielectric layer (7) being provided with a release hole (8) and a second groove that enable the second sacrificial layer (6) to be exposed; depositing a fill layer (9), to fill the second groove; removing the second sacrificial layer (6) and the first sacrificial layer (4) through the release hole (8), to form a cavity; and depositing a third dielectric layer (10), to cover an exposed surface of the second dielectric layer (7) and fill the release hole (8). According to the present invention, the step of using a tube to perform packaging is avoided, packaging costs of a semiconductor element are reduced, and the yield can be improved.

FEI YUE (CN)
WANG XUHONG (CN)
ZHANG YING (CN)

PCT/CN2015/091663

June 09, 2016

October 10, 2015

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SHANGHAI IND ΜTECHNOLOGY RES INST (CN)

H01L35/32; H01L35/34

CN104409624A	2015-03-11
US20080041607A1	2008-02-21
CN103186693A	2013-07-03
CN102616727A	2012-08-01
US20140284729A1	2014-09-25

BEIJING ORIGINTELLIGENCE IP LAW FIRM (CN)
北京知元同创知识产权代理事务所（普通合伙） (CN)

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