Title:
PARTIAL RECONFIGURATION CONTROL INTERFACE FOR INTEGRATED CIRCUITS
Document Type and Number:
WIPO Patent Application WO/2017/123476
Kind Code:
A3
Abstract:
Systems and methods are provided for coordinating the partial reconfiguration of a region (142, 144, 146) of a configurable device (e.g., a SDM/CNoC/LSM system or device) through an interface (80) that coordinates the stopping of the current persona (148, 150, 152) in that region (142,144, 146), the resetting of the new current persona (148, 150, 152), and the starting of the new persona (148, 150, 152) in a manner that does not corrupt the memory of the affected region (142, 144, 146). The interface (80) further provides signaling (302) that the static region (158) can use to protect itself during the partial reconfiguration, and disallows multiple partial reconfigurations of the same region (142, 144, 146) at the same time.
Inventors:
WEBER SCOTT J (US)
ATSATT SEAN R (US)
PENG YI (US)
ATSATT SEAN R (US)
PENG YI (US)
Application Number:
PCT/US2017/012594
Publication Date:
July 26, 2018
Filing Date:
January 06, 2017
Export Citation:
Assignee:
ALTERA CORP (US)
International Classes:
G06F12/06
Foreign References:
| US9141747B1 | 2015-09-22 | |||
| US8997033B1 | 2015-03-31 | |||
| US7640526B1 | 2009-12-29 | |||
| US9203408B1 | 2015-12-01 | |||
| US8928351B1 | 2015-01-06 |
Attorney, Agent or Firm:
OSTERHAUS, Matthew G. et al. (US)
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