PARTICULATE REDUCTION USING TEMPERATURE-CONTROLLED CHAMBER SHIELD

WIPO Patent Application WO2005024092

A3

Particle flaking is reduced in a semiconductor wafer processing apparatus (10) by installing a chamber shield assembly (40) in the chamber (11) of the apparatus. The shield assembly includes a plurality of nested shields (41, 42, 43, 44) that are supported out of contact with each other and suspended such that, during thermal expansion and contraction, gaps (52, 56) are maintained that are sufficient to avoid arcing. Alignment structure on the shields and on the chamber walls force the shields to align concentrically and maintain the gaps. The shields are made of aluminum or another thermally conductive material and have cross-sectional areas large enough to provide high thermal conductivity throughout the shields. Mounting flanges (46) and other mounting surfaces are provided on the shields that form intimate thermal contact with sufficient contacting area to insure high thermal conductivity from the shields to the temperature controlled walls (14) of the chamber. Radiant lamps (70) of an array are spaced around the chamber and extend vertically to expose multiple shields across large areas to heat for pre-heating bake-out of the shields and to eliminate thermal shock upon processing the first wafer of a run.

KLESHOCK MARK (US)
FAGUET JACQUES (US)
PROVENCHER TIM (US)

PCT/US2004/025974

December 08, 2005

August 12, 2004

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TOKYO ELECTRON LTD (JP)
TOKYO ELECTRON AMERICA INC (US)
KLESHOCK MARK (US)
FAGUET JACQUES (US)
PROVENCHER TIM (US)

C23C14/56; H01J37/32; (IPC1-7): C23C14/35; H01J37/34; H01L21/00

US20020102858A1	2002-08-01
US20030124846A1	2003-07-03
US6287435B1	2001-09-11
US20030146085A1	2003-08-07

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